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PM4314 QDSX Quad T1/E1 Line Interface Unit FEATURES * Monolithic single-chip device that integrates four full-featured T1/E1 duplex DSX-1 compatible line interface circuits in a single device. * Supports B8ZS, HDB3, and AMI line codes. * Provides receive clock recovery and line performance monitoring. * Provides transmit jitter attenuation with programmable line build-out. * Directly interfaces to the PM4344 TQUAD Quad T1 Framer, PM6344 EQUAD Quad E1 Framer, PM4388 TOCTL Octal T1 Framer, PM6388 EOCTL Octal E1 Framer, PM8313 D3MX M13 Multiplexer, and PM7344 S/UNI-MPHa Quad T1/E1 Multi-PHY SATURNa ATM User Network Interface. * Software-compatible with the PM4341A T1XC Single T1 Transceiver, PM6341 E1XC Single E1 Transceiver, and PM4351 COMET Single T1/E1 Transceiver. * Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring. * Low power 5 V CMOS technology. * Available in a rectangular 128-pin 14 by 20 mm Plastic Quad Flat Pack (PQFP) package. * -40 to +85 industrial temperature operation. * Detects Line Code Violations (LCVs), and accumulates up to 8191 LCVs for performance monitoring purposes. * Detects both programmable in-band loopback activate and deactivate code sequences received in the DS1/E1 data stream. * Allows insertion of framed or unframed in-band loopback code sequences. * Supports transmission of the AIS. * Provides a 48-bit FIFO for jitter attenuation in each transmit path. FIFO full or empty indications allow for bitstuffing in higher rate multiplexing applications. * Provides up to 55 dB of jitter attenuation as per AT&T TR 62411. TRANSMIT SECTION * Optionally accepts dual-rail digital PCM inputs. Accepts gapped data streams to support higher rate demultiplexing. Supports unframed mode. * Optionally performs B8ZS or HDB3 encoding for single-rail PCM signals. * Generates DSX-1 compatible pulses with programmable pulse shape using only an external 1:1.36 turns ratio transformer. * Accommodates standard cable types such as ABAM, PIC, and Coax. * Selectable line length and line type for DS1 transmit pulse build-out. * Detects violations of the ANSI T1.403 12.5% pulse density rule over a moving 192 bit window. APPLICATIONS * T1 Channel Service Units (CSU) * T1/E1 Multiplexers and Digital Private Branch Exchanges (PBX) * Digital Access and Cross-Connect Systems (DACS) and Electronic DSX Cross-Connect Systems (EDSX) * T1/E1 Frame Relay Interfaces * T1/E1 ATM Interfaces * T1/E1 ATM Circuit Emulation Interfaces * SONET Add/Drop Multiplexers (ADM) * T1/E1 Test and Performance Monitoring Equipment BLOCK DIAGRAM Transmitter PRSM PRBS Detector and Error Counter IBCD In-band Loopback Code Detector RECEIVE SECTION * Provides dual- or single-rail digital PCM outputs. * Supports reception of G.703 signals with up to 6 dB attenuation and reception of DSX-1 compatible signals using an external 1:2 turns ratio transformer and passive components. * Provides Loss Of Signal (LOS) and Alarm Indication Signal (AIS) alarm detection. Detects violations of the ANSI T1.403 12.5% pulse density rule over a moving 192 bit window. * Minimum sensitivity of 75 mV with a 1:2 turns ratio transformer allows for terminating or bridged performance monitoring applications. * Accommodates up to 0.4 UI peak-topeak, high frequency jitter as required by AT&T TR 62411. TDD/TDP[4:1] TDN[4:1] TCLK[4:1] PRSG PRBS Generator XIBC In-band Loopback Code Generator LCODE AMI/B8ZS/ HDB3 Line Encoder DJAT Digital Jitter Attenuator XPLS Analog Pulse Generator TXTIP[4:1] TXRING[4:1] TC[4:1] XCLK/VCLK RSTB A[8:0] TOPS Timing Options D[7:0] WRB RDB CSB ALE INTB XIBC In-Band Loopback Code Generator PRSG PRBS Generator CDRC Clock and Data Recovery RSLC Analog Pulse Slicer MPIF Microprocessor Interface CLK08X/CLK01X Receiver RXTIP[4:1] RXRING[4:1] RC[4:1] RDD/RDP/SDP[4:1] RLCV/RDN/SDN[4:1] DJAT Digital Jitter Attenuator RCLKO[4:1] RDUAL TDUAL DCR Hardware Control Signals IBCD In-band Loopback Code Detector LCV_PMON Line Code Violation Counter PRSM PRBS Detector and Error Counter TRSTB TMS TDI TCK TDO IEEE P1149.1 JTAG Test Access Port PMC-1941034(R6) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE (c) Copyright PMC-Sierra, Inc. 2001 Advance PM4314 QDSX Quad T1/E1 Line Interface Unit TYPICAL APPLICATIONS 4 PM4314 QDSX Quad T1/E1 LIU PM4344 TQUAD Quad T1 Framer PM6344 EQUAD Quad E1 Framer FM7366 FREEDM-8TM Frame Engine and Datalink Manager Processor (Fully Channelized) 4 PM4314 QDSX Quad T1/E1 LIU 4 PM4314 QDSX Quad T1/E1 LIU PM4388 TOCTL Octal T1 Framer PM6388 EOCTL Octal E1 Framer PCI Bus Packet Memory (Mixed Channelized and Unchannelized) 1.544 MHz Transmit Reference Clock DSX-1 or E1 Analog Interfaces PM4314 QDSX Quad T1/E1 LIU PM7344 S/UNI-MPHTM Quad T1/E1 Multi-PHY UserNetwork Interface UTOPIA or SCI-PHYTM Multi-PHY ATM Cell Bus Crystal Oscillator Clock 37.056 MHz Or 12.352 MHz Generic Microprocessor Bus Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: +1.604.415.6000 Fax: +1.604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-1941034(R6) (c) Copyright PMC-Sierra, Inc. 1998. All rights reserved. FREEDM-8, SATURN, SCI-PHY, and S/UNI-MPH are trademarks of PMC-Sierra, Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE |
Price & Availability of 1941034
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