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PD- 91843A
IRLBL1304
HEXFET(R) Power MOSFET
l l l l l l l
>1mm lower profile than D2Pak Same footprint as D2pak Logic Level Gate Surface mount Ultra Low On-Resistance Fully Avalanche Rated 50% greater current in typ. application condition vs. D2Pak
D
VDSS = 40V
G S
RDS(on) = 0.0045 ID = 185A
Description
The HEXFET(R) MOSFET is the most popular power MOSFET in the world. This particular HEXFET(R) MOSFET is in the SuperD2PakTM and has the same outline and pinout as the standard D 2Pak but has increased current handling capability and >1mm lower profile. This makes it ideal to reduce component count in multiparallel D2Pak operation, reduce system power dissipation or upgrade existing design. This package has also been designed to meet automotive qualification standard Q101 and can be used with normal surface mouting equipment and has the same temperature profile and recommendations as the commonly used D 2Pak.
Super-D2PakTM
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
185, pkg limited to 95A* 130, pkg limited to 95A* 740 300 2.0 16 1160 100 30 5.0 -55 to + 175 260 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Typ.
--- ---
Max.
0.50 40
Units
W
* Current capability in normal application, see Fig.9.
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2/16/00
IRLBL1304
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. Typ. Max. Units Conditions 40 --- --- V VGS = 0V, ID = 250A --- 0.043 --- V/C Reference to 25C, ID = 1mA --- --- 0.0045 VGS = 10V, ID = 110A --- --- 0.0065 VGS = 4.5V, ID = 93 1.0 --- --- V VDS = VGS, ID = 250A 120 --- --- S VDS = 25V, ID = 110A --- --- 25 VDS = 40V, VGS = 0V A --- --- 250 VDS = 32V, VGS = 0V, TJ = 150C --- --- 100 VGS = 16V nA --- --- -100 VGS = -16V --- --- 140 ID = 110A --- --- 39 nC VDS = 32V --- --- 79 VGS = 4.5V, See Fig. 6 and 13 --- 21 --- VDD = 20V --- 350 --- ID = 110A --- 45 --- RG = 0.9 --- 103 --- RD = 0.18,See Fig. 10 Between lead, --- 2.0 --- nH 6mm (0.25in.) G from package --- 5.0 --- and center of die contact --- 7660 --- VGS = 0V --- 2150 --- pF VDS = 25V --- 460 --- = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 185 showing the A G integral reverse --- --- 740 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 110A, VGS = 0V --- 100 150 ns TJ = 25C, IF = 110A --- 250 380 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Caculated continuous current based on maximum allowable
junction temperature; for recommended current-handling of the package refer to Design Tip # 93-4.
Starting TJ = 25C, L = 230H
RG = 25, IAS = 100A. (See Figure 12)
ISD 110A, di/dt 170A/s, VDD V(BR)DSS,
TJ 175C
Uses IRLBA1304/P data and test conditions.
2
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IRLBL1304
1000
VGS 15V 10V 5.0V 4.5V 3.5V 3.0V 2.7V BOTTOM 2.5V TOP
1000
I D , Drain-to-Source Current (A)
100
10
1
I D , Drain-to-Source Current (A)
VGS 15V 10V 5.0V 4.5V 3.5V 3.0V 2.7V BOTTOM 2.5V TOP
100
2.5V
20s PULSE WIDTH TJ = 175 C
1 10 100
2.5V
0.1 0.1 1
20s PULSE WIDTH TJ = 25 C
10 100
10 0.1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
TJ = 175 C
R DS(on) , Drain-to-Source On Resistance (Normalized)
TJ = 25 C
ID = 170A
I D , Drain-to-Source Current (A)
2.0
100
1.5
10
1.0
1
0.5
0.1 2.0
V DS = 25V 20s PULSE WIDTH 4.0 6.0 8.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRLBL1304
12000
VGS , Gate-to-Source Voltage (V)
10000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
15
ID = 110A VDS = 32V VDS = 20V VDS = 8V
12
C, Capacitance (pF)
8000
Ciss
9
6000
6
4000
Coss
2000
3
Crss
0 1 10 100 0 0 40 80
FOR TEST CIRCUIT SEE FIGURE 13
120 160 200
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD , Reverse Drain Current (A)
TJ = 175 C
I D , Drain Current (A)
1000 10us
100
100us
TJ = 25 C
100 1ms
10 0.4
V GS = 0 V
0.6 0.8 1.0 1.2 1.4 1.6 1.8
10 1
TC = 25 C TJ = 175 C Single Pulse
10
10ms
100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRLBL1304
200
VDS
LIMITED BY PACKAGE
RD
VGS
160
D.U.T.
+
RG
I D , Drain Current (A)
- VDD
120
4.5V
Pulse Width 1 s Duty Factor 0.1 %
80
Fig 10a. Switching Time Test Circuit
40
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLBL1304
3000
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
2500
ID 41A 71A BOTTOM 100A TOP
VDS
L
D R IV E R
2000
RG
20V tp
D .U .T
IA S
1500
+ V - DD
A
1000
0 .0 1
Fig 12a. Unclamped Inductive Test Circuit
500
0 25 50 75 100 125 150 175
V (B R )D SS tp
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
4.5 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRLBL1304
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRLBL1304
Super-D2PakTM Package Outline
Dimensions are shown in millimeters (inches)
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 Data and specifications subject to change without notice. 2/00
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