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(R)
L3000S
HIGH VOLTAGE INTERFACE
TELEPHONE LINE FEEDING WITH DIRECT OR REVERSAL POLARITY EXTRA FEEDING FOR LONG TELEPHONE LINE LINE SENSING ON BOTH WIRES BALANCED RINGING SIGNAL INJECTION HIGH OUTPUT CURRENT CAPABILITY THERMAL OVERLOAD PROTECTION DESCRIPTION The L3000S line interface provides a battery feeding for telephone lines and ringing injection. It contains a state decoder that under external control forces three operational modes (with their options): standby, conversation and ringing. Two pins give information about the line status detected by sensing the line current into the output stage. The IC amplifies the signal entering at pin 6(VIN). Separate ground pins are also provided for BLOCK DIAGRAM
Flexiwatt15
PowerSO20 (slug-down)
PowerSO20 (slug-up)
ORDERING NUMBERS: L3000SX-VC L3000SX-77 L3000SX
the output stages that are referred to battery ground, and for analog signal processing circuits that are referred to analog ground. The L3000S needs only two external components; a resistor to provide internal bias current and a capacitor to filter battery AC components.
December 1998
1/24
L3000S
PIN CONNECTIONS (Top view)
FLEXIWATT15
VBN.C. TIP MNT VB+ BGND VDD VIN VBIM VB-
1 2 3 4 5 6 7 8 9 10
D97TL290
20 19 18 17 16 15 14 13 12 11
VBRING N.C. IL IT C2 C1 REF AGND VB-
VBVBIM VIN VDD BGND VB+ MNT TIP N.C. VB-
10 9 8 7 6 5 4 3 2 1
D94TL125
11 12 13 14 15 16 17 18 19 20
VBAGND REF C1 C2 IT IL N.C. RING VB-
PowerSO20 (Slug-down)
PowerSO20 (Slug-up)
ABSOLUTE MAXIMUM RATINGS
Symbol V b- Vb+ V dd Tj Tstg Negative Battery Voltage Positive Battery Voltage Positive Supply Voltage Max Junction Temperature Storage Temperature Parameter Value - 80 80 140 +6 5 + 150 - 55 to + 150 Unit V V V V V C C
| Vb- |+| Vb+ | Total Battery Voltage Vagnd-Vbgnd Max Voltage between Analog Ground and Battery Ground
2/24
L3000S
OPERATING RANGE
Symbol Tj oper V b- Vb+ V dd Imax Negative Battery Voltage Positive Battery Voltage Positive Supply Voltage Total Line Current (IL + IT) Parameter Operating Temperature Range Min. -40 - 70 0 + 4.5 - 48 + 72 120 Typ. Max. 120 - 24 + 75 130 + 5.5 85 Unit C V V V V mA
| Vb- |+| V b+ | Total Battery Voltage
PIN DESCRIPTION
FLEX. N 1 2 3 4 5 6 7 SO-P. N 3 4 5 6 7 8 9 Name TIP MNT VB+ BGND VDD VIN VBIM Description A line termination output with current capability up to 100mA (Is is the current sourced from this pin). Positive Supply Voltage Monitor. Positive Battery Supply Voltage. Battery ground relative to the VB+ and the VB- supply voltages. It is also the reference ground for TIP and RING signals. Positive Power Supply +5V. 2 wire unbalanced voltage input. Output voltage without current capability, with the following functions: - give an image of the total battery voltage scaled by 40 to the low voltage part. - filter by an external capacitor the noise on VB+ and the VB- . Negative Battery Supply Voltage. Analog Ground. All input signals and the VDD supply voltage must be referred to this pin. Voltage reference output with very low temperature coefficient. The connected resistor sets Internal circuit bias current. Digital signal input (3 levels) that defines device status with pin 12. In thermal overload condition a 240A typ. current is sunk by this pin (*). Digital signal input (3 levels) that defines device status with pin 11. (*) High precision scaled transversal line current signal. IT = 14 17 IL Ia + Ib 100 Ia - Ib 100
8 9 10 11 12 13
1,10,11, 20 12 13 14 15 16
VBAGND REF C1 (NB/BB/RG) C2 (PD/DP/RP) IT
Scaled longitudinal line current signal. IL =
15 -
19 2, 18
RING N.C.
B line termination output with current capability up to 100mA (Ib is the current sunk into this pin). Not connected.
Note: 1) Unless otherwise specified all the diagrams in this datasheet refers to the FLEXIWATT15 pin connection. (*) Truth table for the State Control Inputs C1 and C2.
C1 +3V +3V C2 0V -3V STBY CONV.NP CONV.RP 0V A OPEN BB. NP BB. RP -3V B OPEN RP RING NP RING RP
3/24
L3000S
1)Recommended sequence for power on during automatic testing is: 1) GND; 2) VB-; 3) VDD; 4) VB+. During power off the opposite sequence should be used: 1) VB+; 2) VDD; 3) VB-; 4) GND. 2)In case power on sequence cannot be guaranteed (i.e. not insertion in real application and so on). a shottky diode should be connected between BGND and VB-. The shottky diode characteristics should be: VF < 450mV @ IF = n 15mA, Tamb = 25C VF < 350mV @ IF = n 15mA, Tamb = 50C (TjL3000 = 90C) VF < 245mV @ IF = n 15mA, Tamb = 85C (TjL3000 = 120C) Where n is the number of line sharing the same diode DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, Tamb +25C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol Idd s Iddo Idd DE Ib- s Ib-o Ib
-DE
Parameter Stand-by VDD Supply Current Operation VDD Supply Current Power Denial VDD Supply Current Stand-by VB- Supply Current Operation VB- supply current Power Denial VB- Supply Current Stand-by and Operation VB+ Supply Current Power Denial VB+ Supply Current VB+ Supply Current in Boost Battery VB- Supply Current in Boost Battery VB- Supply Current VB+ Supply Current Voltage Reference Input High Level Input Zero Level Input Low Level Input Bias Current Leakage on Pin1 and Pin15
Test Conditions Pin 11 to +5V Pin 10 Not Connected
Min.
Typ. 1.4 2 2
Max. 1.9 2.8 150 2.5 6.5 50 15 15
Unit mA mA A mA mA A A A mA mA mA mA V V V V A A A
Fig. 1 2 1, 2 1 2 1, 2 1, 2 1, 2 2 2 2 2 2 - - - - -
Pin 11 to +5V Pin 10 Not Connected Pin 11 to +5V Pin 10 Not Connected Pin 11 to AGND Pin 11 to -5V (Note 1) inputs on pins 11, 12 1.20 2 -0.8
5 10
Ib+s Ib+o Ib
+DE
Ib+b Ib-b Ib-r Ib+r Vref V hl V zl Vll |Ilc| Leak 1,15
4.5 6.6 14 12 1.30 0
5.5 8 17 13.5 1.40 +0.8 -2 4
Pin10 = Not Connected Pin1 + Pin15 to VB+ VB+ = +60V,VB- = -60V Pin10 = Not Connected VB+ = +60V,VB- = -60V VP2 = 60V Pin 11 to +5V Pin 11 to 0V -1.1 70 -1.163 -3.08 100 -0.8 71 -1.09 -2.93
30
Leak 2
Leakage on Pin 2
30
-
Vmnt
Monitor VB+ Voltage (Note 2) Battery Image Voltage (Notes 2,4) Input Resistance Max. Capacitor for pin 10 Output Current on pin 13
V V -1.013 -2.78 5 V V K pF A A +15 420
2 2 2 2 - -
Vbim
Pin 11 to +5V Pin 11 to AGND
R2W CL ref |Itm |
Pin 6 Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = Ib = 50mA Vin = -0.5V Pin12 = 0Vor -5V Pin11 = +5V
-15 380
3
950
1050
A
3
4/24
L3000S
DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, Tamb +25C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol |Itm | Parameter Output Current on pin 13 Test Conditions Ia = Ib = 0mA Vin = 0V Pin12 = 0V Pin11 = -5V Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = 15mA Ib = 25mA Vin = -180mV Pin12 = +5Vor 0Vor-5V Pin11 = +5V Ia = 37.5mA Ib = 62.5mA Vin = -0.5V Pin12 = 0Vor -5V Pin11 = +5V Vbt = -70V,Pin12 = 5V Pin11 = 5V VIN = -0.5V VIN = -2V Pin12 = 0 or -5V Pin11 = 5V VIN = 0V VIN= -0.5V VIN = -1V VIN= -2V Pin 12 = 0 or -5V Pin 12 = +5V; Pin 10 = N.C. Pin 12 = +5V Pin 11 = 0V Pin 12 = +5V Pin 11 = 0V Tcase = 150C Min. -10 Typ. Max. 10 Unit A Fig. 3
|Ilm|
Output Current on pin 14
-30 -30
30 30
A A 3 A
65
135
3
182
318
A
3
Vldc
Voltage Between Pins1 and 15 (Notes 3,5)
42
58.5 0 67.5 48 28.5 0 25.6 130 70 30 30 30
V V V V V V V mA mA A A A A
3
63 46 25.5 20.4 90 38 23
Vlrg |Iom |
Voltage Between pins 1 and 15 Maximum Output Current at Pins 1, 15 Maximum Output Current at Pin 1 (A open) Maximum Output Current at Pin 15 (B open RP) Thermal Overload Current from Pin11
4 4A
|Ioma| |Iomb| Ithv
4A 4A -
400
Note 1: Use a voltmeter in series with 10K connected to pins 10 and 9. Note 2: With high impedance voltmeter (>100K). Note 3: 0V max means inversion of pin1 and 15. Note 4: |VBIM| = (|VBTot| -2.8V - 2 VBE) / 40 Where: VBTot = |VB-| for pin11 to +5V; pin 12 to GND or -5V VBTot = |VB+ |+|VB-| for pin 11 to 0V; Pin 12 to GND or -5V. 2 VBE = 1.5V @ Tamb = 25C. Note 5: Vldc = |VBT | -|Vin| 40 - 2.8.
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L3000S
AC ELECTRICAL CHARACTERISTICS(Refer to the test circuits, Tamb +25C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol | GR | Parameter Receiving Gain (note 6) Test Conditions nor.bat IL = 20mA IL = 50mA boo.bat IL = 20mA d | GR | d | GT | THD KITAC Gain Flatness Rx Gain Flatness Tx (note 8) Total Harmonic Distortion of Receiving Signal AC Transversal Current Ratio 300 < f < 3400Hz (note 7, 9) 300 < f < 3400Hz (note 7, 9) f = 1KHz Vab AC 49.5 49.4 -0.2 50 Min. 31.92 31.88 31.74 -0.05 -0.05 Typ. 32.04 32.04 32.04 Max. 32.16 32.20 32.34 +0.05 +0.05 0.3 50.5 50.6 +0.2 dB 5 13 5 3 3 81 75 48 300 < f < 3400Hz f = 3.4KHz on Vab NP, RP f = 3.4KHz on VtAC NP f = 3.4KHz on VtAC RP VIN = 1.550Vrms (16-66Hz) VIN = 1.550Vrms (16-66Hz) Between Pin1 and 15 on Pin13 -102 30 30 40 40 61 4 -75 % % % dB dB dB dB dB dB dB Vrms % dBmp 11 11 12 7 Unit dB dB dB dB dB % Fig. 5 5 5 5A 5A 6
Normal and Reverse @ IL = 20mA,IL = 50mA boo.bat @ IL = 20mA VLine = +3 to -20dBm0 f = 16KHz ILDC = 0 ILDC = 50mA VabAC = 2Vrms VabAC = 5Vrms US Market 1020Hz World Market (300 to 3400Hz)
GT THD TTX
Gain Tracking Rx, Tx (Note 10) Metering Distortion
|Cmlt|
CMRR Longitud. to Transv.
|Cmtl| SVRR SVRR
CMRR Transv. to Longitud. Supply Voltage Rejection Rat. on Vb- Supply Voltage Rejection Rat. on VDD
8 9 10
Vring THD Np
Output Ringing Voltage Ringing Signal Distortion Psophometric Noise
Note 6: |GR| = 20log (|VabAC|/VIN AC|); Note 7: Guaranteed by design; Note 8: d | GT | defines KITAC accuracy vs. frequency. Note 9: Measured respect the value @ f = 1020Hz; Note 10: Gain Tracking Tx defines KITAC accuracy vs. level.
6/24
L3000S
DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, T j = 90C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol Idd s Iddo Idd DE Ib- s Ib-o Ib
-DE
Parameter Stand-by VDD Supply Current Operation VDD Supply Current Power Denial VDD Supply Current Stand-by VB- Supply Current Operation VB- supply current Power Denial VB- Supply Current Stand-by and Operation VB+ Supply Current Power Denial VB+ Supply Current VB+ Supply Current in Boost Battery VB- Supply Current in Boost Battery VB- Supply Current VB+ Supply Current Voltage Reference Input High Level Input Zero Level Input Low Level Input Bias Current
Test Conditions
Min.
Typ.
Max. 1.95
Unit mA mA A mA mA A A A mA mA mA mA V V
Fig. 1 2 1, 2 1 2 1, 2 1, 2 1, 2 2 2 2 2 2 - - - - - -
Pin 11 to +5V Pin 10 Not Connected
2.9 240 2.6
Pin 11 to +5V Pin 10 Not Connected Pin 11 to +5V Pin 10 Not Connected Pin 11 to AGND
6.7 150 30 30 5.8 8.4
Ib+s Ib+o Ib
+DE
Ib+b Ib-b Ib-r Ib+r Vref V hl V zl Vll |Ilc|
Pin 11 to -5V
17.8 14
(Note 1) inputs on pins 11, 12
1.175 2 -0.8 0
1.425
+0.8 -2
V V A A A
Pin 12 (Note 11) Pin 11
10 60 200
Leak 1,15
Leakage on Pin1 and Pin15
Pin10 = Not Connected Pin1 + Pin15 to VB+ VB+ = +60V,VB- = -60V Pin10 = Not Connected VB+ = +60V,VB- = -60V VP2 = 60V Pin 11 to +5V Pin 11 to 0V Pin 11 to +5V Pin 11 to AGND Pin 6 -1.15 69.8 -1.178 -3.12 100
Leak 2
Leakage on Pin 2
200
A
-
Vmnt
Monitor VB+ Voltage (Note 2) Battery Image Voltage (Notes 2,4) Input Resistance Max. Capacitor for pin 10 Output Current on pin 13
V V -0.998 -2.73 V V K 5 pF A A
2 2 2 2 - -
Vbim
R2W CL ref |Itm |
Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = Ib = 50mA Vin = -0.5V Pin12 = 0Vor -5V Pin11 = +5V Ia = Ib = 0mA Vin = 0V Pin12 = 0V Pin11 = -5V
-20 374
+20 426
3
935
1065
A
3
-13
+13
A
3
7/24
L3000S
DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, T j = 90C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol |Ilm| Parameter Output Current on pin 14 Test Conditions Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = 15mA Ib = 25mA Vin = -180mV Pin12 = +5Vor 0Vor-5V Pin11 = +5V Ia = 37.5mA Ib = 62.5mA Vin = -0.5V Pin12 = 0Vor -5V Pin11 = +5V Vldc Voltage Between Pins1 and 15 (Notes 3,5) Vbt = -70V,Pin12 = 5V Pin11 = 5V VIN = -0.5V VIN = -2V Pin12 = 0 or -5V Pin11 = 5V VIN = 0V VIN= -0.5V VIN = -1V VIN= -2V Min. -35 -45 Typ. Max. +35 +45 Unit A A 3 Fig.
62
138
A
3
176
324
A
3
41.5
59 0 68 48.5 29 0 26.2 134 70 50 50 50
V V V V V V V mA mA A A A
3
62.5 45.5 25 19.9
Vlrg |Iom |
Voltage Between pins 1 and 15 Maximum Output Current at Pins 1, 15 Maximum Output Current at Pin 1 (A open) Maximum Output Current at Pin 15 (B open RP) Pin 12 = 0 or -5V Pin 12 = +5V; Pin 10 = N.C. Pin 12 = +5V Pin 11 = 0V Pin 12 = +5V Pin 11 = 0V
4 4A
86 30
|Ioma| |Iomb|
4A 4A
Note 1: Use a voltmeter in series with 10K connected to pins 10 and 9. Note 2: With high impedance voltmeter (>100K). Note 3: 0V max means inversion of pin1 and 15. Note 4: |VBIM| = (|VBTot| -2.8V - 2 VBE) / 40 Where: VBTot = |VB-| for pin11 to +5V; pin 12 to GND or -5V VBTot = |VB+|+|VB-| for pin 11 to 0V; Pin 12 to GND or -5V. 2 VBE = 1.5V @ Tamb = 25C. Note 5: Vldc = |VBT | -|Vin| 40 - 2.8. Note 11: Due to the analog structure of the thermal sensor connected to pin 11 the input bias current at this pin is not a step function but depends on junction temperature (compare with Ithv parameter at page 5).
8/24
L3000S
AC ELECTRICAL CHARACTERISTICS(Refer to the test circuits, Tj = 90C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol | GR | Parameter Receiving Gain (note 6) Test Conditions nor.bat IL = 20mA IL = 50mA boo.bat IL = 20mA d | GR | d | GT | THD KITAC Gain Flatness Rx Gain Flatness Tx (note 8) Total Harmonic Distortion of Receiving Signal AC Transversal Current Ratio 300 < f < 3400Hz (note 7, 9) 300 < f < 3400Hz (note 7, 9) f = 1KHz Vab AC 49.2 49.1 -0.25 50 Min. 31.82 31.78 31.64 -0.08 -0.08 Typ. Max. 32.26 32.30 32.44 +0.08 +0.08 0.35 50.8 50.9 +0.25 dB 5 13 6 3.5 3.5 72 46 300 < f < 3400Hz f = 3.4KHz on Vab NP, RP f = 3.4KHz on VtAC NP f = 3.4KHz on VtAC RP VIN = 1.550Vrms (16-66Hz) VIN = 1.550Vrms (16-66Hz) Between Pin1 and 15 on Pin13 -101 27 28 40 40 60 5 -74 % % % dB dB dB dB dB dB Vrms % dBmp 11 11 12 7 8 9 10 Unit dB dB dB dB dB % Fig. 5 5 5 5A 5A 6
Normal and Reverse @ IL = 20mA,IL = 50mA boo.bat @ IL = 20mA VLine = +3 to -20dBm0 f = 16KHz ILDC = 0 ILDC = 50mA VabAC = 2Vrms VabAC = 5Vrms World Market (300 to 3400Hz)
GT THD TTX
Gain Tracking Rx, Tx (Note 10) Metering Distortion
|Cmlt| |Cmtl| SVRR SVRR
CMRR Longitud. to Transv. CMRR Transv. to Longitud. Supply Voltage Rejection Rat. on Vb- Supply Voltage Rejection Rat. on VDD
Vring THD Np
Output Ringing Voltage Ringing Signal Distortion Psophometric Noise
Note 6: |GR| = 20log (|VabAC|/VIN AC|); Note 7: Guaranteed by design; Note 8: d | GT | defines KITAC accuracy vs. frequency. Note 9: Measured respect the value @ f = 1020Hz; Note 10: Gain Tracking Tx defines KITAC accuracy vs. level.
9/24
L3000S
DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, -40C < Tj < 0C and 90C < T j < 120C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol Idd s Iddo Idd DE Ib- s Ib-o Ib
-DE
Parameter Stand-by VDD Supply Current Operation VDD Supply Current Power Denial VDD Supply Current Stand-by VB- Supply Current Operation VB- supply current Power Denial VB- Supply Current Stand-by and Operation VB+ Supply Current Power Denial VB+ Supply Current VB+ Supply Current in Boost Battery VB- Supply Current in Boost Battery VB- Supply Current VB+ Supply Current Voltage Reference Input High Level Input Zero Level Input Low Level Input Bias Current
Test Conditions
Min.
Typ.
Max. 2.0
Unit mA mA A mA mA A A A mA mA mA mA V V
Fig. 1 2 1, 2 1 2 1, 2 1, 2 1, 2 2 2 2 2 2 - - - - - 2 2 2 2
Pin 11 to +5V Pin 10 Not Connected
3.0 300 2.7
Pin 11 to +5V Pin 10 Not Connected Pin 11 to +5V Pin 10 Not Connected Pin 11 to AGND
6.9 350 50 50 6.2 8.8
Ib+s Ib+o Ib
+DE
Ib+b Ib-b Ib-r Ib+r Vref V hl V zl Vll |Ilc|
Pin 11 to -5V
18.5 14.5
(Note 1) inputs on pins 11, 12
1.150 2 -0.8
1.450
+0.8 -2
V V A A V V
Pin 12 (Note 11) Pin 11 -1.2 42.6 -1.193 -2.58
30 300
Vmnt
Monitor VB+ Voltage (Note 2)
Pin 11 to +5V Pin 11 to 0V VB+ = +45V Pin 11 to +5V Pin 11 to AGND VB+ = +45V, VB- = -56V Pin 6
Vbim
Battery Image Voltage (Notes 2,4)
-0.983 -2.2
V V
R2W CL ref |Itm |
Input Resistance Max. Capacitor for pin 10 Output Current on pin 13
100 5
K pF A A
- -
Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = Ib = 0mA Vin = 0V Pin12 = 0V Pin11 = -5V
-25 370
+25 430
3
-15
+15
A
3
10/24
L3000S
DC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, -40C < Tj < 0C and 90C < T j < 120C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol |Ilm| Parameter Output Current on pin 14 Test Conditions Ia = Ib = 0mA Ia = Ib = 20mA Vin = -180mV Pin12 = +5Vor0V or -5V Pin11 = +5V Ia = 15mA Ib = 25mA Vin = -180mV Pin12 = +5Vor 0Vor-5V Pin11 = +5V Vldc Voltage Between Pins1 and 15 (Notes 3,5) Vbt = -70V,Pin12 = 5V Pin11 = 5V VIN = -0.5V VIN = -2V Pin12 = 0 or -5V Pin11 = 5V VIN = 0V VIN= -0.5V VIN = -1V VIN= -2V VB+ = +45V, VB- = -56V Pin 12 = 0 or -5V Pin12 = +5V P1 or P15 to GND Pin12 = +5V P1 or P15 to VBMin. -40 -50 Typ. Max. +40 +50 Unit A A 3 Fig.
60
140
A
3
41
59.5 0 68.5 49 29.4 0 25 140 70 70
V V V V V V V mA mA mA
3
62 45 24.6 17 70 30 20
Vlrg |Iom |
Voltage Between pins 1 and 15 Maximum Output Current at Pins 1, 15
4 4A
Note 1: Use a voltmeter in series with 10K connected to pins 10 and 9. Note 2: With high impedance voltmeter (>100K). Note 3: 0V max means inversion of pin1 and 15. Note 4: |VBIM| = (|VBTot| -2.8V - 2 VBE) / 40 Where: VBTot = |VB-| for pin11 to +5V; pin 12 to GND or -5V VBTot = |VB+|+|VB-| for pin 11 to 0V; Pin 12 to GND or -5V. 2 VBE = 1.5V @ Tamb = 25C. Note 5: Vldc = |VBT | -|Vin| 40 - 2.8. Note 11: Due to the analog structure of the thermal sensor connected to pin 11 the input bias current at this pin is not a step function but depends on junction temperature (compare with Ithv parameter at page 5).
11/24
L3000S
AC ELECTRICAL CHARACTERISTICS (Refer to the test circuits, -40C < Tj < 0C and 90C < Tj < 120C, VB+ = 72V, VBT = -48V, VDD = +5V)
Symbol | GR | d | GR | d | GT | THD KITAC GT THD TTX Parameter Receiving Gain (note 6) Gain Flatness Rx Gain Flatness Tx (note 8) Total Harmonic Distortion of Receiving Signal AC Transversal Current Ratio Gain Tracking Rx, Tx (Note 5) Metering Distortion Test Conditions nor.bat IL = 25mA 300 < f < 3400Hz (note 7, 9) 300 < f < 3400Hz (note 7, 9) f = 1KHz Vab AC 49 -0.3 Min. 31.82 -0.1 -0.1 Typ. Max. 32.26 +0.1 +0.1 0.4 51 +0.3 dB Unit dB dB dB % Fig. 5 5 5A 5A 6 5 13 4 70 45 300 < f < 3400Hz f = 3.4KHz on Vab NP, RP f = 3.4KHz on VtAC NP f = 3.4KHz on VtAC RP VB+ = +45V, VB- = -56V VIN = (16-66Hz)1Vrms VB+ = +45V, VB- = -56V VIN = (16-66Hz)1Vrms Rloop = 450 + 3.4F Between Pin1 and 15 on Pin13 -94 22 27 40 40 38.5 40.0 4.5 % dB dB dB dB dB dB Vrms % 11 11 7 8 9 10
Normal and Reverse @ IL = 20mA, VLine = +3 to -20dBm0 f = 16KHz ILDC = 50mA VabAC = 2Vrms World Market (300 to 3400Hz)
|Cmlt| |Cmtl| SVRR SVRR
CMRR Longitud. to Transv. CMRR Transv. to Longitud. Supply Voltage Rejection Rat. on Vb- Supply Voltage Rejection Rat. on VDD
Vring THD
Output Ringing Voltage Ringing Signal Distortion
Np
Psophometric Noise
-65
dBmp
12
Note 6: |GR| = 20log (|VabAC|/VIN AC|); Note 7: Guaranteed by design; Note 8: d | GT | defines KITAC accuracy vs. frequency. Note 9: Measured respect the value @ f = 1020Hz; Note 10: Gain Tracking Tx defines KITAC accuracy vs. level.
12/24
L3000S
TEST CIRCUITS Figure 1: Stand-by Supply Current
Figure 2: Conversation Supply Voltage
13/24
L3000S
Figure 3: DC Transversal and Longitudinal Current
Figure 4: DC Voltage Between Pins 1 and 15 in Ringing Operation Mode
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L3000S
Figure 4A: Maximum Output Current at Pin 1 and 15
TEST TIP to GND NBNP TIP to GND POWER D. TIP to GND LOOP OP. A OPEN TIP to VB- NBNP TIP to VB- POWER D. TIP to VB- LOOP OP. A OPEN
K1 OFF OFF ON OFF OFF OFF ON OFF
K2 ON ON ON ON ON ON ON ON
K3 OFF OFF OFF OFF OFF OFF OFF OFF
V6 -0.3V -0.3V -0.3V -0.3V -0.3V -0.3V -0.3V -0.3V
V1 0V 0V -1V -1V -48V -48V -48V -48V
V15 - - - - - - - -
V11 5V 5V 5V 0V 5V 5V 5V 0V
V12 0V 5V 5V 5V 0V 5V 5V 5V
Example of test condition for I om and Ioma on Pin 1. For Pin 15 must be changed K2 with K3 and V1 with V15. For B open V11 must be -5V instead of 0V. Figure 5: Receving Gain
15/24
L3000S
Figure 5A: THD and Tx Gain Flatness (and linearity)
Figure 6: AC Transversal Current
16/24
L3000S
Figure 7: Common Mode Rejection Longitudinal to Transversal
Figure 8: Common Mode Rejection Transversal to Longitudinal
17/24
L3000S
Figure 9: Supply Voltage Rejection Ratio
Figure 10: Supply Voltage Rejection Ratio
18/24
L3000S
Figure 11: Output Ringing Voltage
Figure 12: PsophometricNoise
19/24
L3000S
Figure 13: THDTTX Metering
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L3000S
DIM. A A2 a1 A4 A5 b c D (1) D1 D2 E e e3 E1 (1) E2 E3 G h L L1 N R R1 S V mm TYP. 3.15 inch TYP. 0.124
MIN. 3 0.1 0.8 0.15 0.4 0.23 15.8 9.4 0.9 13.9 1.12 10.9 2.7 5.8 0 0.8
0.2
1.27 11.43
MAX. 3.7 3.3 0.25 1 0.25 0.53 0.32 16 9.8 1.1 14.5 1.42 11.1 2.9 6.2 0.1 1.1 1.1
MIN. 0.118 0.004 0.031 0.006 0.016 0.009 0.622 0.370 0.035 0.547 0.044 0.429 0.106 0.228 0.000 0.031
0.008
0.050 0.450
MAX. 0.145 0.130 0.010 0.039 0.010 0.021 0.012 0.630 0.385 0.043 0.570 0.056 0.437 0.114 0.244 0.004 0.043 0.043
OUTLINE AND MECHANICAL DATA
1.6 10 (max) 0.6 0.5 0 (min.)8 (max.) 5 (min.)7 (max.)
0.063 0.024 0.020
(1) "D and E1" do not include mold flash or protrusions. - Mold flash or protrusions shall not exceed 0.15 mm (0.006"). - Critical dimensions: "E", "a1", "e", and "G"
PowerSO-20 (Slug-up)
N
N A b e3 h x 45 e DETAIL A
E3 (slug width)
c a1 E
1
10
DETAIL A E2 E1
0.35 Gage Plane -C-
S D1(slug widt ) h
L
SEATING PLANE GC
20
11
(COPLANARITY)
PSO20DME
D
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L3000S
DIM. A a1 a2 a3 b c D (1) D1 E e e3 E1 (1) E2 E3 G H h L N S T mm TYP. inch TYP.
MIN. 0.1 0 0.4 0.23 15.8 9.4 13.9
MAX. 3.6 0.3 3.3 0.1 0.53 0.32 16 9.8 14.5
MIN. 0.004 0.000 0.016 0.009 0.622 0.370 0.547
MAX. 0.142 0.012 0.130 0.004 0.021 0.013 0.630 0.386 0.570
OUTLINE AND MECHANICAL DATA
1.27 11.43 10.9 5.8 0 15.5 0.8 11.1 0.429 2.9 6.2 0.228 0.1 0.000 15.9 0.610 1.1 1.1 0.031 10 (max.) 8 (max.) 10
0.050 0.450 0.437 0.114 0.244 0.004 0.626 0.043 0.043
JEDEC MO-166
0.394
(1) "D and F" do not include mold flash or protrusions. - Mold flash or protrusions shall not exceed 0.15 mm (0.006"). - Critical dimensions: "E", "G" and "a3"
PowerSO20
(Slug-down)
N
N a2 b e A
R
c DETAIL B a1 E DETAIL A
DETAIL A e3 H
lead
D a3 DETAIL B
20 11
Gage Plane 0.35
slug
-C-
S E2 T E1 BOTTOM VIEW
L
SEATING PLANE GC (COPLANARITY)
E3
1 10
h x 45
PSO20MEC
D1
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L3000S
DIM. A B C E F F1 G G1 H H1 H2 H3 L L1 L2 L3 L4 L5 N O R R2 R3 R4 V V1 V2 V3 mm TYP. 4.5 1.9 1.4 0.39 inch TYP. 0.177 0.075 0.055 0.015
MIN. 4.45 1.8 0.37
MAX. 4.65 2 0.42 0.57 0.97 2.1 26.85 29.3
MIN. 0.175 0.071 0.014
MAX. 0.183 0.079 0.016 0.022 0.038 0.083 1.057 1.153
OUTLINE AND MECHANICAL DATA
1.7 26.35 28.9
19.25 8.7 15.5 7.7
1.9 26.6 29.23 17 12.8 0.8 19.65 9.1 15.7 7.85 5 2.7 2.2 2 1.7 0.3 1.25 0.5
0.067 1.037 1.138
20.05 9.5 15.9 7.95
0.758 0.342 0.610 0.303
0.075 1.048 1.151 0.670 0.504 0.031 0.774 0.358 0.618 0.309 0.197 0.106 0.096 0.078 0.067 0.012 0.049 0.02
0.789 0.626 0.313
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt15
V3 H3 O L4
H H1 H2 R3 R4 V1 R2
N
A
L2 L3
R V2 L1 R2
L V1
G V
G1
F
F1
E
B C V
FLEX15ME
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L3000S
ESD - The STMicroelectronics Internal Quality Standards set a target of 2 KV that each pin of t he device should withstand in a series of tests based on the Human Body Model (MIL-STD 883 Method 3015): with C = 100pF; R = 1500 and performing 3 pulses for each pin versus VCC and GND. Device characterization showed that, in front of the STMicrolectronics Internaly Quality Standards, all pins of L3000S withstand at least 1kV. The above points are not expected to represent a pratical limit for the correct device utilization nor for its reliability in the field. Nevertheless they must be mentioned in connection with the applicability of the different SURE 6 requirements to L3000S.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved PowerSO-20TM is a Trademark of the STMicroelectronics STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
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