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| CS5525 CS5526 16-Bit/20-Bit Multi-Range ADC with 4-Bit Latch The following information is based on technical datasheet: DS202PP5 AUG `97 Please contact Cirrus Logic: Crystal Semiconductor Products Division for further product information. &5<67$/6(0,&21'8&725 352'8&76 ',9,6,21 352'8&7 ,1)250$7,21 Copyright (c) Cirrus Logic, Inc. 1998 (All Rights Reserved) PI202PP3 JAN `98 CS5525 CS5526 Features 16/20-Bit Multi-Range ADC w/ 4-Bit Latch Features q Delta-Sigma A/D Converter - Linearity Error: 0.0015%FS - Noise Free Resolution: 18-bits q Bipolar/Unipolar Input Ranges - 25 mV, 55 mV, 100 mV, 1 V, 2.5 V and 5 V q Chopper Stabilized Instrumentation Amplifier q On-Chip Charge Pump Drive Circuitry q 4-Bit Output Latch q Simple three-wire serial interface - SPITM and MicrowireTM Compatible - Schmitt Trigger on Serial Clock (SCLK) q Programmable Output Word Rates - 3.76 Hz to 202Hz (XIN = 32.768 kHz) - 11.47 Hz to 616 Hz (XIN = 100 kHz) q Output Settles in One Conversion Cycle q Simultaneous 50/60 Hz Noise Rejection q System and Self-Calibration with Read/Write Registers q Single +5 V Analog Supply +3.0 V or +5 V Digital Supply q Low Power Mode Consumption: 4 mW - 1.8 mW in 1 V, 2.5 V, and 5 V Input Ranges PI202PP3 JAN `98 1 CS5525 CS5526 Description Description The 16-bit CS5525 and the 20-bit CS5526 are highly integrated A/D converters which include an instrumentation amplifier, a PGA (programmable gain amplifier), eight digital filters, and self and system calibration circuitry. The converters are designed to provide their own negative supply which allows their on-chip instrumentation amplifiers to measure bipolar ground-referenced signals 100 mV. By directly supplying NBV with -2.5 V and with VA+ at 5 V, 2.5 V signals (with respect to ground) can be measured. The digital filters provide programmable output update rates between 3.76 Hz to 202 Hz (XIN = 32.768 kHz). Output word rates can be increased by approximately 3X by using XIN = 100 kHz. Each filter is designed to settle to full accuracy for its output update rate in one conversion cycle. The filters with word rates of 15 Hz or less (XIN = 32.768 kHz) reject both 50 and 60 Hz (3 Hz) line interference simultaneously. Low power, single conversion settling time, programmable output rates, and the ability to handle negative input signals make these single supply products ideal solutions for isolated and non-isolated applications. VA+ AGND VREF+ VREF- DGND Digital Filter VD+ AIN+ AINNBV A0 A1 A2 A3 + X20 - Programmable Gain Differential 4th Order Delta-Sigma Modulator Calibration Register Control Register Output Register CS SCLK SDI SDO Latch Calibration Memory Calibration C Clock Gen. CPD XIN XOUT 2 PI202PP3 JAN `98 CS5525 CS5526 Overview Overview The CS5525 and CS5526 are 16 and 20-bit A/D converters respectively, employing the Delta-Sigma topology. They are highly integrated with an onchip chopper stabilized instrumentation amplifier, programmable gain amplifier, charge pump drive circuitry and negative bias voltage input all operating from a single +5 V supply. A simple programming structure and 3-wire SPITM and MicrowireTM compatible interface enables selectable output word rates, system/self-calibration with read/write registers and the ability to control external portions of the application circuit via the on-chip 4-bit output latch. FAQs 1) A: Do you have a four channel part? Not at this time, but we have plans to do a multi-channel product Q4 `97. We also have 4 digital output lines which can be used to control either switches or a multiplexer through the ADC's serial port, thus eliminating the use of an extra port on the system mC and additional opto-isolators in isolated applications. How does the 4-bit digital latch on a DS ADC allow me to change channels? The CS5525 and CS5526 as well as the CS5504 family of ADC's are designed to settle in one conversion cycle. This means a mux can be switched from channel-to-channel with every conversion while maintaining resolution and accuracy. What determines the input span of the converter? Performing a full scale gain calibration, or modifying the reference voltage. For example, if the reference voltage is reduced by 50% the default input ranges scale by one half. Example: Vref = 2.5 V, Vin = 25 mV to 5 V and Vref = 1.25 V, Vin = 12.5 mV to 2.5 V. How does the output word rate affect the ADC's bandwidth? 2) A: 3) A: 4) PI202PP3 JAN `98 3 CS5525 CS5526 FAQs A: The input bandwidth is limited to 1/2 the selected output word rate due to the Nyquist theory of sampling. Example: With the default 15 Hz output word rate the available signal bandwidth of the ADC is 7.5 Hz. What is recommended if I need more or less bandwidth than is provided by the on-chip digital filter? Use an external clock between 30 KHz and 100 KHz to scale the digital filters corner frequency accordingly. Example: Using a 3x clock = 3x32.768 kHz = 3 x the word rate = 3 x 3.76 Hz to 3 x 202 Hz = 11.47 Hz to 616 Hz. How fast can the converter shift data from its serial port? Up to 2 Mhz. How does the instrumentation amplifier's chopping frequency affect the converter's input impedance and input current? The input impedance of the converter is a dynamic impedance and depends on whether the instrumentation amplifier is engaged or not. For the lower ranges (25 mV, 55 mV, 100 mV), the instrumentation amplifier is engaged setting the input impedance to 1/fC (where C is 2 pF, and f is the chopping frequency, either 256 or 32,768). A typical input impedance for the lower ranges is 1900 MW (with f = 256, and C = 2 pF). For the higher ranges (1 V, 2.5 V, and 5 V), the amplifier is bypassed leaving an equivalent input impedance of 1/fC where C is 32 pF and f is either 256 or 32,768. A typical input impedance for the higher ranges is 120 MW (with f = 256 and C = 2 pF). The input current is a dynamic current and also depends on whether the instrumentation amplifier is engaged or not. For the lower ranges (25 mV, 55 mV, 100 mV), the input current is fVosC (where Vos is the offset of the instrumentation amplifier, typically less than 40 mV, f is the chopping frequency, either 256 or 32,768, and C is 2 pF). A typical input current for the lower ranges is 100 pA. For the higher ranges (1 V, 2.5 V, and 5 V), the input current is [(VAIN+)-(VAIN-)]fC where (VAIN+)- 5) A: 6) A: 7) A: 4 PI202PP3 JAN `98 CS5525 CS5526 FAQs (VAIN-) is the voltage between AIN+ and AIN-, f is either 256 or 32,768, and C is 32 pF. A typical input current for the higher ranges is 1.2 A/V. 8) A: When reading the conversion data I get all zeroes no matter what the analog signal is. Please explain why. Check the voltage between pins 19 and 20 (VREF+ and VREF-). If it is zero, the converter will compute all zeros because the digital output word represents the ratio of the input signal to the voltage reference. Is calibration required to use the converter? When the CS5525/26 is reset, the registers are set to known values. If the signal to be measured by the converter is within the nominal range, the converter can perform conversions without the need for calibrations. Errors in the system remain present when calibration is not performed, however, this may be acceptable if the errors are insignificant to the measurement or if the errors are removed by some other means, such as software and registers in the microcontroller. 9) A: 10) How often do I need to recalibrate? A: To answer this question one must ask: 1) What accuracy is required from the A/D converter? 2) What effects will temperature changes have upon the entire circuit, including components outside the A/D? To obtain optimum calibration accuracy, a calibration should be performed approximately one minute after power is applied to allow the chip to reach thermal equilibrium. A higher accuracy measurement requirement will generally require calibrations more often, because, after the initial calibration has been performed, the converter is subject to some drift if the operating temperature changes. Typical offset drift and gain drift are given in the data sheet tables. The observed drift in the application circuit may be considerably greater due to parasitic thermocouple effects and gain drift caused by the limited tempco tracking of the external resistors. Once an estimate of drift is determined for the entire application circuit (drift will usually be dominated by error sources external to the converter), an assessment of PI202PP3 JAN `98 5 CS5525 CS5526 FAQs how it affects measurement accuracy as temperature changes can be made. Once the amount of drift is known, you can determine if a new calibration is required. A good rule of thumb is to recalibrate the converter (or system) with every ten degrees of ambient temperature change. 11) What do the numbers in the calibration registers actually mean? A: There are two internal read/write calibration registers in the CS5525/26 (offset, and gain). One LSB in the offset register is 2-24 proportion of the input span (bipolar span is 2 times the unipolar span). The MSB in the offset register determines if the offset that is to be trimmed is either positive or negative. The converter can typically trim 50% of the input span. The gain register spans from 0 to (2 - 2-23). The decimal equivalent meaning of the gain register is: D = b020+ b12-1 + b22-2 + b32-3 + ... + bN2-N where the binary numbers have a value of either zero or one. After a gain calibration has been performed, the numeric value in the gain register should not exceed the range of 0.5 to 2.0 (decimal) [400000(Hex) to FFFFFF(Hex)]. 12) How can the gain be calibrated if a full-scale signal is not available? A: The CS5525/26 can be gain calibrated with some input signal other than full scale. For example, when the converter is reset, the gain register's calibration word is 1.0 (decimal). If a signal representing ten percent of full scale reads three percent less than it should, the value in the gain register can be scaled up by three percent. Gain accuracy can be improved if output words are averaged while using this technique. Use caution when a calibration signal less than full scale is being used. If the transfer function of the transducer being used to generate the ten percent signal happens to have a major nonlinearity at the point at which calibration is being performed, it will cause the rest of the transfer function to be incorrect. 13) Why does the offset move when the CS5525/26 with a 2.5 V reference, is calibrated several times? What can be done to prevent this? 6 PI202PP3 JAN `98 CS5525 CS5526 FAQs A: The CS5526 is a 20-bit ADC with inherent Gaussian thermal and quantization noise associated with each conversion. Therefore, every time the converter is calibrated, a different offset calibration output has a chance of occurring. By averaging conversions, the peak-to-peak noise can be reduced by a factor of 1/sqrt(n) (where n is the number of samples taken). The offset register can be accessed after calibration, and the offset uncertainty of a converter can almost be eliminated (to 1 code) by averaging. The CS5525 (16-bits) always has 1 count of variability, even if averaged, because the noise and calibration can occur at a boundary between two codes. If the calibration code is on the boundary the random noise could toggle the offset between the two codes. 14) Is a different calibration required for each gain getting? A: For maximum accuracy, calibrations should be performed for offset and gain for each gain setting. If a factory calibration is performed using a system calibration, the offset and gain register contents can be read by the system microcontroller and stored in EEPROM. These same calibration words can then be uploaded into the offset and gain registers of the converter when power is re-applied to the system, or when the gain range is changed. 15) What is the advantage of performing calibrations at lower output word rates? A: Calibrations are performed at the output word rate selected by the WR2WR0 bits of the configuration register. Since higher word rates result in conversion words with more peak-to-peak noise, it is better to calibrate at lower output word rates. To minimize the digital noise near the device, the user should wait for each calibration step to be completed before reading or writing to the serial port. 16) How can I get the best noise performance from the CS5525/26? A: Use the bipolar mode or increase the reference voltage, since each of these increase the size of the LSB. PI202PP3 JAN `98 7 CS5525 CS5526 Ordering Information 17) If the charge pump is engaged, how do I ensure that the converter and its external components are intrinsically safe? A: Intrinsic safety prohibits the use of electrolytic (or bipolar) capacitors thus limiting the use of certain size capacitors. Although a 10 F cap. is recommended for the charge pump, two 0.47 F ceramic caps in parallel can be used. 18) What benefit does an evaluation board offer? A: The CDB5525/26 evaluation board saves time and money over prototyping. The preassembled board comes equipped with an 80C51 microcontroller and a 9-pin cable to link the evaluation board to a PC-compatible computer. The evaluation system also includes software which provides easy access to the internal registers of the converter and displays the converter's time domain, frequency domain and noise histogram performance. Ordering Information CS5525-AP CS5526-BP CS5525-AS CS5526-BS -40C to +85C -40C to +85C -40C to +85C -40C to +85C 20-pin PDIP 20-pin PDIP 20-pin SSOP 20-pin SSOP For further information on Crystal products, please visit our website "www.crystal.com" or call our literature department (800) 888-5016 ext. 3594 or (512) 912-3594 for data sheets and application notes. 8 PI202PP3 JAN `98 Sales Office and Applications Support UNITED STATES Sales Office and Applications Support: WESTERN AREA Cirrus Logic Crystal Semiconductor Div. 50 Airport Pkwy. San Jose, CA 95110 Ph: 408-437-7743 FAX: 408-437-4943 Cirrus Logic Crystal Semiconductor Div. 6 Venture, Ste. 100 Irvine, CA 92718 Ph: 714-453-5910 FAX: 714-453-5914 EUROPE Sales Office and Applications Support: Cirrus Logic France Immeuble Andre Malraux 93561 Rosny s/s Bois CEDEX, France Ph: +33(148)122812 FAX: +33(148)122810 Cirrus Logic Crystal Semiconductor (UK) Ltd. Spectrum Point, 279 Farnborough Rd., Farnborough, Hampshire GU14 7LS, United Kingdom Ph: +44(0)1252372762 FAX: +44(0)1252372763 Cirrus Logic GmbH Muehlfelder-Strasse 2 D-82211 Herrsching, Germany Ph: +49(08152)92460 FAX: +49(08152)924699 KOREA Cirrus Logic, Korea Co., Ltd. Rm 1302 SangKyung Bldg., 82421 YeokSam-Dong, KangNam-Ku, Seoul, Korea Ph: +82(2)565-8561 FAX: +82(2)565-8565 SINGAPORE Cirrus Logic Crystal International 6 Kaki Bukit Ave. 1, Ste. 03-03 Singapore 417940 Ph: +65-743-4111 FAX: +65-742-4111 TAIWAN Cirrus Logic International Ltd. Taiwan Branch 10F, No.214 Tun Hwa North Rd. Taipei, Taiwan R.O.C. Ph: +886(2)2718-4533 FAX: +886(2)2718-4526 CENTRAL AREA Cirrus Logic Crystal Semiconductor Div. 14205 Burnet Rd., Ste. 400 Austin, TX 78728 Ph: 512-255-8893 FAX: 512-255-0733 EASTERN AREA Cirrus Logic Crystal Semiconductor Div. 5511 Capital Center Dr., Ste. 103 Raleigh, NC 27606 Ph: 919-859-5393 FAX: 919-859-5334 Cirrus Logic 10 New England Business Center, Ste. 100 Andover, MA 01810 Ph: 978-794-9138 FAX: 978-794-9998 Cirrus Logic Crystal Semiconductor Div. 10440 Little Patuxent Pkwy., Ste. 300 Columbia, MD 21044-3559 Ph: 410-740-5654 FAX: 410-740-6961 JAPAN FAR EAST Sales Office and Applications Support: CHINA Cirrus Logic International Ltd. A-1403, Qiancun Commercial Mansion Beijing, China 100029 Ph: (8610)6443-0783 Ph: (8610)6443-0784 Ph: (8610)6443-0785 FAX: (8610)6443-0786 HONG KONG Cirrus Logic International Ltd. 1203 Park Tower 15 Austin Rd., Tsimshatsui Kowloon, Hong Kong Ph: (852)2376-0801 FAX: (852)2375-1202 Sales Office and Applications Support: Cirrus Logic K.K. Shinjuku Green Tower, Bldg. 26F 6-14-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo, 160 Japan Ph: +81(03)3340-9111 FAX: +81(03)3340-9120 CRYSTAL SEMICONDUCTOR PRODUCTS DIVISION PO BOX 17847 4210 S. INDUSTRIAL DRIVE AUSTIN, TEXAS 78744 512.445.7222 / 800.888.5016 FAX: 512.445.7581 WORLDWIDE WEB: http://www.crystal.com |
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