View 56G236_968863.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HB56G236 Series, HB56G136 Series
2,097,152-word x 36-bit High Density Dynamic RAM Module 1,048,576-word x 36-bit High Density Dynamic RAM Module
ADE-203-702A (Z) Rev.1.0 Dec. 27, 1996 Description
The HB56G236 is a 2M x 36 dynamic RAM module, mounted 4 pieces of 16-Mbit DRAM (HM5118160) sealed in SOJ package and 4 pieces of 2-Mbit DRAM (HM512200) sealed in SOJ package. The HB56G136 is a 1M x 36 dynamic RAM module, mounted 2 pieces of 16-Mbit DRAM (HM5118160) sealed in SOJ package and 2 pieces of 2-Mbit DRAM (HM512200) sealed in SOJ package. An outline of the HB56G236, HB56G136 is 72-pin single in-line package. Therefore, the HB56G236, HB56G136 make high density mounting possible without surface mount technology. The HB56G236, HB56G136 provide common data inputs and outputs. Decoupling capacitors are mounted on the module board.
Features
* 72-pin single in-line package Outline: 107.95 mm (Length) x 25.40 mm (Height) x 9.14/5.28 mm (Thickness) Lead pitch: 1.27 mm * Single 5 V (5%) supply * High speed Access time: tRAC = 60 /70ns (max) * Low power dissipation Active mode: 2.73/2.42 W (max) (HB56G236 Series) 2.63/2.31 W (max) (HB56G136 Series) Standby mode (TTL): 84 mW (max) (HB56G236 Series) (TTL): 42 mW (max) (HB56G136 Series) (CMOS): 5.25 mW (max) (L-version) (HB56G236 Series) (CMOS): 2.63 mW (max) (L-version) (HB56G136 Series) * Fast page mode capability * Refresh period 1024 refresh cycles: 16 ms 128 ms (L-version)
HB56G236 Series, HB56G136 Series
* 3 variations of refresh RAS-only refresh CAS-before-RAS refresh Hidden refresh * TTL compatible
Ordering Information
Type No. HB56G236B-6 HB56G236B-7 HB56G236B-6L HB56G236B-7L HB56G136B-6 HB56G136B-7 HB56G136B-6L HB56G136B-7L HB56G236SB-6 HB56G236SB-7 HB56G236SB-6L HB56G236SB-7L HB56G136SB-6 HB56G136SB-7 HB56G136SB-6L HB56G136SB-7L Access time 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 60 ns 70 ns 72-pin SIP socket type Solder Package 72-pin SIP socket type Contact pad Gold
2
HB56G236 Series, HB56G136 Series
Pin Arrangement
1Pin
36Pin
37Pin
72Pin
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Pin name VSS DQ0 DQ18 DQ1 DQ19 DQ2 DQ20 DQ3 DQ21 VCC NC A0 A1 A2 A3 A4 A5 A6
Pin No. 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Pin name NC DQ4 DQ22 DQ5 DQ23 DQ6 DQ24 DQ7 DQ25 A7 NC VCC A8 A9 RAS3 (NC)* RAS2 DQ26 DQ8
1
Pin No. 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
Pin name DQ17 DQ35 VSS CAS0 CAS2 CAS3 CAS1 RAS0 RAS1 (NC)* NC WE NC DQ9 DQ27 DQ10 DQ28 DQ11 DQ29
2
Pin No. 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
Pin name DQ12 DQ30 DQ13 DQ31 VCC DQ32 DQ14 DQ33 DQ15 DQ34 DQ16 NC PD1 PD2 PD3 PD4 NC VSS
Notes: 1. RAS3: HB56G236, NC: HB56G136 2. RAS1: HB56G236, NC: HB56G136
3
HB56G236 Series, HB56G136 Series
Pin Description
Pin name A0 to A9 Function Address inputs: Row address: Column address: Refresh address: DQ0 to DQ35 CAS0 to CAS3 RAS0 to RAS3 WE VCC VSS PD1 to PD4 NC Data-in/Data-out Column address strobe Row address strobe Read/Write enable Power supply Ground Presence detect pin No connection A0 to A9 A0 to A9 A0 to A9
Presence Detect Pin Arrangement (HB56G236)
Function Pin No. 67 68 69 70 Pin name PD1 PD2 PD3 PD4 60 ns NC NC NC NC 70 ns NC NC VSS NC
Presence Detect Pin Arrangement (HB56G136)
Function Pin No. 67 68 69 70 Pin name PD1 PD2 PD3 PD4 60 ns VSS VSS NC NC 70 ns VSS VSS VSS NC
4
HB56G236 Series, HB56G136 Series
Block Diagram (HB56G236)
RAS0 CAS0 CAS1 LCAS UCAS RAS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE LCAS UCAS RAS RAS1
D0
D2
CAS2 CAS1 RAS DQ8 DQ17 I/O I/O OE M0 I/O I/O OE
CAS1 CAS2 RAS M2
RAS2 CAS2 CAS3 LCAS UCAS RAS DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE LCAS UCAS RAS
RAS3
D1
D3
CAS2 CAS1 RAS DQ26 DQ35 I/O I/O OE M1 I/O I/O OE
CAS1 CAS2 RAS M3
A0-A9 WE VCC C0-C7 VSS
D0-D3, M0-M3 D0-D3, M0-M3 D0-D3, M0-M3 D0-D3, M0-M3 *D0-D3 : HM5118160 M0-M3 : HM512200
5
HB56G236 Series, HB56G136 Series
Block Diagram (HB56G136)
RAS0 CAS0 CAS1 LCAS UCAS RAS DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE
D0
CAS2 CAS1 RAS DQ8 DQ17 I/O I/O OE M0
RAS2 CAS2 CAS3 LCAS UCAS RAS DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O OE
D1
CAS2 CAS1 RAS DQ26 DQ35 I/O I/O OE M1
A0-A9 WE VCC C0-C3 VSS
D0-D1, M0-M1 D0-D1, M0-M1 D0-D1, M0-M1 D0-D1, M0-M1 *D0-D1 : HM5118160 M0-M1 : HM512200
6
HB56G236 Series, HB56G136 Series
Absolute Maximum Ratings
Parameter Voltage on any pin relative to VSS Supply voltage relative to VSS Short circuit output current Power dissipation Operating temperature Storage temperature Symbol VT VCC Iout Pt Topr Tstg Value -1.0 to +7.0 -1.0 to +7.0 50 4 0 to +70 -55 to +125 Unit V V mA W C C
Recommended DC Operating Conditions (Ta = 0 to 70C)
Parameter Supply voltage Symbol VSS VCC Input high voltage Input low voltage Note: 1. All voltage referred to VSS . VIH VIL Min 0 4.75 2.4 -1.0 Typ 0 5.0 -- -- Max 0 5.25 5.5 0.8 Unit V V V V 1 1 1 Note
7
HB56G236 Series, HB56G136 Series
DC Characteristics (Ta = 0 to 70C, VCC = 5 V 5%, VSS = 0 V) (HB56G236)
60 ns Parameter Operating current Standby current Symbol Min ICC1 ICC2 -- -- 70 ns Max Min 520 16 -- -- Max Unit 460 16 mA mA Test conditions tRC = min TTL interface, RAS, CAS = VIH, Dout = High-Z CMOS interface, RAS, CAS VCC - 0.2 V, Dout = High-Z CMOS interface, RAS, CAS VCC - 0.2 V, Dout = High-Z tRC = min RAS = VIH, CAS = VIL, Dout = enable tRC = min tPC = min CMOS interface, Dout = High-Z, CBR refresh: tRC = 125 s, tRAS 0.3 s 0 V Vin 5.5 V 0 V Vout 5.5 V, Dout = disable High Iout = -5 mA Low Iout = 4.2 mA 1, 3 4 2 1 Notes 1, 2
--
8
--
8
mA
Standby current (L-version)
ICC2
--
1
--
1
mA
RAS-only refresh current Standby current CAS-before-RAS refresh current Fast page mode current Battery backup current (Standby with CBR refresh) (L-version)
ICC3 ICC5 ICC6 ICC7 ICC10
-- -- -- -- --
520 40 520 520 3.2
-- -- -- -- --
460 40 460 460 3.2
mA mA mA mA mA
Input leakage current Output leakage current Output high voltage Output low voltage
ILI ILO VOH VOL
-10 -10 2.4 0
10 10 VCC 0.4
-10 -10 2.4 0
10 10 VCC 0.4
A A V V
Notes: 1. ICC depends on output load condition when the device is selected, ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH. 4. VIH VCC - 0.2 V, 0 V VIL 0.2 V.
8
HB56G236 Series, HB56G136 Series
DC Characteristics (Ta = 0 to 70C, VCC = 5 V 5%, VSS = 0 V) (HB56G136)
60 ns Parameter Operating current Standby current Symbol Min ICC1 ICC2 -- -- 70 ns Max Min 500 8 -- -- Max Unit 440 8 mA mA Test conditions tRC = min TTL interface, RAS, CAS = VIH, Dout = High-Z CMOS interface, RAS, CAS VCC - 0.2 V, Dout = High-Z CMOS interface, RAS, CAS VCC - 0.2 V, Dout = High-Z tRC = min RAS = VIH, CAS = VIL, Dout = enable tRC = min tPC = min CMOS interface, Dout = High-Z, CBR refresh: tRC = 125 s, tRAS 0.3 s 0 V Vin 5.5 V 0 V Vout 5.5 V, Dout = disable High Iout = -5 mA Low Iout = 4.2 mA 1, 3 4 2 1 Notes 1, 2
--
4
--
4
mA
Standby current (L-version)
ICC2
--
0.5
--
0.5
mA
RAS-only refresh current Standby current CAS-before-RAS refresh current Fast page mode current Battery backup current (Standby with CBR refresh) (L-version)
ICC3 ICC5 ICC6 ICC7 ICC10
-- -- -- -- --
500 20 500 500 1.6
-- -- -- -- --
440 20 440 440 1.6
mA mA mA mA mA
Input leakage current Output leakage current Output high voltage Output low voltage
ILI ILO VOH VOL
-10 -10 2.4 0
10 10 VCC 0.4
-10 -10 2.4 0
10 10 VCC 0.4
A A V V
Notes: 1. ICC depends on output load condition when the device is selected, ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH. 4. VIH VCC - 0.2 V, 0 V VIL 0.2 V.
9
HB56G236 Series, HB56G136 Series
Capacitance (Ta = 25C, VCC = 5 V 5%) (HB56G236)
Parameter Input capacitance (Address) Input capacitance (WE) Input capacitance (RAS) Input capacitance (CAS) I/O capacitance (DQ) Symbol CI1 CI2 CI3 CI4 CI/O Typ -- -- -- -- -- Max 60 76 34 48 34 Unit pF pF pF pF pF Notes 1 1 1 1 1, 2
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable Dout.
Capacitance (Ta = 25C, VCC = 5 V 5%) (HB56G136)
Parameter Input capacitance (Address) Input capacitance (WE) Input capacitance (RAS) Input capacitance (CAS) I/O capacitance (DQ) Symbol CI1 CI2 CI3 CI4 CI/O Typ -- -- -- -- -- Max 40 48 34 34 27 Unit pF pF pF pF pF Notes 1 1 1 1 1, 2
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable Dout.
10
HB56G236 Series, HB56G136 Series
AC Characteristics (Ta = 0 to 70C, VCC = 5 V 5%, VSS = 0 V) *1, *2, *17
Test Conditions * * * * Input rise and fall times: 5 ns Input timing reference levels: 0.8 V, 2.4 V Output timing reference levels: 0.4 V, 2.4 V Output load: 2 TTL gate + C L (100 pF) (Including scope and jig)
Read, Write, and Refresh Cycles (Common parameters)
60 ns Parameter Random read or write cycle time RAS precharge time CAS precharge time RAS pulse width CAS pulse width Row address setup time Row address hold time Column address setup time Column address hold time RAS to CAS delay time RAS to column address delay time RAS hold time CAS hold time CAS to RAS precharge time CAS delay time from Din Transition time (rise and fall) Refresh period (1,024 cycles) Refresh period (1,024 cycles) (L-version) Symbol tRC tRP tCP tRAS tCAS tASR tRAH tASC tCAH tRCD tRAD tRSH tCSH tCRP tDZC tT tREF tREF Min 110 40 10 60 15 0 10 0 15 20 15 15 60 10 0 3 -- -- Max -- -- -- 70 ns Min 130 50 10 Max -- -- -- Unit ns ns ns Notes
10000 70 10000 20 -- -- -- -- 45 30 -- -- -- -- 50 16 128 0 10 0 15 20 15 20 70 10 0 3 -- --
10000 ns 10000 ns -- -- -- -- 50 35 -- -- -- -- 50 16 128 ns ns ns ns ns ns ns ns ns ns ns ms ms 5 3 4
11
HB56G236 Series, HB56G136 Series
Read Cycle
60 ns Parameter Access time from RAS Access time from CAS Access time from address Read command setup time Read command hold time to CAS Read command hold time to RAS Column address to RAS lead time Column address to CAS lead time CAS to output in low-Z Output data hold time Output buffer turn-off time CAS to Din delay time Symbol tRAC tCAC tAA tRCS tRCH tRRH tRAL tCAL tCLZ tOH tOFF tCDD Min -- -- -- 0 0 5 30 30 0 3 -- 15 Max 60 15 30 -- -- -- -- -- -- -- 15 -- 70 ns Min -- -- -- 0 0 5 35 35 0 3 -- 20 Max 70 20 35 -- -- -- -- -- -- -- 20 -- Unit ns ns ns ns ns ns ns ns ns ns ns ns 11 10 10 Notes 6, 7 7, 8, 15 7, 9, 15
Write Cycle
60 ns Parameter Write command setup time Write command hold time Write command pulse width Data-in setup time Data-in hold time Symbol tWCS tWCH tWP tDS tDH Min 0 15 10 0 15 Max -- -- -- -- -- 70 ns Min 0 15 10 0 15 Max -- -- -- -- -- Unit ns ns ns ns ns 13 13 Notes 12
Refresh Cycle
60 ns Parameter CAS setup time (CBR refresh cycle) CAS hold time (CBR refresh cycle) WE setup time (CBR refresh cycle) WE hold time (CBR refresh cycle) RAS precharge to CAS hold time Symbol tCSR tCHR tWRP tWRH tRPC Min 10 10 0 10 10 Max -- -- -- -- -- 70 ns Min 10 10 0 10 10 Max -- -- -- -- -- Unit ns ns ns ns ns Notes
12
HB56G236 Series, HB56G136 Series
Fast Page Mode Cycle
60 ns Parameter Fast page mode cycle time Fast page mode RAS pulse width Access time from CAS precharge RAS hold time from CAS precharge Symbol tPC tRASP tCPA tCPRH Min 40 -- -- 35 Max -- 70 ns Min 45 Max -- Unit ns 14 7, 15 Notes
100000 -- 35 -- -- 40
100000 ns 40 -- ns ns
Notes: 1. AC measurements assume tT = 5 ns. 2. An initial pause of 200 s is required after power up followed by a minimum of eight initialization cycles (any combination of cycles containing RAS-only refresh cycle or CAS-before-RAS refresh). If the internal refresh counter is used, a minimum of eight CAS-before-RAS refresh cycles are required. 3. Operation with the tRCD (max) limit insures that tRAC (max) can be met, tRCD (max) is specified as a reference point only; if tRCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC . 4. Operation with the tRAD (max) limit insures that tRAC (max) can be met, tRAD (max) is specified as a reference point only; if tRAD is greater than the specified tRAD (max) limit, then access time is controlled exclusively by tAA . 5. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Also, transition times are measured between VIH (min) and VIL (max). 6. Assumes that tRCD tRCD (max) and tRAD tRAD (max). If tRCD or tRAD is greater than the maximum recommended value shown in this table, tRAC exceeds the value shown. 7. Measured with a load circuit equivalent to 2 TTL loads and 100 pF. 8. Assumes that tRCD tRCD (max) and tRCD + tCAC (max) tRAD + tAA (max). 9. Assumes that tRAD tRAD (max) and tRCD + tCAC (max) tRAD + tAA (max). 10. Either tRCH or tRRH must be satisfied for a read cycles. 11. tOFF (max) defines the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels. 12. Early write cycle only (tWCS tWCS (min)). 13. These parameters are referred to CAS leading edge in early write cycles. 14. tRASP defines RAS pulse width in Fast page mode cycles. 15. Access time is determined by the longest among t AA , tCAC and tCPA. 16. When output buffers are enabled once, sustain the low impedance state until valid data is obtained. When output buffer is turned on and off within a very short time, generally it causes large VCC / VSS line noise, which causes to degrade VIH min./ VIL max level. 17. All the VCC and VSS pins shall be supplied with the same voltages. 18. XXX: H or L (H: VIH (min) VIN VIH (max), L: VIL (min) VIN VIL (max)) ///////: Invalid Dout When the address, clock and input pins are not described on timing waveforms, their pins must be applied VIH or VIL.
13
HB56G236 Series, HB56G136 Series
Notes concerning 2CAS control
1. In one memory cycle, activate both of 2CASs (CAS0 and CAS1 (or CAS2 and CAS3)) or only one of them or neither of them. 2. To activate both of 2CASs in an ear;y write cycle or a page mode early write cycle, please keep tSKW (skew between CAS0 and CAS1 (or CAS2 and CAS3)) 5 ns or less.
RAS
CAS0 (CAS2)
CAS1 (CAS3) tSKW < 5ns
WE
3. If the different CASs are activated in the consecutive page cycles, t UL the period that both CASs are high, should be keep tCP spec (tCP min tUL).
Example
RAS
CAS0 (CAS2)
CAS1 (CAS3) tUL 1st cycle 2nd cycle
14
HB56G236 Series, HB56G136 Series
Timing Waveforms*18
Read Cycle
t RC t RAS t RP
RAS t CSH t RCD tT t RSH t CAS t CRP
CAS
t RAD t ASR t ASC t RAL t CAL t CAH
t RAH
Address
Row
Column t RRH t RCS t RCH
WE
t DZC t CDD Din High-Z t CAC t AA t RAC t OFF t CLZ t OH Dout Dout
15
HB56G236 Series, HB56G136 Series
Early Write Cycle
t RC t RAS t RP
RAS t CSH t RCD tT CAS t RSH t CAS t CRP
t ASR
t RAH
t ASC
t CAH
Address
Row
Column t WP t WCS t WCH
WE
t DS
t DH
Din
Din
Dout
High-Z* * t WCS t WCS (min)
16
HB56G236 Series, HB56G136 Series
RAS-Only Refresh Cycle
t RC t RAS t RP
RAS tT t CRP CAS t RPC t CRP
t ASR t RAH Address Row t OFF Dout High-Z 17
HB56G236 Series, HB56G136 Series
CAS-Before-RAS Refresh Cycle
t RC t RP t RAS t RP t RAS t RC t RP
RAS tT t RPC t CP CAS t WRP t WRH t WRP t WRH t CSR t CHR t RPC t CP t CRP t CSR t CHR
WE Address t OFF Dout High-Z 18
HB56G236 Series, HB56G136 Series
Hidden Refresh Cycle
t RC t RAS t RC t RAS t RC t RP t RAS t RP
t RP
RAS tT t RSH t RCD
CAS
t CHR
t CRP
t RAD tASR t RAH Address Row t ASC
t RAL t CAH
Column t RCH t RCS t RRH
, *
WE t DZC t CDD High-Z Din t CAC t AA t RAC t CLZ t OFF t OH Dout Dout
19
HB56G236 Series, HB56G136 Series
Fast Page Mode Read Cycle
t RASP t CPRH t RP
RAS tT t CSH t RCD CAS t RAL t RAD t ASR t RAH Address Row t CAL t ASC t CAH Column 1 t CAL t ASC t CAH Column 2 t CAL t ASC t CAH Column N t CAS t CP t PC t CAS t CP t RSH t CAS t CRP
,
$ *
t RCS t RCS t RRH t RCS t RCH t RCH t RCH WE t DZC t DZC t DZC t CDD t CDD t CDD Din High-Z High-Z High-Z t RAC t AA t OH t CPA t AA t OH t CPA t AA t OH t CAC t CLZ t OFF t CAC t CLZ t OFF t CAC t CLZ t OFF Dout Dout 1 Dout 2 Dout N 20
HB56G236 Series, HB56G136 Series
Fast Page Mode Early Write Cycle
t RASP t RP
RAS tT t CSH t RCD t CAS CAS t PC t CP t CAS t CP t RSH t CAS t CRP
t ASR t RAH
t ASC t CAH
t ASC t CAH
t ASC t CAH
Address
Row
Column 1 t WP t WCS t WCH
Column 2 t WP t WCS t WCH
Column N t WP t WCS t WCH
WE
t DS
t DH
t DS
t DH
t DS
t DH
Din
Din 1
Din 2
Din N
Dout
High-Z* * t WCS t WCS (min)
21
HB56G236 Series, HB56G136 Series
Physical Outline
HB56G236B/SB Series
Unit: mm inch Front side 107.95 4.25 101.19 3.98 2-O 3.175 0.125 R1.57 R0.062 6.35 0.25 2.03 0.08 6.35 0.25 9.14 max 0.36
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Component area ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, (Front) ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
1 72 A 1.27 typ. 0.05 44.45 1.75 R1.57 R0.062 6.35 0.25 44.45 1.75
,,,, ,,,, ,,,, ,,,, ,,,, ,,,, ,,,, ,,
10.16 0.40 25.40 1.00
2.54 min. 0.10
+ 0.10 1.27 - 0.08 + 0.004 0.05 - 0.003
Back side 1
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Component area ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, (Back) ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
Detail A
2.54 min 0.10 1.04 0.03 0.041 0.001
0.25 max 0.01
22
3.17 min 0.125
5.72 min 0.225
72
HB56G236 Series, HB56G136 Series
HB56G136B/SB Series
Unit: mm inch Front side 107.95 4.25 101.19 3.98 2-O 3.175 0.125 R1.57 R0.062 6.35 0.25 2.03 0.08 6.35 0.25 5.28 max 0.208
,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Component area ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
1 72 A 1.27 typ. 0.05 44.45 1.75 R1.57 R0.062 72 1 6.35 0.25 44.45 1.75
2.54 min. 0.10
10.16 0.40 25.40 1.00
,, ,, ,, ,, ,, ,, ,,
+ 0.10 1.27 - 0.08 + 0.004 0.05 - 0.003
Back side
Detail A
2.54 min 0.10 1.04 0.03 0.041 0.001
0.25 max 0.01
3.17 min 0.125
23
HB56G236 Series, HB56G136 Series
When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi's permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi's semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi's products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi's sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi's products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi America, Ltd. Semiconductor & IC Div. 2000 Sierra Point Parkway Brisbane, CA. 94005-1835 USA Tel: 415-589-8300 Fax: 415-583-4207
Hitachi Europe GmbH Electronic Components Group Continental Europe Dornacher Strae 3 D-85622 Feldkirchen Munchen Tel: 089-9 91 80-0 Fax: 089-9 29 30 00
Hitachi Europe Ltd. Electronic Components Div. Northern Europe Headquarters Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel: 0628-585000 Fax: 0628-778322
Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 0104 Tel: 535-2100 Fax: 535-1533 Hitachi Asia (Hong Kong) Ltd. Unit 706, North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel: 27359218 Fax: 27306071
24
HB56G236 Series, HB56G136 Series
Revision Record
Rev. 1.0 Date Dec. 27, 1996 Contents of Modification Initial issue Drawn by Approved by
25

▲Up To Search▲

Price & Availability of 56G236

	To Download 56G236 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .