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N-CHANNEL 30V - 0.0095 - 40A DPAK LOW GATE CHARGE STripFETTMII POWER MOSFET
PRELIMINARY DATA TYPE STD40NF03L
s s s s s
STD40NF03L
VDSS 30 V
RDS(on) <0.012
ID 40 A
TYPICAL RDS(on) = 0.0095 TYPICAL Qg = 35 nC @ 10V OPTIMAL RDS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED
3 1
DPAK TO-252 (Suffix "T4") ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL
DESCRIPTION
This application specific Power MOSFET is the third genaration of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID(*) ID IDM(**) Ptot Tstg Tj February 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Storage Temperature Max. Operating Junction Temperature
Value 30 30 18 20 20 80 55 0.37 -65 to 175 175 (**) Pulse width limited by safe operating area.
Unit V V V A A A W W/C C C 1/7
(*) Current limited by the package
STD40NF03L
THERMAL DATA
Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max Typ 2.73 62.5 300 C/W C/W C
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 18V Min. 30 1 10 100 Typ. Max. Unit V A A nA
IGSS
ON (*)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 5 V ID = 250 A ID = 20 A ID = 20 A Min. 1 0.0095 0.019 0.012 0.022 Typ. Max. Unit V
DYNAMIC
Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions
VDS>ID(on)xRDS(on)max ID=20 A
Min.
Typ. 40 1470 490 110
Max.
Unit S pF pF pF
VDS = 25V, f = 1 MHz, VGS = 0
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STD40NF03L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions ID = 20 A VDD = 15 V RG = 4.7 VGS = 4.5 V (Resistive Load, Figure 3) VDD =24 V ID =40 A VGS =10V Min. Typ. 20 170 35 5 10 45 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions ID = 20 A VDD = 15 V RG = 4.7, VGS = 4.5 V (Resistive Load, Figure 3) Min. Typ. 40 60 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 20 A VGS = 0 70 105 2.4 Test Conditions Min. Typ. Max. 20 80 1.5 Unit A A V ns nC A
di/dt = 100A/s ISD = 20 A VDD = 15 V Tj = 150C (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
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STD40NF03L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STD40NF03L
TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397
DIM.
H
A
C2
C
DETAIL "A"
A1
L2
D DETAIL "A"
B
=
=
3
B2
=
=
G
E
2
L4
1
=
=
A2
0068772-B
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STD40NF03L
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STD40NF03L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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