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INTEGRATED CIRCUITS
DATA SHEET
74LVC3G04 Triple inverter
Preliminary specification File under Integrated Circuits, IC24 2003 Aug 19
Philips Semiconductors
Preliminary specification
Triple inverter
FEATURES * Wide supply voltage range from 1.65 to 5.5 V * 5 V tolerant outputs for interfacing with 5 V logic * High noise immunity * Complies with JEDEC standard: - JESD8-7 (1.65 to 1.95 V) - JESD8-5 (2.3 to 2.7 V) - JESD8B/JESD36 (2.7 to 3.6 V) * ESD protection: - HBM EIA/JESD22-A114-A exceeds 2000 V - MM EIA/JESD22-A115-A exceeds 200 V * 24 mA output drive (VCC = 3.0 V) * CMOS low power consumption * Latch-up performance exceeds 250 mA * Direct interface with TTL levels * SOT505-2 and SOT765-1 package * Specified from -40 to +125 C. DESCRIPTION
74LVC3G04
The 74LVC3G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. These feature allows the use of these devices as translators in a mixed 3.3 and 5 V environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC3G04 provides three inverting buffers.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C. SYMBOL tPHL/tPLH PARAMETER CONDITIONS VCC = 2.5 V; CL = 30 pF; RL = 500 VCC = 2.7 V; CL = 50 pF; RL = 500 VCC = 3.3 V; CL = 50 pF; RL = 500 VCC = 5.0 V; CL = 50 pF; RL = 500 CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total switching outputs; (CL x VCC2 x fo) = sum of outputs. 2. The condition is VI = GND to VCC. input capacitance power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2 TYP. 3.5 2.2 2.7 2.7 1.9 2.5 13.5 UNIT ns ns ns ns ns pF pF
propagation delay inputs nA to output nY VCC = 1.8 V; CL = 30 pF; RL = 1 k
2003 Aug 19
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Philips Semiconductors
Preliminary specification
Triple inverter
FUNCTION TABLE See note 1. INPUTS nA L H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGES TYPE NUMBER TEMPERATURE RANGE 74LVC3G04DP 74LVC3G04DC PINNING PIN 1 2 3 4 5 6 7 8 1A 3Y 2A GND 2Y 3A 1Y VCC SYMBOL data input 1A data output 3Y data input 2A ground (0 V) data output 2Y data input 3A data output 1Y DC supply voltage DESCRIPTION -40 to +125 C -40 to +125 C PINS 8 8 PACKAGE TSSOP-8 VSSOP-8 MATERIAL plastic plastic OUTPUTS nY H L
74LVC3G04
CODE SOT505-2 SOT765-1
MARKING Y04 Y04
2003 Aug 19
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Philips Semiconductors
Preliminary specification
Triple inverter
74LVC3G04
handbook, halfpage handbook, halfpage
1A 1 3Y 2
8 VCC 7 1Y 3A 2Y
1
1A
1Y
7
04
2A GND 3 4
MNA719
3
2A
2Y
5
6 5
6
3A
3Y
2
MNA720
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1
1
7
3
1
5
handbook, halfpage
A
Y
MNA110
6
1
2
MNA721
Fig.3 IEC logic symbol.
Fig.4 Logic diagram (one driver).
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Philips Semiconductors
Preliminary specification
Triple inverter
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V active mode VCC = 0 V; Power-down mode CONDITIONS 0 0 0 -40 0 0 MIN. 1.65
74LVC3G04
MAX. 5.5 5.5 VCC 5.5 +125 20 10 V V V V
UNIT
C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. PARAMETER supply voltage input diode current input voltage output diode current output voltage output diode current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +125 C VI < 0 note 1 VO > VCC or VO < 0 active mode; notes 1 and 2 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 - - -65 - MIN. -0.5 MAX. +6.5 -50 +6.5 50 +6.5 50 100 +150 300 V mA V mA V mA mA C mW UNIT
VCC + 0.5 V
Power-down mode; notes 1 and 2 -0.5
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Philips Semiconductors
Preliminary specification
Triple inverter
DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Temperature range -40 to +85 C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = -100 A IO = -4 mA IO = -8 mA IO = -12 mA IO =- 24 mA IO = -32 mA II Ioff ICC ICC input leakage current power OFF leakage current VI = 5.5 V or GND VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 5.5 0 5.5 2.3 to 5.5 VCC - 0.1 1.2 1.9 2.2 2.3 3.8 - - - - - 1.54 2.15 2.5 2.62 4.11 0.1 0.1 0.1 5 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 - - - - - - - 0.07 0.12 0.17 0.33 0.39 0.65 x VCC 1.7 2.0 0.7 x VCC - - - - - - - - - - - - VCC (V) MIN. TYP.(1)
74LVC3G04
UNIT MAX. - - - - 0.35 x VCC 0.7 0.8 0.3 x VCC 0.1 0.45 0.3 0.4 0.55 0.55 - - - - - - 5 10 10 500
V V V V V V V V V V V V V V V V V V V V A A A A
quiescent supply current VI = VCC or GND; IO = 0 additional quiescent supply current per pin VI = VCC - 0.6 V; IO = 0
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Philips Semiconductors
Preliminary specification
Triple inverter
74LVC3G04
TEST CONDITIONS SYMBOL PARAMETER OTHER Temperature range -40 to +125 C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOL LOW-level output voltage VI = VIH or VIL IO = 100 A IO = 4 mA IO = 8 mA IO = 12 mA IO = 24 mA IO = 32 mA VOH HIGH-level output voltage VI = VIH or VIL IO = -100 A IO = -4 mA IO = -8 mA IO = -12 mA IO =- 24 mA IO = -32 mA II Ioff ICC ICC Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C. input leakage current power OFF leakage current VI = 5.5 V or GND VI or VO = 5.5 V 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 5.5 0 5.5 2.3 to 5.5 VCC - 0.1 0.95 1.7 1.9 2.0 3.4 - - - - - 1.53 2.13 2.50 2.60 4.10 0.1 - - - - - - - - - 20 20 40 5000 V V V V V V A A A A 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 - - - - - - - 0.08 0.14 0.19 0.37 0.43 0.1 0.70 0.45 0.60 0.80 0.80 V V V V V V 0.65 x VCC 1.7 2.0 0.7 x VCC - - - - - - - - - - - - - - - - 0.35 x VCC 0.7 0.8 0.3 x VCC V V V V V V V V VCC (V) MIN. TYP.(1) UNIT MAX.
quiescent supply current VI = VCC or GND; IO = 0 additional quiescent supply current per pin VI = VCC - 0.6 V; IO = 0
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Philips Semiconductors
Preliminary specification
Triple inverter
AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH propagation delay nA to nY VCC (V) MIN. 1.0 1.0 1.0 0.5 1.0 Tamb (C) -40 to +85 TYP. 3.5 2.2 2.7 2.7 1.9 MAX. 8.0 4.4 5.2 4.1 3.2
74LVC3G04
-40 to +125 MIN. 1.0 1.0 1.0 0.5 1.0 MAX. 9.5 5.4 7.0 5.5 3.8
UNIT
see Figs 5 and 6 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5
ns ns ns ns ns
AC WAVEFORMS
V handbook, halfpage I nA input GND t PHL VOH nY output VOL t THL VM VM
10%
VM
VM
t PLH
90%
t TLH
MNA722
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 x VCC 0.5 x VCC 1.5 V 1.5 V 0.5 x VCC VCC VCC 2.7 V 2.7 V VCC VI tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns 2.5 ns
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.5 The input (nA) to output (nY) propagation delays.
2003 Aug 19
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Philips Semiconductors
Preliminary specification
Triple inverter
74LVC3G04
handbook, full pagewidth
VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL
MNA616
VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 V 3.0 to 3.6 V 4.5 to 5.5 V
VI VCC VCC 2.7 V 2.7 V VCC
CL 30 pF 30 pF 50 pF 50 pF 50 pF
RL 1 k 500 500 500 500
VEXT tPLH/tPHL open open open open open tPZH/tPHZ GND GND GND GND GND tPZL/tPLZ 2 x VCC 2 x VCC 6V 6V 2 x VCC
Definitions for test circuit: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.6 Load circuitry for switching times.
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Philips Semiconductors
Preliminary specification
Triple inverter
PACKAGE OUTLINE
74LVC3G04
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c y HE vMA
Z
8
5
A pin 1 index
A2 A1
(A3)
Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 8 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16
2003 Aug 19
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Philips Semiconductors
Preliminary specification
Triple inverter
74LVC3G04
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A X
c y HE vMA
Z
8
5
Q A pin 1 index A2 A1 (A3) Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION
ISSUE DATE 02-06-07
2003 Aug 19
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Philips Semiconductors
Preliminary specification
Triple inverter
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
74LVC3G04
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Aug 19
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