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INTEGRATED CIRCUITS 74LVC543A Octal D-type registered transceiver (3-State) Product specification Supersedes data of 1998 Jul 31 IC24 Data Handbook 2000 Jun 21 Philips Semiconductors Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A FEATURES * 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic * Supply voltage range of 1.2 V to 3.6 V * Complies with JEDEC standard no. 8-1A * CMOS low power consumption * Direct interface with TTL levels * 8-bit octal transceiver with D-type latch * Back-to-back registers for storage * Separate controls for data flow in each direction * 3-State non-inverting outputs for bus oriented applications * High impedance when VCC = 0 V DESCRIPTION The 74LVC543A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC543A is an octal registered transceiver containing two sets of D-type latches for temporary storage of the data flow in either direction. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs are provided for each register to permit independent control of inputting and outputting in either direction of the data flow. The 74LVC543A contains eight D-type latches, with separate inputs and controls for each set. For data flow from A to B, for example, the A-to-B enable (EAB) input must be LOW in order to enter data from A0-A7 or take data from B0-B7, as indicated in the function table. With EAB LOW, a LOW signal on the A-to-B latch enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A data into the latches where it is stored and the B outputs no longer change with the A inputs. With EAB and OEAB both low, the 3-state B output buffers are active and display the data present at the outputs of the A latches QUICK REFERENCE DATA GND = 0V; Tamb = 25C; Tr = Tf 2.5ns SYMBOL tPHL/tPLH CI CI/O CPD PARAMETER Propagation delay An to Bn input capacitance input/output capacitance power dissipation capacitance per latch VCC = 3.3 V CONDITIONS CL = 50 pF VCC = 3.3 V TYPICAL 3.3 5.0 10.0 27 UNIT ns pF pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W) PD = CPD x VCC2 x fi + (CL x VCC2 x fo ) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo ) = sum of the outputs 2. The condition is VI = GND to VCC ORDERING INFORMATION PACKAGES 24-Pin Plastic Small Outline (SO) 24-Pin Plastic Shrink Small Outline (SSOP) Type II 24-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVC543A D 74LVC543A DB 74LVC543A PW NORTH AMERICA 74LVC543A D 74LVC543A DB 7LVC543APW DH PKG DWG. # SOT137-1 SOT340-1 SOT355-1 2000 Jun 21 2 853-1992 23942 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A PIN CONFIGURATION LEBA OEBA A0 A1 A2 A3 A4 A5 A6 1 2 3 4 5 6 7 8 9 24 VCC 23 EAB 22 B0 21 B1 20 B2 19 B3 18 B4 17 B5 16 B6 15 B7 14 LEAB 13 OEAB LOGIC SYMBOL 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 22 21 20 19 18 17 16 15 A7 10 EBA 11 GND 12 2 OEBA 13 OEAB 11 EBA 23 EAB SW00212 PIN DESCRIPTION PIN NUMBER 1 2 3,4,5,6, 7, 8, 9 10 11 12 22, 21, 20, 19, 18, 17, 16, 15 13 14 23 24 SYMBOL LEBA OEBA A0 to A7 EBA GND B0 to B7 OEAB LEAB EAB VCC FUNCTION `B' to `A' latch enable input (active LOW) `B' to `A' output enable input (active LOW) `A' data inputs/outputs 14 LEAB 1 LEBA SW00213 LOGIC SYMBOL (IEEE/IEC) 2 1EN3 G1 1C5 2EN4 G2 2C6 22 `B' to `A' enable input (active LOW) ground (0V) `B' data inputs/outputs `A' to `B' output enable input (active LOW) `A' to `B' latch enable input (active LOW) `A' to `B' enable input (active LOW) positive supply voltage 23 1 13 11 14 3 3 6D 5D 4 4 5 6 7 8 9 10 21 20 19 18 17 16 15 SW00214 2000 Jun 21 3 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A LOGIC DIAGRAM OEBA EBA LEBA OEAB EAB LEAB LE D An LE D 8 IDENTICAL CHANNELS Bn TO 7 OTHER CHANNELS SW00215 FUNCTION TABLE INPUTS OPERATING MODES OEXX Disabled Disabled Disabled + Latch Latch + Display Transparent Hold (do nothing) NOTES: XX = H = L = h = l = X = = NC = Z = H X L L L L L L L EXX X H L L L L L LEXX X X L L L L H DATA X X h l h l H L X Z Z Z Z H L H L NC OUTPUTS AB for A-to-B direction, BA for B-to-A direction High voltage level Low voltage level High state must be present one setup time before the Low-to-High transition of LEAB, LEBA, EAB, EBA Low state must be present one setup time before the Low-to-High transition of LEAB, LEBA, EAB, EBA Don't care Low-to-High level transition No change High impedance OFF state 2000 Jun 21 4 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VCC VI VI/O Tamb tr, tf PARAMETER DC supply voltage (for max. speed performance) DC supply voltage (for low-voltage applications) DC Input voltage range DC Output voltage range; output HIGH or LOW state DC input voltage range; output 3-State Operating ambient temperature range in free-air Input rise and fall times VCC = 1.2 to 2.7 V VCC = 2.7 to 3.6 V CONDITIONS MIN 2.7 1.2 0 0 0 -40 0 0 MAX 3.6 3.6 5.5 VCC 5.5 +85 20 10 V V V V V C ns/V UNIT ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL VCC IIK VI IOK VI/O IO IGND, ICC Tstg PTOT PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output HIGH or LOW state DC input voltage; output 3-State DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package - plastic mini-pack (SO) - plastic shrink mini-pack (SSOP and TSSOP) above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI t0 Note 2 VO uVCC or VO t 0 Note 2 Note 2 VO = 0 to VCC CONDITIONS RATING -0.5 to +6.5 -50 -0.5 to +6.5 "50 -0.5 to VCC +0.5 -0.5 to 6.5 "50 "100 -65 to +150 500 500 UNIT V mA V mA V V mA mA C mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2000 Jun 21 5 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIH HIGH level Input voltage VCC = 1.2 V VCC = 2.7 to 3.6 V LOW level Input voltage VCC = 1.2 V VCC = 2.7 to 3.6 V VCC = 2.7 V; VI = VIH or VIL; IO = -12 mA VO OH HIGH level output voltage VCC = 3.0 V; VI = VIH or VIL; IO = -100 A VCC = 3.0 V; VI = VIH or VIL; IO = -18 mA VCC = 3.0 V; VI = VIH or VIL; IO = -24 mA VCC = 2.7 V; VI = VIH or VIL; IO = 12 mA VOL LOW level output voltage VCC = 3.0 V; VI = VIH or VIL; IO = 100 A VCC = 3.0 V; VI = VIH or VIL; IO = 24 mA II IIHZ/IILZ IOZ Ioff ICC ICC Input leakage current Input current for common I/O pins 3-State output OFF-state current Power off leakage supply Quiescent supply current Additional quiescent supply current per input pin VCC = 3.6 V; VI = 5.5 V or GND VCC = 3.6 V; VI = 5.5 V or GND VCC = 3.6 V; VI = VIH or VIL; VO = 5.5 V or GND VCC = 0.0 V; VI or VO = 5.5 V VCC = 3.6 V; VI = VCC or GND; IO = 0 VCC = 2.7 V to 3.6 V; VI = VCC -0.6 V; IO = 0 Not for I/O pins "0.1 "0.1 0.1 0.1 0.1 5 GND VCC*0.5 VCC*0.2 VCC*0.6 VCC*0.8 0.40 0.20 0.55 "5 "15 "10 "10 10 500 A A A A A A V VCC V VCC 2.0 GND V 0.8 TYP1 MAX V UNIT VIL NOTE: 1. All typical values are at VCC = 3.3 V and Tamb = 25C. AC CHARACTERISTICS GND = 0 V; tr = tf =2.5 ns; CL = 50 pF LIMITS SYMBOL tPHL tPLH tPHL tPLH tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ tW tsu th PARAMETER Propagation delay An to Bn, Bn to An Propagation delay LEBA to An, LEAB to Bn, 3-State output enable time OEBA to An, OEAB to Bn, 3-State output disable time OEBA to An, OEAB to Bn, 3-State output enable time EBA to An, EAB to Bn, 3-State output disable time EBA to An, EAB to Bn, LEXX pulse width LOW Set-up time An/Bn to LEXX, An/Bn to EXX Hold time An/Bn to LEXX, An/Bn to EXX WAVEFORM VCC = 3.3 V 0.3 V MIN 1, 5 2, 5 3, 5 3, 5 3, 5 3, 5 2 4 4 1.5 1.5 1.5 1.5 1.5 1.5 3.0 1.5 1.5 TYP1 3.3 4.1 4.2 3.4 4.4 3.6 0.9 -0.5 0.6 MAX 7 8.5 7.7 7.0 8.0 7.0 - - - VCC = 2.7 V MIN 1.5 1.5 1.5 1.5 1.5 1.5 3.0 1.5 1.5 MAX 8 9.5 9.2 7.5 9.3 7.5 - - - VCC = 1.2 V TYP 13.0 16.0 15.0 8.0 15.0 8.0 4.0 -1.5 2.0 ns ns ns ns ns ns ns ns ns UNIT NOTE: 1. These typical values are at VCC = 3.3 V and Tamb = 25C. 2000 Jun 21 6 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A AC WAVEFORMS VM = 1.5 V at VCC w 2.7 V; VM = 0.5 VCC at VCC t 2.7 V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC w 2.7 V; VX = VOL + 0.1 VCC at VCC t 2.7 V VY = VOH -0.3 V at VCC w 2.7 V; VY = VOH - 0.1 VCC at VCC t 2.7 V VI INPUT GND VOH OUTPUT VOL tPHL tPLH VI VM VM An, Bn INPUT GND LEXX, EXX INPUT GND SY00041 Waveform 1. delays. VI LEXX INPUT Input (An, Bn) to output (Bn, An) propagation NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. Waveform 4. Data setup and hold times for the (An, Bn) input to the LEXX and EXX inputs. VM VM VM GND TEST CIRCUIT tw tPHL tPLH VM VM VIN VOUT D.U.T. RT CL RL=500 VCC S1 2 SA00408 PULSE GENERATOR Waveform 2. Latch enable input (LEXX) pulse width and the latch enable input to output (An, Bn) propagation delays. VI OEXX, EXX INPUT GND VM SWITCH POSITION TEST tPLH/tPHL tPLZ tPZL tPLZ/tPZL tPHZ/tPZH VM VCC OUTPUT LOW-to-OFF OFF-to-LOW VX VOL tPHZ VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled VY VM tPZH DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00047 Waveform 5. outputs enabled SW00210 Waveform 3. 3-State enable and disable times 2000 Jun 21 7 EEEEEEEEE EEE E EEEEEEEEE EEE E VM th th tSU tSU VM VI SW00211 Test Circuit for 3-State Outputs SWITCH Open 2 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 2000 Jun 21 8 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 2000 Jun 21 9 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1 2000 Jun 21 10 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A NOTES 2000 Jun 21 11 Philips Semiconductors Product specification Octal D-type registered transceiver (3-State) 74LVC543A Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 06-00 9397-750 07234 Philips Semiconductors 2000 Jun 21 12 |
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