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32-Bit TX System RISC TX19 Family TX1940 Application Note
MIPS16, application Specific Extensions and R3000A are a trademark of MIPS Technologies, Inc. The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. The products described in this document contain components made in the United States and subject to export control of the U.S. authorities. Diversion contrary to the U.S. law is prohibited. TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. The Toshiba products listed in this document are intended for usage in general electronics applications ( computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer's own risk. The products described in this document may include products subject to the foreign exchange and foreign trade laws.
(c) 2001 TOSHIBA CORPORATION All Rights Reserved
TX1940 Application Note
Contents
Handling Precautions TX1940 Application Note
Chapter 1 1.1 1.2 Overview of the TX1940 ......................................................................................................... 1-1
Features .......................................................................................................................................... 1-1 Pin Assignment and Pin Functions ................................................................................................. 1-4 Pin Assignment Diagram ........................................................................................................ 1-4
1.2.1 1.3 1.4 1.5 1.6
Pin Names and Functions............................................................................................................... 1-5 Clock/Standby Control .................................................................................................................... 1-9 Memory Map ................................................................................................................................. 1-10 Sample Circuit for Connecting External Memory.......................................................................... 1-12 Description of the Hardware ................................................................................................... 2-1
Chapter 2 2.1 2.2 2.3
Overview ......................................................................................................................................... 2-1 Board Configuration ........................................................................................................................ 2-2 Peripheral Circuits........................................................................................................................... 2-3 I2C Bus Specification EEPROM .............................................................................................. 2-3 Motor ....................................................................................................................................... 2-3 Photosensor ............................................................................................................................ 2-4 Volume control ........................................................................................................................ 2-4 AD conversion key switch ....................................................................................................... 2-4 Voice input .............................................................................................................................. 2-5 RS-232C ................................................................................................................................. 2-5 Light-emitting diodes ............................................................................................................... 2-6 Diode matrix key switch .......................................................................................................... 2-7 Piezo-electric buzzer............................................................................................................... 2-7
2.3.1 2.3.2 2.3.3 2.3.4 2.3.5 2.3.6 2.3.7 2.3.8 2.3.9 2.3.10 2.4 2.5
Parts List for TB1940 ...................................................................................................................... 2-8 Circuit Diagram ............................................................................................................................. 2-10 Description of the Software..................................................................................................... 3-1
Chapter 3 3.1
Introduction ..................................................................................................................................... 3-1 Overview of the start-up routine.............................................................................................. 3-1 Start-up processing.......................................................................................................... 3-1 Start-up routine (for sample applications)...................................................................... 3-12
3.1.1
3.1.1.1 3.1.1.2 3.1.2
Compilation ........................................................................................................................... 3-19 Description of the link command file.............................................................................. 3-19 Memory map (for sample applications) ......................................................................... 3-23 Link command file (used in sample applications) .......................................................... 3-24
3.1.2.1 3.1.2.2 3.1.2.3
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TX1940 Application Note
3.1.3 Interrupt handling .................................................................................................................. 3-26 Hardware interrupts ....................................................................................................... 3-26 Interrupt handler ............................................................................................................ 3-26 Defining interrupt-processing functions ......................................................................... 3-27
3.1.3.1 3.1.3.2 3.1.3.3 3.1.4
I/O header ............................................................................................................................. 3-28 I/O header file (used in sample applications) ................................................................ 3-28
3.1.4.1 3.2
DC Motor Drive ............................................................................................................................. 3-52 Functional specifications....................................................................................................... 3-52 Motor operation method................................................................................................. 3-52 Basic specifications ....................................................................................................... 3-52
3.2.1
3.2.1.1 3.2.1.2 3.2.2 3.2.3
Functional block diagram ...................................................................................................... 3-53 Control of 7-segment LED display output ............................................................................. 3-54 Overview of 7-segment LED display ............................................................................. 3-54 Control method for 7-segment LED display................................................................... 3-56
3.2.3.1 3.2.3.2 3.2.4
Controlling of the INT0 external interrupt switch................................................................... 3-57 Overview of the external interrupt switch....................................................................... 3-57 Method for controlling the external interrupt switch ....................................................... 3-57
3.2.4.1 3.2.4.2 3.2.5
Capturing AD-converted data ............................................................................................... 3-58 Overview of AD conversion ........................................................................................... 3-58 AD conversion control method....................................................................................... 3-59
3.2.5.1 3.2.5.2 3.2.6
Controlling 8-bit PWM ........................................................................................................... 3-60 Overview of 8-bit PWM .................................................................................................. 3-60 PWM control method ..................................................................................................... 3-61
3.2.6.1 3.2.6.2 3.2.7
Controlling external pulse frequency measurement ............................................................. 3-64 Overview of frequency measurement feature................................................................ 3-64 Method for controlling frequency measurement ............................................................ 3-64
3.2.7.1 3.2.7.2 3.2.8
Controlling the 2-ms Interval Timer....................................................................................... 3-66 Overview of the 2-ms Interval Timer.............................................................................. 3-66 Control method for 2-ms Interval Timer......................................................................... 3-66
3.2.8.1 3.2.8.2 3.2.9
Sample programs.................................................................................................................. 3-67 Generic flowchart........................................................................................................... 3-67 File configuration ........................................................................................................... 3-68 Vector table.................................................................................................................... 3-68 Source code................................................................................................................... 3-70
3.2.9.1 3.2.9.2 3.2.9.3 3.2.9.4 3.3
2
E PROM........................................................................................................................................ 3-79 Specifications ........................................................................................................................ 3-79 Basic specifications ....................................................................................................... 3-79 Method for reading data from E2PROM......................................................................... 3-79 Method for writing data to the E2PROM......................................................................... 3-80
3.3.1
3.3.1.1 3.3.1.2 3.3.1.3 3.3.2 3.3.3
Functional block diagram ...................................................................................................... 3-81 Control of the E2PROM ......................................................................................................... 3-82
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TX1940 Application Note
3.3.3.1 3.3.3.2 3.3.4 Overview of the E2PROM .............................................................................................. 3-82 E2PROM control method................................................................................................ 3-84
Control of AD conversion key input....................................................................................... 3-86 Overview of AD conversion keys ................................................................................... 3-86 Method for controlling AD conversion key input ............................................................ 3-86
3.3.4.1 3.3.4.2 3.3.5
Control of matrix key input .................................................................................................... 3-88 Overview of matrix key input.......................................................................................... 3-88 Method for controlling matrix key input.......................................................................... 3-90
3.3.5.1 3.3.5.2 3.3.6
Control of 7-segment LED display output ............................................................................. 3-92 Overview of 7-segment LED display ............................................................................. 3-92 Control method for 7-segment LED display................................................................... 3-94
3.3.6.1 3.3.6.2 3.3.7
Control of beep tone output .................................................................................................. 3-95 Overview of beep tone output........................................................................................ 3-95 Method for control of beep tone output.......................................................................... 3-97
3.3.7.1 3.3.7.2 3.3.8
2-ms Interval Timer ............................................................................................................... 3-98 Overview of the 2-ms Interval Timer.............................................................................. 3-98 Method for controlling the 2-ms Interval Timer .............................................................. 3-99
3.3.8.1 3.3.8.2 3.3.9
Sample programs................................................................................................................ 3-100 Generic flowchart......................................................................................................... 3-100 File configuration ......................................................................................................... 3-101 Vector table.................................................................................................................. 3-101 Source code................................................................................................................. 3-103
3.3.9.1 3.3.9.2 3.3.9.3 3.3.9.4 3.4
Stopwatch ....................................................................................................................................3-119 Specifications .......................................................................................................................3-119 Basic specifications ..................................................................................................... 3-119 How to use the stopwatch............................................................................................ 3-119
3.4.1
3.4.1.1 3.4.1.2 3.4.2 3.4.3
Functional block diagram .................................................................................................... 3-121 Controlling the external interrupt switch.............................................................................. 3-122 Overview of the external interrupt switch..................................................................... 3-122 Controlling the external interrupt switch ...................................................................... 3-122
3.4.3.1 3.4.3.2 3.4.4
Control of AD conversion key input..................................................................................... 3-123 Overview of AD conversion keys ................................................................................. 3-123 Method for controlling AD conversion key input .......................................................... 3-123
3.4.4.1 3.4.4.2 3.4.5
Control of 7-segment LED display output ........................................................................... 3-125 Overview of 7-segment LED display ........................................................................... 3-125 Control method for 7-segment LED display................................................................. 3-127
3.4.5.1 3.4.5.2 3.4.6
Control of beep tone output ................................................................................................ 3-128 Overview of beep tone output...................................................................................... 3-128 Method for control of beep tone output........................................................................ 3-130
3.4.6.1 3.4.6.2 3.4.7
Controlling the time counter ................................................................................................ 3-131 Overview of the time counter ....................................................................................... 3-131
3.4.7.1
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TX1940 Application Note
3.4.7.2 3.4.8 Controlling the time counter......................................................................................... 3-131
2-ms Interval Timer ............................................................................................................. 3-132 Overview of the 2-ms Interval Timer............................................................................ 3-132 Method for controlling the 2-ms Interval Timer ............................................................ 3-133
3.4.8.1 3.4.8.2 3.4.9
Controlling standby ............................................................................................................. 3-134 SLEEP Mode ............................................................................................................... 3-134 IDLE Mode ................................................................................................................... 3-135 STOP Mode ................................................................................................................. 3-136
3.4.9.1 3.4.9.2 3.4.9.3 3.4.10
Sample Program ................................................................................................................. 3-137 Generic flowchart......................................................................................................... 3-137 File configuration ......................................................................................................... 3-138 Vector table.................................................................................................................. 3-138 Source code................................................................................................................. 3-140
3.4.10.1 3.4.10.2 3.4.10.3 3.4.10.4 3.5
PC Communications (simple desktop calculator) ....................................................................... 3-153 Functional block diagram .................................................................................................... 3-153 Basic specifications ..................................................................................................... 3-153 Operation method ........................................................................................................ 3-153
3.5.1
3.5.1.1 3.5.1.2 3.5.2 3.5.3
Functional block diagram .................................................................................................... 3-155 UART communication ......................................................................................................... 3-156 Overview of UART communication.............................................................................. 3-156 Method for controlling UART communications ............................................................ 3-158
3.5.3.1 3.5.3.2 3.5.4
Control of 7-segment LED display output ........................................................................... 3-160 Overview of 7-segment LED display ........................................................................... 3-160 Control method for 7-segment LED display................................................................. 3-162
3.5.4.1 3.5.4.2 3.5.5
2-ms Interval Timer ............................................................................................................. 3-163 Overview of the 2-ms Interval Timer............................................................................ 3-163 Method for controlling the 2-ms Interval Timer ............................................................ 3-164
3.5.5.1 3.5.5.2 3.5.6
Sample program ................................................................................................................. 3-165 Generic flowchart......................................................................................................... 3-165 File configuration ......................................................................................................... 3-166 Vector table.................................................................................................................. 3-166 Source code................................................................................................................. 3-168
3.5.6.1 3.5.6.2 3.5.6.3 3.5.6.4 3.6
Processing Analog Inputs ........................................................................................................... 3-178 Functional specifications..................................................................................................... 3-178 How to use this feature ................................................................................................ 3-178 Basic specifications ..................................................................................................... 3-178
3.6.1
3.6.1.1 3.6.1.2 3.6.2 3.6.3
Functional block diagram .................................................................................................... 3-180 Control of 7-segment LED display output ........................................................................... 3-181 Overview of 7-segment LED display ........................................................................... 3-181 Control method for 7-segment LED display................................................................. 3-183
3.6.3.1 3.6.3.2 3.6.4
Processing of microphone and photo-interrupter input data............................................... 3-184
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TX1940 Application Note
3.6.4.1 3.6.4.2 3.6.5 Overview of photo-interrupter and microphone output data display processing ......... 3-184 Analog data control method......................................................................................... 3-184
Control of 1-ms Interval Timer <8-Bit Timer feature (TMRA)> ........................................... 3-187 Overview of the 1-ms Interval Timer............................................................................ 3-187 Control method for the 1-ms Interval Timer................................................................. 3-187
3.6.5.1 3.6.5.2 3.6.6
Control of 2-ms Interval Timer <16-Bit Timer feature (TMRB)> ......................................... 3-188 Overview of the 2-ms Interval Timer............................................................................ 3-188 Control method for the 2-ms Interval Timer................................................................. 3-189
3.6.6.1 3.6.6.2 3.6.7
Sample programs................................................................................................................ 3-190 Generic flowchart......................................................................................................... 3-190 File configuration ......................................................................................................... 3-191 Vector table.................................................................................................................. 3-191 Source code................................................................................................................. 3-193
3.6.7.1 3.6.7.2 3.6.7.3 3.6.7.4 3.7
Other Facilities ............................................................................................................................ 3-201 Watchdog Timer feature ..................................................................................................... 3-201 Overview of the Watchdog Timer ................................................................................ 3-201 Watchdog Timer control method ................................................................................. 3-202
3.7.1
3.7.1.1 3.7.1.2 3.7.2
Example of how to use the DMA controller......................................................................... 3-203 Set-up parameters for sample program....................................................................... 3-203 Generating physical addresses ................................................................................... 3-203 Functional description.................................................................................................. 3-205 Sample program .......................................................................................................... 3-207 Generic flowchart File configuration Source code 3-207 3-208 3-208
3.7.2.1 3.7.2.2 3.7.2.3 3.7.2.4 3.7.2.4.1 3.7.2.4.2 3.7.2.4.3 3.8 3.9
List of special function registers used......................................................................................... 3-212 TX1940 Internal Circuits Used .................................................................................................... 3-258
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TX1940 Application Note
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Handling Precautions
1
Using Toshiba Semiconductors Safely
1.
Using Toshiba Semiconductors Safely
TOSHIBA are continually working to improve the quality and the reliability of their products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook.
1
2
Safety Precautions
2.
Safety Precautions
This section lists important precautions which users of semiconductor devices (and anyone else) should observe in order to avoid injury and damage to property, and to ensure safe and correct use of devices. Please be sure that you understand the meanings of the labels and the graphic symbol described below before you move on to the detailed descriptions of the precautions.
[Explanation of labels] Indicates an imminently hazardous situation which will result in death or serious injury if you do not follow instructions. Indicates a potentially hazardous situation which could result in death or serious injury if you do not follow instructions. Indicates a potentially hazardous situation which if not avoided, may result in minor injury or moderate injury.
[Explanation of graphic symbol]
Graphic symbol Meaning
Indicates that caution is required (laser beam is dangerous to eyes).
2
2
Safety Precautions
2.1
General Precautions regarding Semiconductor Devices
Do not use devices under conditions exceeding their absolute maximum ratings (e.g. current, voltage, power dissipation or temperature). This may cause the device to break down, degrade its performance, or cause it to catch fire or explode resulting in injury. Do not insert devices in the wrong orientation. Make sure that the positive and negative terminals of power supplies are connected correctly. Otherwise the rated maximum current or power dissipation may be exceeded and the device may break down or undergo performance degradation, causing it to catch fire or explode and resulting in injury. When power to a device is on, do not touch the device's heat sink. Heat sinks become hot, so you may burn your hand. Do not touch the tips of device leads. Because some types of device have leads with pointed tips, you may prick your finger. When conducting any kind of evaluation, inspection or testing, be sure to connect the testing equipment's electrodes or probes to the pins of the device under test before powering it on. Otherwise, you may receive an electric shock causing injury. Before grounding an item of measuring equipment or a soldering iron, check that there is no electrical leakage from it. Electrical leakage may cause the device which you are testing or soldering to break down, or could give you an electric shock. Always wear protective glasses when cutting the leads of a device with clippers or a similar tool. If you do not, small bits of metal flying off the cut ends may damage your eyes.
3
2
Safety Precautions
2.2
2.2.1
Precautions Specific to Each Product Group
Optical semiconductor devices
When a visible semiconductor laser is operating, do not look directly into the laser beam or look through the optical system. This is highly likely to impair vision, and in the worst case may cause blindness. If it is necessary to examine the laser apparatus, for example to inspect its optical characteristics, always wear the appropriate type of laser protective glasses as stipulated by IEC standard IEC825-1.
Ensure that the current flowing in an LED device does not exceed the device's maximum rated current. This is particularly important for resin-packaged LED devices, as excessive current may cause the package resin to blow up, scattering resin fragments and causing injury. When testing the dielectric strength of a photocoupler, use testing equipment which can shut off the supply voltage to the photocoupler. If you detect a leakage current of more than 100 A, use the testing equipment to shut off the photocoupler's supply voltage; otherwise a large short-circuit current will flow continuously, and the device may break down or burst into flames, resulting in fire or injury. When incorporating a visible semiconductor laser into a design, use the device's internal photodetector or a separate photodetector to stabilize the laser's radiant power so as to ensure that laser beams exceeding the laser's rated radiant power cannot be emitted. If this stabilizing mechanism does not work and the rated radiant power is exceeded, the device may break down or the excessively powerful laser beams may cause injury.
2.2.2
Power devices
Never touch a power device while it is powered on. Also, after turning off a power device, do not touch it until it has thoroughly discharged all remaining electrical charge. Touching a power device while it is powered on or still charged could cause a severe electric shock, resulting in death or serious injury. When conducting any kind of evaluation, inspection or testing, be sure to connect the testing equipment's electrodes or probes to the device under test before powering it on. When you have finished, discharge any electrical charge remaining in the device. Connecting the electrodes or probes of testing equipment to a device while it is powered on may result in electric shock, causing injury.
4
2
Safety Precautions
Do not use devices under conditions which exceed their absolute maximum ratings (current, voltage, power dissipation, temperature etc.). This may cause the device to break down, causing a large short-circuit current to flow, which may in turn cause it to catch fire or explode, resulting in fire or injury. Use a unit which can detect short-circuit currents and which will shut off the power supply if a short-circuit occurs. If the power supply is not shut off, a large short-circuit current will flow continuously, which may in turn cause the device to catch fire or explode, resulting in fire or injury. When designing a case for enclosing your system, consider how best to protect the user from shrapnel in the event of the device catching fire or exploding. Flying shrapnel can cause injury. When conducting any kind of evaluation, inspection or testing, always use protective safety tools such as a cover for the device. Otherwise you may sustain injury caused by the device catching fire or exploding. Make sure that all metal casings in your design are grounded to earth. Even in modules where a device's electrodes and metal casing are insulated, capacitance in the module may cause the electrostatic potential in the casing to rise. Dielectric breakdown may cause a high voltage to be applied to the casing, causing electric shock and injury to anyone touching it. When designing the heat radiation and safety features of a system incorporating high-speed rectifiers, remember to take the device's forward and reverse losses into account. The leakage current in these devices is greater than that in ordinary rectifiers; as a result, if a high-speed rectifier is used in an extreme environment (e.g. at high temperature or high voltage), its reverse loss may increase, causing thermal runaway to occur. This may in turn cause the device to explode and scatter shrapnel, resulting in injury to the user. A design should ensure that, except when the main circuit of the device is active, reverse bias is applied to the device gate while electricity is conducted to control circuits, so that the main circuit will become inactive. Malfunction of the device may cause serious accidents or injuries.
When conducting any kind of evaluation, inspection or testing, either wear protective gloves or wait until the device has cooled properly before handling it. Devices become hot when they are operated. Even after the power has been turned off, the device will retain residual heat which may cause a burn to anyone touching it.
2.2.3
Bipolar ICs (for use in automobiles)
If your design includes an inductive load such as a motor coil, incorporate diodes or similar devices into the design to prevent negative current from flowing in. The load current generated by powering the device on and off may cause it to function erratically or to break down, which could in turn cause injury. Ensure that the power supply to any device which incorporates protective functions is stable. If the power supply is unstable, the device may operate erratically, preventing the protective functions from working correctly. If protective functions fail, the device may break down causing injury to the user.
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3 General Safety Precautions and Usage Considerations
3.
General Safety Precautions and Usage Considerations
This section is designed to help you gain a better understanding of semiconductor devices, so as to ensure the safety, quality and reliability of the devices which you incorporate into your designs.
3.1
3.1.1
From Incoming to Shipping
Electrostatic discharge (ESD)
When handling individual devices (which are not yet mounted on a printed circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects which come into direct contact with devices should be made of anti-static materials and should be grounded to earth via an 0.5- to 1.0-M protective resistor. Please follow the precautions described below; this is particularly important for devices which are marked "Be careful of static.". (1) Work environment
* When humidity in the working environment decreases, the human body and other insulators
can easily become charged with static electricity due to friction. Maintain the recommended humidity of 40% to 60% in the work environment, while also taking into account the fact that moisture-proof-packed products may absorb moisture after unpacking.
* Be sure that all equipment, jigs and tools in the working area are grounded to earth. * Place a conductive mat over the floor of the work area, or take other appropriate measures, so
that the floor surface is protected against static electricity and is grounded to earth. The surface resistivity should be 104 to 108 /sq and the resistance between surface and ground, 7.5 x 105 to 108
* Cover the workbench surface also with a conductive mat (with a surface resistivity of 104 to
108 /sq, for a resistance between surface and ground of 7.5 x 105 to 108 ) . The purpose of this is to disperse static electricity on the surface (through resistive components) and ground it to earth. Workbench surfaces must not be constructed of low-resistance metallic materials that allow rapid static discharge when a charged device touches them directly.
* Pay attention to the following points when using automatic equipment in your workplace:
(a) When picking up ICs with a vacuum unit, use a conductive rubber fitting on the end of the pick-up wand to protect against electrostatic charge. (b) Minimize friction on IC package surfaces. If some rubbing is unavoidable due to the device's mechanical structure, minimize the friction plane or use material with a small friction coefficient and low electrical resistance. Also, consider the use of an ionizer. (c) In sections which come into contact with device lead terminals, use a material which dissipates static electricity. (d) Ensure that no statically charged bodies (such as work clothes or the human body) touch the devices.
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3 General Safety Precautions and Usage Considerations
(e) Make sure that sections of the tape carrier which come into contact with installation devices or other electrical machinery are made of a low-resistance material. (f) Make sure that jigs and tools used in the assembly process do not touch devices.
(g) In processes in which packages may retain an electrostatic charge, use an ionizer to neutralize the ions.
* Make sure that CRT displays in the working area are protected against static charge, for
example by a VDT filter. As much as possible, avoid turning displays on and off. Doing so can cause electrostatic induction in devices.
* Keep track of charged potential in the working area by taking periodic measurements. * Ensure that work chairs are protected by an anti-static textile cover and are grounded to the
floor surface by a grounding chain. (Suggested resistance between the seat surface and grounding chain is 7.5 x 105 to 1012.) /sq; suggested resistance between surface and ground is 7.5 x 105 to 108 .)
* Install anti-static mats on storage shelf surfaces. (Suggested surface resistivity is 104 to 108 * For transport and temporary storage of devices, use containers (boxes, jigs or bags) that are
made of anti-static materials or materials which dissipate electrostatic charge.
* Make sure that cart surfaces which come into contact with device packaging are made of
materials which will conduct static electricity, and verify that they are grounded to the floor surface via a grounding chain.
* In any location where the level of static electricity is to be closely controlled, the ground
resistance level should be Class 3 or above. Use different ground wires for all items of equipment which may come into physical contact with devices.
(2) Operating environment
* Operators must wear anti-static clothing and conductive shoes (or
a leg or heel strap).
* Operators must wear a wrist strap grounded to earth via a
resistor of about 1 M.
* Soldering irons must be grounded from iron tip to earth, and must be used only at low voltages
(6 V to 24 V).
* If the tweezers you use are likely to touch the device terminals, use anti-static tweezers and in
particular avoid metallic tweezers. If a charged device touches a low-resistance tool, rapid discharge can occur. When using vacuum tweezers, attach a conductive chucking pat to the tip, and connect it to a dedicated ground used especially for anti-static purposes (suggested resistance value: 104 to 108 ). CRT).
* Do not place devices or their containers near sources of strong electrical fields (such as above a
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3 General Safety Precautions and Usage Considerations
* When storing printed circuit boards which have devices mounted on them, use a board
container or bag that is protected against static charge. To avoid the occurrence of static charge or discharge due to friction, keep the boards separate from one other and do not stack them directly on top of one another.
* Ensure, if possible, that any articles (such as clipboards) which are brought to any location
where the level of static electricity must be closely controlled are constructed of anti-static materials.
* In cases where the human body comes into direct contact with a device, be sure to wear antistatic finger covers or gloves (suggested resistance value: 108 or less).
* Equipment safety covers installed near devices should have resistance ratings of 109 or less. * If a wrist strap cannot be used for some reason, and there is a possibility of imparting friction to
devices, use an ionizer.
* The transport film used in TCP products is manufactured from materials in which static
charges tend to build up. When using these products, install an ionizer to prevent the film from being charged with static electricity. Also, ensure that no static electricity will be applied to the product's copper foils by taking measures to prevent static occuring in the peripheral equipment.
3.1.2
Vibration, impact and stress
Handle devices and packaging materials with care. To avoid damage to devices, do not toss or drop packages. Ensure that devices are not subjected to mechanical vibration or shock during transportation. Ceramic package devices and devices in canister-type packages which have empty space inside them are subject to damage from vibration and shock because the bonding wires are secured only at their ends.
Vibration
Plastic molded devices, on the other hand, have a relatively high level of resistance to vibration and mechanical shock because their bonding wires are enveloped and fixed in resin. However, when any device or package type is installed in target equipment, it is to some extent susceptible to wiring disconnections and other damage from vibration, shock and stressed solder junctions. Therefore when devices are incorporated into the design of equipment which will be subject to vibration, the structural design of the equipment must be thought out carefully. If a device is subjected to especially strong vibration, mechanical shock or stress, the package or the chip itself may crack. In products such as CCDs which incorporate window glass, this could cause surface flaws in the glass or cause the connection between the glass and the ceramic to separate. Furthermore, it is known that stress applied to a semiconductor device through the package changes the resistance characteristics of the chip because of piezoelectric effects. In analog circuit design attention must be paid to the problem of package stress as well as to the dangers of vibration and shock as described above.
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3 General Safety Precautions and Usage Considerations
3.2
3.2.1
Storage
General storage * Avoid storage locations where devices will be exposed to moisture or direct sunlight. * Follow the instructions printed on the device cartons regarding
transportation and storage.
* The storage area temperature should be kept within a
Humidity:
Temperature:
temperature range of 5C to 35C, and relative humidity should be maintained at between 45% and 75%.
* Do not store devices in the presence of harmful (especially
corrosive) gases, or in dusty conditions.
* Use storage areas where there is minimal temperature fluctuation. Rapid temperature changes
can cause moisture to form on stored devices, resulting in lead oxidation or corrosion. As a result, the solderability of the leads will be degraded.
* When repacking devices, use anti-static containers. * Do not allow external forces or loads to be applied to devices while they are in storage. * If devices have been stored for more than two years, their electrical characteristics should be
tested and their leads should be tested for ease of soldering before they are used.
3.2.2
Moisture-proof packing
Moisture-proof packing should be handled with care. The handling procedure specified for each packing type should be followed scrupulously. If the proper procedures are not followed, the quality and reliability of devices may be degraded. This section describes general precautions for handling moisture-proof packing. Since the details may differ from device to device, refer also to the relevant individual datasheets or databook. (1) General precautions Follow the instructions printed on the device cartons regarding transportation and storage.
* Do not drop or toss device packing. The laminated aluminum material in it can be rendered
ineffective by rough handling.
* The storage area temperature should be kept within a temperature range of 5C to 30C, and
relative humidity should be maintained at 90% (max). Use devices within 12 months of the date marked on the package seal.
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3 General Safety Precautions and Usage Considerations
* If the 12-month storage period has expired, or if the 30% humidity indicator shown in Figure 1
is pink when the packing is opened, it may be advisable, depending on the device and packing type, to back the devices at high temperature to remove any moisture. Please refer to the table below. After the pack has been opened, use the devices in a 5C to 30C. 60% RH environment and within the effective usage period listed on the moisture-proof package. If the effective usage period has expired, or if the packing has been stored in a high-humidity environment, bake the devices at high temperature.
Packing Moisture removal If the packing bears the "Heatproof" marking or indicates the maximum temperature which it can withstand, bake at 125C for 20 hours. (Some devices require a different procedure.) Transfer devices to trays bearing the "Heatproof" marking or indicating the temperature which they can withstand, or to aluminum tubes before baking at 125C for 20 hours. Deviced packed on tape cannot be baked and must be used within the effective usage period after unpacking, as specified on the packing.
Tray Tube Tape
* When baking devices, protect the devices from static electricity. * Moisture indicators can detect the approximate humidity level at a standard temperature of
25C. 6-point indicators and 3-point indicators are currently in use, but eventually all indicators will be 3-point indicators.
HUMIDITY INDICATOR 60%
50%
DANGER IF PINK CHANGE DESICCANT
40%
HUMIDITY INDICATOR
30%
40 DANGER IF PINK
20%
30
10% READ AT LAVENDER BETWEEN PINK & BLUE (a) 6-point indicator
20 READ AT LAVENDER BETWEEN PINK & BLUE (b) 3-point indicator
Figure 1
Humidity indicator
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3 General Safety Precautions and Usage Considerations
3.3
Design
Care must be exercised in the design of electronic equipment to achieve the desired reliability. It is important not only to adhere to specifications concerning absolute maximum ratings and recommended operating conditions, it is also important to consider the overall environment in which equipment will be used, including factors such as the ambient temperature, transient noise and voltage and current surges, as well as mounting conditions which affect device reliability. This section describes some general precautions which you should observe when designing circuits and when mounting devices on printed circuit boards. For more detailed information about each product family, refer to the relevant individual technical datasheets available from Toshiba.
3.3.1
Absolute maximum ratings
Do not use devices under conditions in which their absolute maximum ratings (e.g. current, voltage, power dissipation or temperature) will be exceeded. A device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. The absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. Although absolute maximum ratings differ from product to product, they essentially concern the voltage and current at each pin, the allowable power dissipation, and the junction and storage temperatures. If the voltage or current on any pin exceeds the absolute maximum rating, the device's internal circuitry can become degraded. In the worst case, heat generated in internal circuitry can fuse wiring or cause the semiconductor chip to break down. If storage or operating temperatures exceed rated values, the package seal can deteriorate or the wires can become disconnected due to the differences between the thermal expansion coefficients of the materials from which the device is constructed.
3.3.2
Recommended operating conditions
The recommended operating conditions for each device are those necessary to guarantee that the device will operate as specified in the datasheet. If greater reliability is required, derate the device's absolute maximum ratings for voltage, current, power and temperature before using it.
3.3.3
Derating
When incorporating a device into your design, reduce its rated absolute maximum voltage, current, power dissipation and operating temperature in order to ensure high reliability. Since derating differs from application to application, refer to the technical datasheets available for the various devices used in your design.
3.3.4
Unused pins
If unused pins are left open, some devices can exhibit input instability problems, resulting in malfunctions such as abrupt increase in current flow. Similarly, if the unused output pins on a device are connected to the power supply pin, the ground pin or to other output pins, the IC may malfunction or break down.
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3 General Safety Precautions and Usage Considerations
Since the details regarding the handling of unused pins differ from device to device and from pin to pin, please follow the instructions given in the relevant individual datasheets or databook. CMOS logic IC inputs, for example, have extremely high impedance. If an input pin is left open, it can easily pick up extraneous noise and become unstable. In this case, if the input voltage level reaches an intermediate level, it is possible that both the P-channel and N-channel transistors will be turned on, allowing unwanted supply current to flow. Therefore, ensure that the unused input pins of a device are connected to the power supply (Vcc) pin or ground (GND) pin of the same device. For details of what to do with the pins of heat sinks, refer to the relevant technical datasheet and databook.
3.3.5
Latch-up
Latch-up is an abnormal condition inherent in CMOS devices, in which Vcc gets shorted to ground. This happens when a parasitic PN-PN junction (thyristor structure) internal to the CMOS chip is turned on, causing a large current of the order of several hundred mA or more to flow between Vcc and GND, eventually causing the device to break down. Latch-up occurs when the input or output voltage exceeds the rated value, causing a large current to flow in the internal chip, or when the voltage on the Vcc (Vdd) pin exceeds its rated value, forcing the internal chip into a breakdown condition. Once the chip falls into the latch-up state, even though the excess voltage may have been applied only for an instant, the large current continues to flow between Vcc (Vdd) and GND (Vss). This causes the device to heat up and, in extreme cases, to emit gas fumes as well. To avoid this problem, observe the following precautions: (1) Do not allow voltage levels on the input and output pins either to rise above Vcc (Vdd) or to fall below GND (Vss). Also, follow any prescribed power-on sequence, so that power is applied gradually or in steps rather than abruptly. (2) Do not allow any abnormal noise signals to be applied to the device. (3) Set the voltage levels of unused input pins to Vcc (Vdd) or GND (Vss). (4) Do not connect output pins to one another.
3.3.6
Input/Output protection
Wired-AND configurations, in which outputs are connected together, cannot be used, since this short-circuits the outputs. Outputs should, of course, never be connected to Vcc (Vdd) or GND (Vss). Furthermore, ICs with tri-state outputs can undergo performance degradation if a shorted output current is allowed to flow for an extended period of time. Therefore, when designing circuits, make sure that tri-state outputs will not be enabled simultaneously.
3.3.7
Load capacitance
Some devices display increased delay times if the load capacitance is large. Also, large charging and discharging currents will flow in the device, causing noise. Furthermore, since outputs are shorted for a relatively long time, wiring can become fused. Consult the technical information for the device being used to determine the recommended load capacitance.
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3 General Safety Precautions and Usage Considerations
3.3.8
Thermal design
The failure rate of semiconductor devices is greatly increased as operating temperatures increase. As shown in Figure 2, the internal thermal stress on a device is the sum of the ambient temperature and the temperature rise due to power dissipation in the device. Therefore, to achieve optimum reliability, observe the following precautions concerning thermal design: (1) Keep the ambient temperature (Ta) as low as possible. (2) If the device's dynamic power dissipation is relatively large, select the most appropriate circuit board material, and consider the use of heat sinks or of forced air cooling. Such measures will help lower the thermal resistance of the package. (3) Derate the device's absolute maximum ratings to minimize thermal stress from power dissipation. ja = jc + ca ja = (Tj-Ta) / P jc = (Tj-Tc) / P ca = (Tc-Ta) / P in which ja = thermal resistance between junction and surrounding air (C/W) jc = thermal resistance between junction and package surface, or internal thermal resistance (C/W) ca = thermal resistance between package surface and surrounding air, or external thermal resistance (C/W) Tj = junction temperature or chip temperature (C) Tc = package surface temperature or case temperature (C) Ta = ambient temperature (C) P = power dissipation (W)
Ta ca Tc jc Tj
Figure 2
Thermal resistance of package
3.3.9
Interfacing
When connecting inputs and outputs between devices, make sure input voltage (VIL/VIH) and output voltage (VOL/VOH) levels are matched. Otherwise, the devices may malfunction. When connecting devices operating at different supply voltages, such as in a dual-power-supply system, be aware that erroneous power-on and power-off sequences can result in device breakdown. For details of how to interface particular devices, consult the relevant technical datasheets and databooks. If you have any questions or doubts about interfacing, contact your nearest Toshiba office or distributor.
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3 General Safety Precautions and Usage Considerations
3.3.10
Decoupling
Spike currents generated during switching can cause Vcc (Vdd) and GND (Vss) voltage levels to fluctuate, causing ringing in the output waveform or a delay in response speed. (The power supply and GND wiring impedance is normally 50 to 100 .) For this reason, the impedance of power supply lines with respect to high frequencies must be kept low. This can be accomplished by using thick and short wiring for the Vcc (Vdd) and GND (Vss) lines and by installing decoupling capacitors (of approximately 0.01 F to 1 F capacitance) as high-frequency filters between Vcc (Vdd) and GND (Vss) at strategic locations on the printed circuit board. For low-frequency filtering, it is a good idea to install a 10- to 100-F capacitor on the printed circuit board (one capacitor will suffice). If the capacitance is excessively large, however, (e.g. several thousand F) latch-up can be a problem. Be sure to choose an appropriate capacitance value. An important point about wiring is that, in the case of high-speed logic ICs, noise is caused mainly by reflection and crosstalk, or by the power supply impedance. Reflections cause increased signal delay, ringing, overshoot and undershoot, thereby reducing the device's safety margins with respect to noise. To prevent reflections, reduce the wiring length by increasing the device mounting density so as to lower the inductance (L) and capacitance (C) in the wiring. Extreme care must be taken, however, when taking this corrective measure, since it tends to cause crosstalk between the wires. In practice, there must be a trade-off between these two factors.
3.3.11
External noise
Printed circuit boards with long I/O or signal pattern lines are vulnerable to induced noise or surges from outside sources. Consequently, malfunctions or breakdowns can result from overcurrent or overvoltage, depending on the types of device used. To protect against noise, lower the impedance of the pattern line or insert a noise-canceling circuit. Protective measures must also be taken against surges. For details of the appropriate protective measures for a particular device, consult the relevant databook.
Input/Output Signals
3.3.12
Electromagnetic interference
Widespread use of electrical and electronic equipment in recent years has brought with it radio and TV reception problems due to electromagnetic interference. To use the radio spectrum effectively and to maintain radio communications quality, each country has formulated regulations limiting the amount of electromagnetic interference which can be generated by individual products. Electromagnetic interference includes conduction noise propagated through power supply and telephone lines, and noise from direct electromagnetic waves radiated by equipment. Different measurement methods and corrective measures are used to assess and counteract each specific type of noise. Difficulties in controlling electromagnetic interference derive from the fact that there is no method available which allows designers to calculate, at the design stage, the strength of the electromagnetic waves which will emanate from each component in a piece of equipment. For this reason, it is only after the prototype equipment has been completed that the designer can take measurements using a dedicated instrument to determine the strength of electromagnetic interference waves. Yet it is possible during system design to incorporate some measures for the prevention of electromagnetic interference, which can facilitate taking corrective measures once the design has been completed. These include installing shields and noise filters, and increasing
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3 General Safety Precautions and Usage Considerations
the thickness of the power supply wiring patterns on the printed circuit board. One effective method, for example, is to devise several shielding options during design, and then select the most suitable shielding method based on the results of measurements taken after the prototype has been completed.
3.3.13
Peripheral circuits
In most cases semiconductor devices are used with peripheral circuits and components. The input and output signal voltages and currents in these circuits must be chosen to match the semiconductor device's specifications. The following factors must be taken into account. (1) Inappropriate voltages or currents applied to a device's input pins may cause it to operate erratically. Some devices contain pull-up or pull-down resistors. When designing your system, remember to take the effect of this on the voltage and current levels into account. (2) The output pins on a device have a predetermined external circuit drive capability. If this drive capability is greater than that required, either incorporate a compensating circuit into your design or carefully select suitable components for use in external circuits.
3.3.14
Safety standards
Each country has safety standards which must be observed. These safety standards include requirements for quality assurance systems and design of device insulation. Such requirements must be fully taken into account to ensure that your design conforms to the applicable safety standards.
3.3.15
Other precautions
(1) When designing a system, be sure to incorporate fail-safe and other appropriate measures according to the intended purpose of your system. Also, be sure to debug your system under actual board-mounted conditions. (2) If a plastic-package device is placed in a strong electric field, surface leakage may occur due to the charge-up phenomenon, resulting in device malfunction. In such cases take appropriate measures to prevent this problem, for example by protecting the package surface with a conductive shield. (3) With some microcomputers and MOS memory devices, caution is required when powering on or resetting the device. To ensure that your design does not violate device specifications, consult the relevant databook for each constituent device. (4) Ensure that no conductive material or object (such as a metal pin) can drop onto and short the leads of a device mounted on a printed circuit board.
3.4
3.4.1
Inspection, Testing and Evaluation
Grounding
Ground all measuring instruments, jigs, tools and soldering irons to earth. Electrical leakage may cause a device to break down or may result in electric shock.
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3 General Safety Precautions and Usage Considerations
3.4.2
Inspection Sequence
Do not insert devices in the wrong orientation. Make sure that the positive and negative electrodes of the power supply are correctly connected. Otherwise, the rated maximum current or maximum power dissipation may be exceeded and the device may break down or undergo performance degradation, causing it to catch fire or explode, resulting in injury to the user. When conducting any kind of evaluation, inspection or testing using AC power with a peak voltage of 42.4 V or DC power exceeding 60 V, be sure to connect the electrodes or probes of the testing equipment to the device under test before powering it on. Connecting the electrodes or probes of testing equipment to a device while it is powered on may result in electric shock, causing injury. (1) Apply voltage to the test jig only after inserting the device securely into it. When applying or removing power, observe the relevant precautions, if any. (2) Make sure that the voltage applied to the device is off before removing the device from the test jig. Otherwise, the device may undergo performance degradation or be destroyed. (3) Make sure that no surge voltages from the measuring equipment are applied to the device. (4) The chips housed in tape carrier packages (TCPs) are bare chips and are therefore exposed. During inspection take care not to crack the chip or cause any flaws in it. Electrical contact may also cause a chip to become faulty. Therefore make sure that nothing comes into electrical contact with the chip.
3.5
Mounting
There are essentially two main types of semiconductor device package: lead insertion and surface mount. During mounting on printed circuit boards, devices can become contaminated by flux or damaged by thermal stress from the soldering process. With surface-mount devices in particular, the most significant problem is thermal stress from solder reflow, when the entire package is subjected to heat. This section describes a recommended temperature profile for each mounting method, as well as general precautions which you should take when mounting devices on printed circuit boards. Note, however, that even for devices with the same package type, the appropriate mounting method varies according to the size of the chip and the size and shape of the lead frame. Therefore, please consult the relevant technical datasheet and databook.
3.5.1
Lead forming
Always wear protective glasses when cutting the leads of a device with clippers or a similar tool. If you do not, small bits of metal flying off the cut ends may damage your eyes. Do not touch the tips of device leads. Because some types of device have leads with pointed tips, you may prick your finger. Semiconductor devices must undergo a process in which the leads are cut and formed before the devices can be mounted on a printed circuit board. If undue stress is applied to the interior of a device during this process, mechanical breakdown or performance degradation can result. This is attributable primarily to differences between the stress on the device's external leads and the stress on the internal leads. If the relative difference is great enough, the device's internal leads, adhesive properties or sealant can be damaged. Observe these precautions during the leadforming process (this does not apply to surface-mount devices):
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3 General Safety Precautions and Usage Considerations
(1) Lead insertion hole intervals on the printed circuit board should match the lead pitch of the device precisely. (2) If lead insertion hole intervals on the printed circuit board do not precisely match the lead pitch of the device, do not attempt to forcibly insert devices by pressing on them or by pulling on their leads. (3) For the minimum clearance specification between a device and a printed circuit board, refer to the relevant device's datasheet and databook. If necessary, achieve the required clearance by forming the device's leads appropriately. Do not use the spacers which are used to raise devices above the surface of the printed circuit board during soldering to achieve clearance. These spacers normally continue to expand due to heat, even after the solder has begun to solidify; this applies severe stress to the device. (4) Observe the following precautions when forming the leads of a device prior to mounting.
* Use a tool or jig to secure the lead at its base (where the lead meets the device package) while
bending so as to avoid mechanical stress to the device. Also avoid bending or stretching device leads repeatedly.
* Be careful not to damage the lead during lead forming. * Follow any other precautions described in the individual datasheets and databooks for each
device and package type.
3.5.2
Socket mounting
(1) When socket mounting devices on a printed circuit board, use sockets which match the inserted device's package. (2) Use sockets whose contacts have the appropriate contact pressure. If the contact pressure is insufficient, the socket may not make a perfect contact when the device is repeatedly inserted and removed; if the pressure is excessively high, the device leads may be bent or damaged when they are inserted into or removed from the socket. (3) When soldering sockets to the printed circuit board, use sockets whose construction prevents flux from penetrating into the contacts or which allows flux to be completely cleaned off. (4) Make sure the coating agent applied to the printed circuit board for moisture-proofing purposes does not stick to the socket contacts. (5) If the device leads are severely bent by a socket as it is inserted or removed and you wish to repair the leads so as to continue using the device, make sure that this lead correction is only performed once. Do not use devices whose leads have been corrected more than once. (6) If the printed circuit board with the devices mounted on it will be subjected to vibration from external sources, use sockets which have a strong contact pressure so as to prevent the sockets and devices from vibrating relative to one another.
3.5.3
Soldering temperature profile
The soldering temperature and heating time vary from device to device. Therefore, when specifying the mounting conditions, refer to the individual datasheets and databooks for the devices used.
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3 General Safety Precautions and Usage Considerations
(1) Using a soldering iron Complete soldering within ten seconds for lead temperatures of up to 260C, or within three seconds for lead temperatures of up to 350C. (2) Using medium infrared ray reflow
* Heating top and bottom with long or medium infrared rays is recommended (see Figure 3).
Medium infrared ray heater (reflow) Product flow
Long infrared ray heater (preheating)
Figure 3
Heating top and bottom with long or medium infrared rays
* Complete the infrared ray reflow process within 30 seconds at a package surface temperature of
between 210C and 240C.
* Refer to Figure 4 for an example of a good temperature profile for infrared or hot air reflow.
(C) 240 Package surface temperature
210
160 140 60-120 seconds 30 seconds or less Time (in seconds)
Figure 4 (3) Using hot air reflow
Sample temperature profile for infrared or hot air reflow
* Complete hot air reflow within 30 seconds at a package surface temperature of between 210C
and 240C.
* For an example of a recommended temperature profile, refer to Figure 4 above.
(4) Using solder flow
* Apply preheating for 60 to 120 seconds at a temperature of 150C. * For lead insertion-type packages, complete solder flow within 10 seconds with the
temperature at the stopper (or, if there is no stopper, at a location more than 1.5 mm from the body) which does not exceed 260C.
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3 General Safety Precautions and Usage Considerations
* For surface-mount packages, complete soldering within 5 seconds at a temperature of 250C or
less in order to prevent thermal stress in the device. using solder flow.
* Figure 5 shows an example of a recommended temperature profile for surface-mount packages
(C) 250 Package surface temperature
160 140 60-120 seconds 5 seconds or less
Time (in seconds)
Figure 5
Sample temperature profile for solder flow
3.5.4
Flux cleaning and ultrasonic cleaning
(1) When cleaning circuit boards to remove flux, make sure that no residual reactive ions such as Na or Cl remain. Note that organic solvents react with water to generate hydrogen chloride and other corrosive gases which can degrade device performance. (2) Washing devices with water will not cause any problems. However, make sure that no reactive ions such as sodium and chlorine are left as a residue. Also, be sure to dry devices sufficiently after washing. (3) Do not rub device markings with a brush or with your hand during cleaning or while the devices are still wet from the cleaning agent. Doing so can rub off the markings. (4) The dip cleaning, shower cleaning and steam cleaning processes all involve the chemical action of a solvent. Use only recommended solvents for these cleaning methods. When immersing devices in a solvent or steam bath, make sure that the temperature of the liquid is 50C or below, and that the circuit board is removed from the bath within one minute. (5) Ultrasonic cleaning should not be used with hermetically-sealed ceramic packages such as a leadless chip carrier (LCC), pin grid array (PGA) or charge-coupled device (CCD), because the bonding wires can become disconnected due to resonance during the cleaning process. Even if a device package allows ultrasonic cleaning, limit the duration of ultrasonic cleaning to as short a time as possible, since long hours of ultrasonic cleaning degrade the adhesion between the mold resin and the frame material. The following ultrasonic cleaning conditions are recommended: Frequency: 27 kHz 29 kHz Ultrasonic output power: 300 W or less (0.25 W/cm2 or less) Cleaning time: 30 seconds or less Suspend the circuit board in the solvent bath during ultrasonic cleaning in such a way that the ultrasonic vibrator does not come into direct contact with the circuit board or the device.
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3 General Safety Precautions and Usage Considerations
3.5.5
No cleaning
If analog devices or high-speed devices are used without being cleaned, flux residues may cause minute amounts of leakage between pins. Similarly, dew condensation, which occurs in environments containing residual chlorine when power to the device is on, may cause betweenlead leakage or migration. Therefore, Toshiba recommends that these devices be cleaned. However, if the flux used contains only a small amount of halogen (0.05W% or less), the devices may be used without cleaning without any problems.
3.5.6
Mounting tape carrier packages (TCPs)
(1) When tape carrier packages (TCPs) are mounted, measures must be taken to prevent electrostatic breakdown of the devices. (2) If devices are being picked up from tape, or outer lead bonding (OLB) mounting is being carried out, consult the manufacturer of the insertion machine which is being used, in order to establish the optimum mounting conditions in advance and to avoid any possible hazards. (3) The base film, which is made of polyimide, is hard and thin. Be careful not to cut or scratch your hands or any objects while handling the tape. (4) When punching tape, try not to scatter broken pieces of tape too much. (5) Treat the extra film, reels and spacers left after punching as industrial waste, taking care not to destroy or pollute the environment. (6) Chips housed in tape carrier packages (TCPs) are bare chips and therefore have their reverse side exposed. To ensure that the chip will not be cracked during mounting, ensure that no mechanical shock is applied to the reverse side of the chip. Electrical contact may also cause a chip to fail. Therefore, when mounting devices, make sure that nothing comes into electrical contact with the reverse side of the chip. If your design requires connecting the reverse side of the chip to the circuit board, please consult Toshiba or a Toshiba distributor beforehand.
3.5.7
Mounting chips
Devices delivered in chip form tend to degrade or break under external forces much more easily than plastic-packaged devices. Therefore, caution is required when handling this type of device. (1) Mount devices in a properly prepared environment so that chip surfaces will not be exposed to polluted ambient air or other polluted substances. (2) When handling chips, be careful not to expose them to static electricity. In particular, measures must be taken to prevent static damage during the mounting of chips. With this in mind, Toshiba recommend mounting all peripheral parts first and then mounting chips last (after all other components have been mounted). (3) Make sure that PCBs (or any other kind of circuit board) on which chips are being mounted do not have any chemical residues on them (such as the chemicals which were used for etching the PCBs). (4) When mounting chips on a board, use the method of assembly that is most suitable for maintaining the appropriate electrical, thermal and mechanical properties of the semiconductor devices used. * For details of devices in chip form, refer to the relevant device's individual datasheets.
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3 General Safety Precautions and Usage Considerations
3.5.8
Circuit board coating
When devices are to be used in equipment requiring a high degree of reliability or in extreme environments (where moisture, corrosive gas or dust is present), circuit boards may be coated for protection. However, before doing so, you must carefully consider the possible stress and contamination effects that may result and then choose the coating resin which results in the minimum level of stress to the device.
3.5.9
Heat sinks
(1) When attaching a heat sink to a device, be careful not to apply excessive force to the device in the process. (2) When attaching a device to a heat sink by fixing it at two or more locations, evenly tighten all the screws in stages (i.e. do not fully tighten one screw while the rest are still only loosely tightened). Finally, fully tighten all the screws up to the specified torque. (3) Drill holes for screws in the heat sink exactly as specified. Smooth the surface by removing burrs and protrusions or indentations which might interfere with the installation of any part of the device. (4) A coating of silicone compound can be applied between the heat sink and the device to improve heat conductivity. Be sure to apply the coating thinly and evenly; do not use too much. Also, be sure to use a non-volatile compound, as volatile compounds can crack after a time, causing the heat radiation properties of the heat sink to deteriorate. (5) If the device is housed in a plastic package, use caution when selecting the type of silicone compound to be applied between the heat sink and the device. With some types, the base oil separates and penetrates the plastic package, significantly reducing the useful life of the device. Two recommended silicone compounds in which base oil separation is not a problem are YG6260 from Toshiba Silicone. (6) Heat-sink-equipped devices can become very hot during operation. Do not touch them, or you may sustain a burn.
3.5.10
Tightening torque
(1) Make sure the screws are tightened with fastening torques not exceeding the torque values stipulated in individual datasheets and databooks for the devices used. (2) Do not allow a power screwdriver (electrical or air-driven) to touch devices.
3.5.11
Repeated device mounting and usage
Do not remount or re-use devices which fall into the categories listed below; these devices may cause significant problems relating to performance and reliability. (1) Devices which have been removed from the board after soldering (2) Devices which have been inserted in the wrong orientation or which have had reverse current applied (3) Devices which have undergone lead forming more than once
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3 General Safety Precautions and Usage Considerations
3.6
3.6.1
Protecting Devices in the Field
Temperature
Semiconductor devices are generally more sensitive to temperature than are other electronic components. The various electrical characteristics of a semiconductor device are dependent on the ambient temperature at which the device is used. It is therefore necessary to understand the temperature characteristics of a device and to incorporate device derating into circuit design. Note also that if a device is used above its maximum temperature rating, device deterioration is more rapid and it will reach the end of its usable life sooner than expected.
3.6.2
Humidity
Resin-molded devices are sometimes improperly sealed. When these devices are used for an extended period of time in a high-humidity environment, moisture can penetrate into the device and cause chip degradation or malfunction. Furthermore, when devices are mounted on a regular printed circuit board, the impedance between wiring components can decrease under highhumidity conditions. In systems which require a high signal-source impedance, circuit board leakage or leakage between device lead pins can cause malfunctions. The application of a moisture-proof treatment to the device surface should be considered in this case. On the other hand, operation under low-humidity conditions can damage a device due to the occurrence of electrostatic discharge. Unless damp-proofing measures have been specifically taken, use devices only in environments with appropriate ambient moisture levels (i.e. within a relative humidity range of 40% to 60%).
3.6.3
Corrosive gases
Corrosive gases can cause chemical reactions in devices, degrading device characteristics. For example, sulphur-bearing corrosive gases emanating from rubber placed near a device (accompanied by condensation under high-humidity conditions) can corrode a device's leads. The resulting chemical reaction between leads forms foreign particles which can cause electrical leakage.
3.6.4
Radioactive and cosmic rays
Most industrial and consumer semiconductor devices are not designed with protection against radioactive and cosmic rays. Devices used in aerospace equipment or in radioactive environments must therefore be shielded.
3.6.5
Strong electrical and magnetic fields
Devices exposed to strong magnetic fields can undergo a polarization phenomenon in their plastic material, or within the chip, which gives rise to abnormal symptoms such as impedance changes or increased leakage current. Failures have been reported in LSIs mounted near malfunctioning deflection yokes in TV sets. In such cases the device's installation location must be changed or the device must be shielded against the electrical or magnetic field. Shielding against magnetism is especially necessary for devices used in an alternating magnetic field because of the electromotive forces generated in this type of environment.
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3 General Safety Precautions and Usage Considerations
3.6.6
Interference from light (ultraviolet rays, sunlight, fluorescent lamps and incandescent lamps)
Light striking a semiconductor device generates electromotive force due to photoelectric effects. In some cases the device can malfunction. This is especially true for devices in which the internal chip is exposed. When designing circuits, make sure that devices are protected against incident light from external sources. This problem is not limited to optical semiconductors and EPROMs. All types of device can be affected by light.
3.6.7
Dust and oil
Just like corrosive gases, dust and oil can cause chemical reactions in devices, which will adversely affect a device's electrical characteristics. To avoid this problem, do not use devices in dusty or oily environments. This is especially important for optical devices because dust and oil can affect a device's optical characteristics as well as its physical integrity and the electrical performance factors mentioned above.
3.6.8
Fire
Semiconductor devices are combustible; they can emit smoke and catch fire if heated sufficiently. When this happens, some devices may generate poisonous gases. Devices should therefore never be used in close proximity to an open flame or a heat-generating body, or near flammable or combustible materials.
3.7
Disposal of Devices and Packing Materials
When discarding unused devices and packing materials, follow all procedures specified by local regulations in order to protect the environment against contamination.
23
4
Precautions and Usage Considerations Specific to Each Product Group
4.
Precautions and Usage Considerations Specific to Each Product Group
This section describes matters specific to each product group which need to be taken into consideration when using devices. If the same item is described in Sections 3 and 4, the description in Section 4 takes precedence.
4.1
4.1.1
Microcontrollers
Design
(1) Using resonators which are not specifically recommended for use Resonators recommended for use with Toshiba products in microcontroller oscillator applications are listed in Toshiba databooks along with information about oscillation conditions. If you use a resonator not included in this list, please consult Toshiba or the resonator manufacturer concerning the suitability of the device for your application. (2) Undefined functions In some microcontrollers certain instruction code values do not constitute valid processor instructions. Also, it is possible that the values of bits in registers will become undefined. Take care in your applications not to use invalid instructions or to let register bit values become undefined. (3) Scratch and puncture wounds by the point of a probe The tips of probes and adaptors used in development tools are individually designed to be compatible with particular devices. Probes for some devices have sharp points. When you handle them bare-handed, take care not to suffer a scratch or puncture wound.
24
4
Precautions and Usage Considerations Specific to Each Product Group
4.1.2
Reliability predictions for microcontroller devices
For microcontroller devices, the following junction temperature range is used for reliability predictions: Tj = 0C 85C An estimation of the chip junction temperature, Tj, can be obtained from the equation: Tj = Ta + Q xja where: Ta = ambient temperature (C) The assumption is that the ambient temperature is not affected by any heat transfers from the device. Q= chip's average power dissipation (W) ja = package thermal resistance (C/W)
Note 1: If you use a microcontroller device outside the 0 to 85C range for long periods of time, contact your nearest Toshiba office or authorized Toshiba dealer. Note 2: For the ja value, contact your nearest Toshiba office or authorized Toshiba dealer.
25
4
Precautions and Usage Considerations Specific to Each Product Group
26
TX1940 Application Note
TX1940 Application Note
Introductory Notes
Purpose
This application note is designed to help the user understand the TX1940. To this end, it illustrates the operation of a TX1940-based microcomputer system using detailed explanations of sample program running on the TX1940 Training Board (the TB1940). * The programs presented in this application note are only sample programs and are not guaranteed to operate within any specific application.
Target audience
This application note is aimed at people with a general knowledge of electronics, logic circuits, microcomputers and the C programming language.
Composition of this document
This application note is divided into the following chapters: Chapter 1 Chapter 2 Chapter 3 Overview of the TX1940 Description of the Hardware Explains the TX1940 hardware on which the sample programs are intended to run. Description of the Software Explains the sample application programs which have been designed to run on the TB1940. For details of the TX1940's hardware functions, instruction set and electrical characteristics, please refer to the databook for the TX1940CYAF and TX1940FDAF.
Related documentation
Documents relating to the device 32-Bit TX System RISC TX19 Family TX1940 (databook) Documents relating to development tools Microcomputer Development System Programming Tool Part (I)
i
TX1940 Application Note
ii
TX1940 Application Note
Chapter 1 Overview of the TX1940
This chapter describes the features and characteristics of the TX1940FDBF. Throughout this application note, unless otherwise stated the name "TX1940" denotes the TX1940FDBF.
1.1
Features
The TX19 Family of 32-bit RISC processors are high-performance successors to the Toshibadeveloped TX39 processor which was in turn based on the R3000ATM RISC microprocessor developed by the MIPS Group in the U.S.A. The high-code-efficiency MIPS16TM ASE (applicationspecific extension) extended instruction set makes the TX19 a high-performance 32-bit RISC processor family. The 32-bit TX1940 RISC microprocessor is built around the TX19L core processor, incorporates various peripheral functions and is capable of low-voltage operation and low power consumption. The features of the TX1940 are summarized below: (1) TX19L core processor 1) Provides increased code efficiency and arithmetic performance by virtue of the 16-Bit and 32Bit ISA (instruction set architecture) Modes. * * The 16-Bit ISA Mode instructions are object-compatible with the MIPS16TM ASE which exhibits excellent code efficiency. The 32-Bit ISA Mode instructions are object-compatible with the TX39 which exhibits excellent arithmetic performance.
*
2) Realizes both high performance and low power consumption. High performance * * * * * Almost all instructions are executed in a single clock period. 3-operand arithmetic instructions are used to increase performance. 5-stage pipeline processing Built-in high-speed ROM/RAM DSP function: A 32-bit multiplier accumlator (MAC) operation takes only 1 clock cycle to execute. Optimization achieved using low power consumption libraries Standby function to stop operation of the core processor Independent entry address for each interrupt source Automatically generates vector address for each interrupt source. Automatically updates interrupt mask level.
980508EBK1
*
Low power consumption * * * * *
3) Fast interrupt response suitable for real-time control
* TOSHIBA continually is working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook. * USP 4,382,279 owned by BULL CP8 * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
1-1
TX1940 Application Note (2) Internal RAM: 16 Kbytes Internal ROM: 512-Kbyte flash memory (3) External memory extension * Can be expanded to 16 Mbytes (shared between programs and data) * Coexisting 8-/16-bit external data buses (4) DMA controller: 4 channels * Activated by interrupt or by software (5) 8-bit timer: 4 channels (6) 16-bit timer: 4 channels (7) Data timer: 1 channel (8) General-purpose serial interface: 4 channels UART and synchronous modes: 2 channels UART-only: 2 channels (9) Serial bus interface: 1 channel Either I2C Bus Mode or Clock-Synchronous Mode can be selected. (10) 10-bit AD converter (with sample and hold circuit): 8 channels Conversion time: 10.75 s at 32 MHz (11) Watchdog Timer (12) Chip Select/Wait controller: 4 channels (13) Interrupt sources * CPU, 4 linessoftware interrupt instructions * Internal, 31 linesup to 7 priority levels can be set (but not for the Watchdog Timer interrupt). * External, 11 linesup to 7 priority levels can be set (but not for the NMI interrupt). (14) Input/Output ports 77 pins (15) Standby function * Four Standby modes (IDLE (HALT, DOZE), SLEEP, STOP) (16) Dual clocks * Low power consumption: Low-speed clock (32.768 kHz) * Timer for Real-Time Clock: Low-speed clock (32.768 kHz)) (17) Clock generator * Built-in PLL (x4) * Clock gear function: divides high-speed clock by 2, 4 or 8 (18) Only Little-endian is applied. * Byte 0 is the least significant byte (bit 7~0). * A word is addressed beginning with the most significant byte. (19) Operating voltage: 2.7 V~3.6 V (20) Operating frequency * 32 MHz (Vcc 3.0 V) (when interleaving used) * 27 MHz (Vcc 2.7 V) (when interleaving used) (21) Package * 100-pin QFP (14 x 14 x 1.4 (t) mm, 0.5-mm pitch)
Higher address 31 24 11 7 3 23 16 10 6 2 15 8 9 5 1 7 0 8 4 0 Word address 8 4 0
Lower address
1-2
TX1940 Application Note
TX19L Processor Core TX19 CPU
DSU (P37)
MAC
DSU
512 Kbyte Flash
16 Kbyte RAM 6 Kbyte BOOT ROM
DMAC (4ch) G-Bus
X1 X2 CG XT1 (P96) XT2 (P97) SCOUT (P44)
NMI
INT0 (P77) INT1-4 (PA0-3) INT5-A, (P74-5, P80-1, P83-4) EBIF
ADTRG (P53)
INTC
PLLOFF I/O bus I/F RESET (P00-P07) AD0-AD7 (P10-P17) AD8/A8-AD15/A15 (P20-P27) A0/A16-A7/A23
(P50-P57) AN0-AN7 AVCC, AVSS VREFH, VREFL TXD0 (P90) RXD0 (P91) (P92) SCLK0/ CTS0 TXD1 (P93) RXD1 (P94) (P95) SCLK1/ CTS1 SCK (PA5) SO/SDA (PA6) SI/SCL (PA7) TA0IN (P70) TA1OUT (P71) TA2IN (P72) TA3OUT (P73) TB0IN0/INT5 (P74) TB0IN1/INT6 (P75) TB0OUT (P76) TB1IN0/INT7 (P80) TB1IN1/INT8 (P81) TB1OUT (P82) TB2IN0/INT9 (P83) TB2IN1/INTA (P84) TB2OUT (P85)
10-bit ADC PORT0
PORT1 SIO0 PORT2
SIO1 PORT3 SERIAL BUS I/F
RD (P30) WR (P31) HWR (P32) WAIT (P33) BUSRQ (P34)
BUSAK (P35) R / W (P36)
P37 8-bit TMR0/1 (P40-P43) PORT4 CS0 - CS3 BW0/1
BOOT (P85) INTLV (P86)
8-bit TMR2/3
16-bit TMR0 WDT
16-bit TMR1
Data Timer
TXD3 (P70) 16-bit TMR2 SIO3 RXD3 (P71) TXD4 (P72)
TB3OUT (P86)
16-bit TMR3
SIO4
RXD4 (P73)
Figure 1.1
Block diagram of the TX1940FDBF
( ): Initial function after a Reset
1-3
TX1940 Application Note
1.2
Pin Assignment and Pin Functions
This section shows the pin assignment diagram for the TX1940FDBF and gives a brief description of the functions of each of its input and output pins.
1.2.1
Pin Assignment Diagram Figure 1.2.1 below is the pin assignment diagram for the TX1940FDBF.
88 P44/SCOUT DVSS P50/AN0 P51/AN1 P52/AN2 P53/AN3/ADTRG P54/AN4 P55/AN5 P56/AN6 P57/AN7 VREFH VREFL AVSS AVCC P70/TA0IN/TXD3 P71/TA1OUT/RXD3 P72/TA2IN/TXD4 P73/TA3OUT/RXD4 P74/TB0IN0/INT5 P75/TB0IN1/INT6 P76/TB0OUT P77/INT0 P80/TB1IN0/INT7 P81/TB1IN1/INT8 P82/TB1OUT P83/TB2IN0/INT9 P84/TB2IN1/INTA P85/TB2OUT/BOOT P86/TB3OUT/INTLV P87 P90/TXD0 P91/RXD0 P92/SCLK0/CTS0 P93/TXD1 P94/RXD1 P95/SCLK1/CTS1 BW0 CVCC X2 CVSS X1 BW1 RESET P96/XT1 P97/XT2 PLLOFF FVCC TEST FVSS PA0/INT1 89 90 91 92 93 94 95 96 97 98 99
100
87 DVCC 86 P43/CS3 85 P42/CS2 84 P41/CS1 83 P40/CS0 82 P37/DSU 81 P36/R/W 80 P35/BUSAK 79 P34/BUSRQ 78 P33/WAIT 77 P32/HWR 76 P31/WR 75 P30/RD 74 P27/A7/A23 73 P26/A6/A22 72 P25/A5/A21 71 P24/A4/A20 70 P23/A3/A19 69 P22/A2/A18 68 P21/A1/A17 67 P20/A0/A16 66 P17/AD15/A15 65 P16/AD14/A14 64 DVCC 63 NMI 62 DVSS 61 P15/AD13/A13 60 P14/AD12/A12 59 P13/AD11/A11 58 P12/AD10/A10 57 P11/AD9/A9 56 P10/AD8/A8 55 P07/AD7 54 P06/AD6 53 P05/AD5 52 P04/AD4 51 P03/AD3 50 P02/AD2 49 P01/AD1 48 P00/AD0 47 DVCC 46 ALE 45 DVSS 44 PA7/SI/SCL 43 PA6/SO/SDA 42 PA5/SCK 41 PA4/SDAO 40 PA3/INT4 39 PA2/INT3 38 PA1/INT2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
Figure 1.2.1
Pin assignment diagram (100-pin LQFP)
1-4
TX1940 Application Note
1.3
Pin Names and Functions
Table 1.3.1 below lists the names and functions of the TX1940FDBF's input/output pins.
Table 1.3.1 Pin Name # of Pins
8 8
Pin names and functions Description
Type
Input/output Input/output Input/output Input/output Output Input/output Output Output Output Output Output Output Input/output Output Input/output Input Input/output Input Input/output Output Input/output Output Input/output Input
P00~P07 AD0~AD7 P10~P17 AD8~AD15 A8~A15 P20~P27 A0~A7 A16~A23 P30
8
1 1 1 1 1 1
RD P31 WR P32 HWR P33 WAIT P34
BUSRQ
Port 0: input/output port each bit of which can be set independently for input or output Address (lower): address/data bus 0~7 Port 1: input/output port each bit of which can be set independently for input or output Address/Data (upper): address/data bus 8~15 Address: address bus 8~15 Port 2: input/output port each bit of which can be set independently for input or output Address: address bus 0~7 Address: address bus 16~23 Port 30: output-only port Read: strobe signal for reading from external memory Port 31: output-only port Write: strobe signal for writing data to pins D0~D7 Port 32: input/output port (with internal pull-up resister) High-order write: strobe signal for writing data to pins D8~D15 Port 33: input/output port (with internal pull-up resister) Wait: Bus Wait request to the CPU Port 34: input/output port (with internal pull-up resister) Bus request: signal used by external master to request the CPU for control of the bus Port 35: input/output port (with internal pull-up resister) Bus acknowledge: signal used to acknowledge that, having received a BUSRQ signal, the CPU has relinquished control of the bus Port 36: input/output port (with internal pull-up resister) Read/write: an output value of 1 indicates that the current cycle is a Read cycle or a dummy cycle; a value of 0 indicates that it is a Write cycle. Port 37: input/output port (with internal pull-up resister) DSU Enable signal: DSU is sampled with the rising edge of the RESET signal. If it is detected as asserted (low), the TX1940FDBF enters DSU mode. If it is detected as deasserted (high), the TX1940FDBF enters normal operating mode. Port 40: input/output port (with internal pull-up resister) Chip Select 0: outputs a 0 when the address is within a specified address area. Port 41: input/output port (with internal pull-up resister) Chip Select 1: outputs a 0 when the address is within a specified address area. Port 42: input/output port (with internal pull-up resister) Chip Select 2: outputs a 0 when the address is within a specified address area. Port 43: input/output port (with internal pull-up resister) Chip Select 3: outputs a 0 when the address is within a specified address area. Port 44: input/output port System clock output: outputs the same high- or low-frequency clock as the CPU. Port 5: input-only port Analog input: input to the AD converter AD trigger: external start request for the AD converter (shared with P53) Port 70: input/output port 8-bit Timer 0 input: input to Timer 0 Serial transmission data 3: open-drain output as set by program Port 71: input/output port 8-bit Timer 1 output: output from Timer 0 or Timer 1 Serial receive data 3 Port 72: input/output port 8-bit Timer 2 input: input to Timer 2 Serial Transmission Data 4: open-drain output as set by program
P35
BUSAK
P36
R/W
1
P37
DSU
1
P40 CS0 P41 CS1 P42 CS2 P43 CS3 P44 SCOUT P50~P57 AN0~AN7
ADTRG
1 1 1 1 1 8
Input/output Output Input/output Output Input/output Output Input/output Output Input/output Output Input Input Input Input/output Input Output Input/output Output Input Input/output Input Output
P70 TA0IN TXD3 P71 TA1OUT RXD3 P72 TA2IN TXD4
1
1
1
1-5
TX1940 Application Note
Pin Name
P73 TA3OUT RXD4 P74 TB0IN0 INT5 P75 TB0IN1 INT6 P76 TB0OUT P77 INT0 P80 TB1IN0 INT7 P81 TB1IN1 INT8 P82 TB1OUT P83 TB2IN0 INT9 P84 TB2IN1 INTA P85 TB2OUT BOOT
# of Pins
1
Type
Input/output Output Input Input/output Input Input Input/output Input Input Input/output Output Input/output Input Input/output Input Input Input/output Input Input Input/output Output Input/output Input Input Input/output Input Input Input/output Output Input
Description
Port 73: input/output port 8-bit Timer 3 output: output from Timer 2 or Timer 3 Serial Receive Data 4 Port 74: input/output port 16-bit Timer 0 input 0: count/capture trigger input to 16-bit Timer 0 Interrupt Request pin 5: High/Low level or rising/falling edge can be selected as trigger. Port 75: input/output port 16-bit Timer 0 input 1: capture trigger input to 16-bit Timer 0. Interrupt Request pin 6: High/Low level or rising/falling edge can be selected as trigger. Port 76: input/output port 16-bit Timer 0 output: output from 16-bit Timer 0 Port 77: input/output port Interrupt Request pin 0: High/Low level or rising/falling edge can be selected as trigger. Port 80: input/output port 16-bit Timer 1 input 0: count/capture trigger input to 16-bit Timer 1 Interrupt Request pin 7: High/Low level or rising/falling edge can be selected as trigger. Port 81: input/output port 16-bit Timer 1 input 1: capture trigger input to 16-bit Timer 1 Interrupt Request pin 8: High/Low level or rising/falling edge can be selected as trigger. Port 82: input/output port 16-bit Timer 1 output: output from 16-bit Timer 1 Port 83: input/output port 16-bit Timer 2 input 0: count/capture trigger input to 16-bit Timer 2 Interrupt Request pin 9: High/Low level or rising/falling edge can be selected as trigger. Port 84: input/output port 16-bit Timer 2 input 1: capture trigger input to 16-bit Timer 2 Interrupt Request pin A: High/Low level or rising/falling edge can be selected as trigger. Port 85: input/output port 16-bit Timer 2 output: output from 16-bit Timer 2 Single-Boot Mode set-up pin: BOOT is sampled with the rising edge of the RESET signal. If it is detected as asserted (low), the TX1940FDBF enters single boot mode, which enables the integrated flash memory to be reprogrammed. If it is detected as deasserted (high), the TX1940FDBF enters normal operating mode. Port 86: input/output port 16-bit Timer 3 output: output from 16-bit Timer 3 Interleave Mode set-up pin: INTLV is sampled with the rising edge of the RESET signal. If it is detected as asserted (high), the TX1940FDBF enters interleave mode. During reset, it must be pulled up when interleave mode is used and must be pulled down otherwise. Port 87: input/output port This pin is used for mode setting. The device samples 0 on the rising edge of the reset signal. This pin must be pulled Low during reset sequence. Port 90: input/output port Serial Transmission Data 0: open-drain output as set by program Port 91: input/output port Serial Receive Data 0 Port 92: input/output port Serial Clock Input/Output 0 Serial data ready to send 0 (Clear to Send) Port 93: input/output port Serial Transmission Data 1: open-drain output as set by program Port 94: input/output port Serial Receive Data 1 Port 95: input/output port Serial Clock Input/Output 1 Serial data ready to send 1 (Clear to Send) Port 96: input/output port (open-drain output) Low-frequency oscillator connecting pin
1
1
1 1 1
1
1 1
1
1 1
P86 TB3OUT INTLV
1
Input/output Output Input
P87
1
Input/output
P90 TXD0 P91 RXD0 P92 SCLK0
CTS0
1 1 1
Input/output Output Input/output Input Input/output Input/output Input Input/output Output Input/output Input Input/output Input/output Input Input/output Input
P93 TXD1 P94 RXD1 P95 SCLK1
CTS1
1 1 1
P96 XT1
1
1-6
TX1940 Application Note
Pin Name
P97 XT2 PA0~PA3 INT1~INT4 PA4 PA5 SCK PA6 SO SDA PA7 SI SCL ALE
# of Pins
1 4
Type
Input/output Output Input/output Input Input/output Input/output Input/output Input/output Output Input/output Input/output Input Input/output Output Input Input Input Input Input Input Input Input/output
Description
Port 97: input/output port (open-drain output) Low-frequency oscillator connecting pin Ports A0~A3: input/output ports Interrupt Request pins 1~4: High/Low level or rising/falling edge can be selected as trigger. Port A4: input/output port Port A5: input/output port Clock input/output pin in serial bus interface SIO Mode Port A6: input/output port Data transmission pin in serial bus interface SIO Mode Data transmission/receive pin in serial bus interface I2C Mode Open-drain output as set by program Port A7: input/output port Data receive pin in serial bus interface SIO Mode Clock input/output pin in serial bus interface I2C Mode Open-drain output as set by program Address Latch Enable. (This is only output when external memory is being accessed.) Non-Maskable Interrupt Request pin: falling edge interrupt request pin Set both BW0 and BW1 to 1. Set TEST to 0. If the PLL multiplied clock is not being used, fix this input Low. If the PLL multiplied clock is used, fix this input high. Reset (with internal pull-up resister): Initializes the LSI. Reference voltage input pin (H) for the AD converter. It must be connected to AVCC when the A/D converter is not used. Reference voltage input pin (L) for the AD converter. It must be connected to AVCC when the A/D converter is not used. AD converter power supply pin (*) AD converter GND pin (0 V) (**) Resonator/Oscillator connecting pin Power supply pin GND pin (0 V)
1 1 1
1
NMI BW0~1 TEST
PLLOFF RESET VREFH VREFL AVCC AVSS X1/X2 DVCC, CVCC, FVCC DVSS, CVSS, FVSS
1 1 2 1 1 1 1 1 1 1 2 5 5
Note:
When the DSU (debug support unit) is enabled, port A functions as an interface to the DSU tool irrespective of the Port A Function Register (PAFC) and Port A Control Register (PACR) settings. (However, INT1~INT4 and the serial bus interface cannot be used.)
1-7
TX1940 Application Note
DSU Tool Debug Interface The pins listed below serve as interface signals for an external real-time debug system when DSU is detected as asserted (low) on the rising edge of RESET . DSU has an internal pull-up resistor.
DRESET
I
Debug Reset
DRESET DRESET signal for an external real-time debug system
(PA7) DCLK (PA0)
DBGE
O
Debug Clock DCLK signal for an external real-time debug system
I
Debugger Enable
DBGE signal for an external real-time debug system
(PA5) PCST[2] (PA1) PCST[1] (PA2) PCST[0] (PA3) SDI/ DINT (PA6) SDAO/TPC (PA4) O
PC Trace Status [2] PCTS[2] signal for an external real-time debug system
O
PC Trace Status [1] PCST[1] signal for an external real-time debug system
O
PC Trace Status [0] PCTS[0] signal for an external real-time debug system
I
Serial Data Input / Debug Interrupt SDI/ DINT signal for an external real-time debug system
O
Serial Data and Address Output/Target PC SDAO/TPC signal for an external real-time debug system
Note:
P37, P85, P86 and P87 must remain high or low as specified for a system clock cycle before and after the rising edge of the RESET signal. The RESET pin must remain stable when it is both high and low.
1-8
TX1940 Application Note
1.4
Clock/Standby Control
There are essentially two modes of clock operation: Single-Clock Mode (which uses only the X1 and X2 pins) and Dual-Clock Mode (which uses the pin pairings X1, X2 and XT1, XT2). Figure 1.4.1 shows the state transition diagram for each operation mode.
Reset Reset de-asserted IDLE Mode (CPU halted) (I/O Select operation) Instruction Interrupt NORMAL Mode (fc/gear value) Instruction Interrupt STOP Mode (all circuits turned off)
(a) State transitions in Single-Clock Mode
Reset Reset de-asserted IDLE Mode (CPU halted) (I/O Select operation) Instruction Interrupt Instruction Interrupt SLEEP Mode (fs only) (only date timer operating) Instruction Interrupt NORMAL Mode (fc/gear value) Interrupt Instruction Interrupt Interrupt Instruction STOP Mode (all circuits turned off)
SLOW Mode (fs)
Note 1: Before transition to SLOW/SLEEP Mode can occur, the low-speed oscillator (fs) must be oscillating stably. Note 2: When SLEEP Mode is terminated, the device returns to the state in which it was placed before entering SLEEP Mode. Note 3: The state to which the device returns when STOP Mode is terminated can be specified using system control register SYSCR0.
(b) State transition in Dual-Clock Mode Figure 1.4.1 State transition diagrams for each mode
Reset Reset de-asserted PLLOFF pin (High) PLL clock used NORMAL Mode fc = fpll = foscx4 fsys = fc/8 fsys = fosc/2 fperiph = fsys
Reset Reset de-asserted PLLOFF pin (Low) PLL not used NORMAL Mode fc = fosc/2 fsys = fc/8 fsys = fosc/16 fperiph = fsys
A. When using a clock generated using the PLL
B. When not using the PLL
Figure 1.4.2 Default states both when using a PLL and when not using a PLL
fosc: Clock frequency input via X1 and X2 pins fs: Clock frequency input via XT1 and XT2 pins fpll: Clock frequency multiplied (x4) by PLL fc: Clock frequency selected by setting of PLLOFF pin fgear: Clock frequency selected by SYSCR1 System clock fsys: Clock frequency selected by SYSCR1 fperiph: Input clock for peripheral I/O prescaler
1-9
TX1940 Application Note
1.5
Memory Map
The memory map for the TX1940 is shown in Figure 1.5.1.
Normal Mode
Internal I/O (Reserved) 0xFFFF_FFFF 0xFFFF_E000
Boot Mode
Internal I/O (Reserved) 0xFFFF_FFFF 0xFFFF_E000
Programmer Mode
Not accessible 0xFFFF_FFFF
Internal RAM (16 KB) 0xFFFF_BFFF Internal RAM (16 KB) 0xFFFF_BFFF 0xFFFF_8000 0xFFFF_8000 (Reserved) (Reserved) 0xFF3F_FFFF Used for debugging (reserved) 0xFF20_0000 (Reserved) 0xFF00_0000 0xC000_0000 0xBF00_0000 0x4007_FFFF Internal flash ROM 0x4000_0000 Not accessible (512 MB) 0x2000_0000 Not accessible (512 MB) 0x2000_0000 Not accessible 0x1FC7_FFFF User program area Maskable interrupt area Exception vector area 0x1FC0_0000 0x0000_0000 Note 1: The addresses shown above are physical addresses. 0x1FC0_0400 0x1FC0_17FF 0x0007_FFFF 0x1FC0_0000 0x0000_0000 Internal flash ROM 0x0000_0000 0x4000_0000 Not accessible (512 MB) 0x2000_0000 0x4000_0000 (Reserved) Used for debugging (reserved) 0xFF20_0000 0xFF00_0000 0xC000_0000 Not accessible 0xBF00_0000 0x4007_FFFF 0xFF3F_FFFF
0xC000_0000
(Reserved)
(Reserved)
Internal ROM shadowed here
Boot ROM (6 KB)
Figure 1.5.1 TX1940FDBF memory map for each mode
Low 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 16 KB 8 KB 4 KB 4 KB Block-0 Block-1 Block-2 Block-3 Block-4 Block-5 Block-6 Block-7 Block-8 Block-9 Block-10 Block-11 Block-12 Block-13 Block-14 Block-15 Block-16 Block-17 Block-18
Address 512 KB
High
Figure 1.5.2
Block allocation
1-10
TX1940 Application Note
Table 1.5.1 User Boot Mode
Block-0 Block-1 Block-2 Block-3 Block-4 Block-5 Block-6 Block-7 Block-8 Block-9 Block-10 Block-11 Block-12 Block-13 Block-14 Block-15 Block-16 Block-17 Block-18 0x1FC0_0000 0x1FC0_7FFF (or 0x4000_0000 0x4000_7FFF) 0x1FC0_8000 0x1FC0_FFFF (or 0x4000_8000 0x4000_FFFF) 0x1FC1_0000 0x1FC1_7FFF (or 0x40010000 0x4001_7FFF) 0x1FC1_8000 0x1FC1_FFFF (or 0x4001_8000 0x4001_FFFF) 0x1FC2_0000 0x1FC2_7FFF (or 0x4002_0000 0x4002_7FFF) 0x1FC2_8000 0x1FC2_FFFF (or 0x4002_8000 0x4002_FFFF) 0x1FC3_0000 0x1FC3_7FFF (or 0x4003_0000 0x4003_7FFF) 0x1FC3_8000 0x1FC3_FFFF (or 0x4003_8000 0x4003_FFFF) 0x1FC4_0000 0x1FC4_7FFF (or 0x4004_0000 0x4004_7FFF) 0x1FC4_8000 0x1FC4_FFFF (or 0x4004_8000 0x4004_FFFF) 0x1FC5_0000 0x1FC5_7FFF (or 0x4005_0000 0x4005_7FFF) 0x1FC5_8000 0x1FC5_FFFF (or 0x4005_8000 0x4005_FFFF) 0x1FC6_0000 0x1FC6_7FFF (or 0x4006_0000 0x4006_7FFF) 0x1FC6_8000 0x1FC6_FFFF (or 0x4006_8000 0x4006_FFFF) 0x1FC7_0000 0x1FC7_7FFF (or 0x4007_0000 0x4007_7FFF) 0x1FC7_8000 0x1FC7_BFFF (or 0x4007_8000 0x4007_BFFF) 0x1FC7_C000 0x1FC7_DFFF (or 0x4007_C000 0x4007_DFFF) 0x1FC7_E000 0x1FC7_EFFF (or 0x4007_E000 0x4007_EFFF) 0x1FC7_F000 0x1FC7_FFFF (or 0x4007_F000 0x4007_FFFF)
Block address range by mode Boot Mode
0x1FC0_0000 0x1FC0_7FFF 0x1FC0_8000 0x1FC0_FFFF 0x1FC1_0000 0x1FC1_7FFF 0x1FC1_8000 0x1FC1_FFFF 0x1FC2_0000 0x1FC2_7FFF 0x1FC2_8000 0x1FC2_FFFF 0x1FC3_0000 0x1FC3_7FFF 0x1FC3_8000 0x1FC3_FFFF 0x1FC4_0000 0x1FC4_7FFF 0x1FC4_8000 0x1FC4_FFFF 0x1FC5_0000 0x1FC5_7FFF 0x1FC5_8000 0x1FC5_FFFF 0x1FC6_0000 0x1FC6_7FFF 0x1FC6_8000 0x1FC6_FFFF 0x1FC7_0000 0x1FC7_7FFF 0x1FC7_8000 0x1FC7_BFFF 0x1FC7_C000 0x1FC7_DFFF 0x1FC7_E000 0x1FC7_EFFF 0x1FC7_F000 0x1FC7_FFFF
Programmer Mode
0x0000_0000 0x0000_7FFF 0x0000_8000 0x0000_FFFF 0x0001_0000 0x0001_7FFF 0x0001_8000 0x0001_FFFF 0x0002_0000 0x0002_7FFF 0x0002_8000 0x0002_FFFF 0x0003_0000 0x0003_7FFF 0x0003_8000 0x0003_FFFF 0x0004_0000 0x0004_7FFF 0x0004_8000 0x000_4FFFF 0x0005_0000 0x0005_7FFF 0x0005_8000 0x0005_FFFF 0x0006_0000 0x0006_7FFF 0x0006_8000 0x0006_FFFF 0x0007_0000 0x0007_7FFF 0x0007_8000 0x0007_BFFF 0x0007_C000 0x0007_DFFF 0x0007_E000 0x0007_EFFF 0x0007_F000 0x0007_FFFF
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TX1940 Application Note
1.6
Sample Circuit for Connecting External Memory
A sample circuit for connecting external devices using the TX1940's bus interface pins is shown below.
TX1940CY
A16 - 17 AD8 - 15
Latch x 16 DQ A16 A1 - 15
ROM (128 Kbit x 16) A15 A0 - 14 OE CE RAM (128 Kbit x 8) A16 - 17 A1 - 15 A15 - 16 A0 - 14 OE R/W Upper byte CE1 RAM (128 Kbit x 8) A16 - 17 A1 - 15 A15 - 16 A0 - 14 OE R/W Lower byte CE1 I/01 - 8 I/01 - 8 D8 - 15 D0 - 7
AD0 - 7 ALE CS2
LE
RD HWR
CS1 WR
BW1 BW0
Figure 1.6.1
Example of external memory connection (ROM width = 16 bits, RAM width = 16 bits)
When the TX1940CYAF is reset, the Port 4 Control Register (P4CR) and Port 4 Function Register (P4FC) are both cleared to 0, so that the CS signal output is disabled. To output a CS signal from this port, set the corresponding bits in these registers to 1, first in P4FC and then in P4CR.
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TX1940 Application Note
Chapter 2 Description of the Hardware
This chapter describes the hardware of the TX1940-based evaluation board used to run the applications described in Chapter 3, Description of the Software. In these application notes the hardware is referred to as the TB1940 (TX1940 Training Board).
2.1
Overview
The main features of the TB1940 are as follows: (1) CPU: TX1940FDBF (2) Operating frequencies: 32 MHz 32 kHz (generated by low-frequency oscillator) (3) Power supply voltage: 3.3 V (4) Internal ROM: 512 Kbytes (flash ROM) (5) Internal RAM: 16 Kbytes (6) RS-232C: 2 channels (internal SIO channels 0 and 1 used) (*2) (7) Interrupt input switches: INT0, NMI In addition, the TB1940 has the following circuits attached external to the chip. (1) ROM: 512 Kbytes (*1) (2) SRAM: 512 Kbytes (*1) (3) Switches: AD conversion key, matrix key (4) Light-emitting diodes: 4 digits, each comprising a 7-seg LED; 8 indicator LEDs (5) Photosensor (6) Voice input (7) Volume control (8) Motor (9) I2C bus specification E2PROM (10) Piezo-electric buzzer
(*1)
In the sample programs presented in Chapter 3, only the internal ROM and RAM are used; the external ROM and RAM shown above are not used. The sample program presented in Chapter 3 uses only Channel 1 of the SIO; Channel 0 is not used.
(*2)
2-1
TX1940 Application Note
2.2
Board Configuration
TX1940 VREFH Flash ROM 512 Kbytes A23-A16 AD15-AD00 RD, WR, HWR, CS AN0 3.3 V MIC input MIC-AMP (TA2011S) Photosensor (TLP862)
AN1 SRAM 512 Kbytes AN2
Switch
INT0 input
INT0
AN3
Variable resistor GND
VREFL NMI input NMI P76, 75, 72, 70, 44 P57-54 RS-232C (ch-0) RS-232C (ch-1) TXD0, RXD0, CTS0 P87-80 TXD1, RXD1, CTS1
Matrix switch
7SEG-LED
pull-up PA4-PA0 BW0 BW1 PLL-Off INTLV PLL-Off BOOT 32 KHz Osc.
LED
Motor TA3OUT TB0IN0 Motor driver M
XT1, XT2 TA1OUT
Pulse output Piezo-electric buzzer
8 MHz Osc.
X1, X2
SCL, SDA
I2CBUS EEPROM
RESET input
RESET
Figure 2.2.1 Configuration of the TX1940 Board
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TX1940 Application Note
2.3
2.3.1
Peripheral Circuits
I2C Bus Specification EEPROM
3.3 V 3.3 V
SDA SCL 3.3 V Vcc SDA SCL 22 K
NM24C02LM8 A2 3.3 V A1 A0 GND
Figure 2.3.1 I2C bus specification E2PROM
2.3.2
Motor
3.3 V TX1940 22 K 390 TA3OUT 74VHCT14 MP4015 12 V 2FWJ42M Motor PG output
74VHCT14 TB0IN0
Figure 2.3.2 Motor
2-3
TX1940 Application Note 2.3.3 Photosensor
3.3 V TLP862P 1 4 TX1940FDBF AN1
2
3
Figure 2.3.3
Photosensor
2.3.4
Volume control
Vref-H 100 K B type Vref-L AN3
Figure 2.3.4
Volume control
2.3.5
AD conversion key switch
3.3 V Read Write Stop IDLE SLEEP CLEAR
4.7 K
1.2 K
2.0 K
3.9 K
12.0 K
AN2
Figure 2.3.5
AD conversion key switch
2-4
TX1940 Application Note 2.3.6 Voice input
TA2011S
12 V
1
2
3
4
5
6
7
NC
+ 47 F
+
+ Vref-H 47 F 22 K
Microphone input
+ 2.2 K 1 M 10 F AN0 3.3 F 22 K
Vref-L
Figure 2.3.6
Voice input
2.3.7
RS-232C
P90 P91 P92 Pull up 25 Pin DSUB RS-232C Driver TXD0 RXD0 CTS0 RTS0
P93 P94 P95 Pull up 9 Pin DSUB RS-232C Driver
TXD RXD1 CTS1 RTS1
Figure 2.3.7 RS-232C
2-5
TX1940 Application Note 2.3.8 Light-emitting diodes
120 74LCX540 7 SEG LED 7 SEG LED 7 SEG LED 7 SEG LED
P87-80
PA0
PA4
PA3
PA2
PA1
TD62003
Figure 2.3.8 Light-emitting diodes
2-6
TX1940 Application Note 2.3.9 Diode matrix key switch
74LCX540
P76
P75
Push Sw
P72
P70
P44 P54 P55 P56 P57 47 K 47 K 47 K 47 K
Figure 2.3.9 Diode matrix key switch
2.3.10
Piezo-electric buzzer
1 K TA1OUT
Piezo-electric buzzer
Figure 2.3.10
Piezo-electric buzzer
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TX1940 Application Note
2.4
Parts List for TB1940
Part Name
Buzzer Ceramic capacitors Ceramic capacitors Ceramic capacitors Ceramic capacitor Electrolytic capacitor Electrolytic capacitor Electrolytic capacitors Electrolytic capacitors Electrolytic capacitor Electrolytic capacitors Coil RS-232C connector (25-pin) RS-232C connector (9-pin) Diodes Diode I2C bus E2PROM RS-232C drivers SRAM chips Flash ROM Microphone amp Microcontroller Regulator Regulator Logic IC Logic ICs Logic ICs Logic ICs Logic ICs Logic ICs Logic ICs Logic ICs 7-segment LEDs Light-emitting diodes Light-emitting diodes Variable resistor Resistors Resistors Resistors Resistor Resistors Resistors Resistors Resistor Resistor Resistors Resistor Resistors Resistor Resistor
Type Number
PKM11-4A0 DD104633CH330J50 RPE114R155K50 SR295F104Z SR305F105Z KME25VB-100M KME25VB-10M KME25VB-33M KME25VB-47M KME50VB-3.3M KME50VB-4.7M DSS310-55D223S RDBD-25S-LNA RDEB-9P-LNA 1SS133 2FWJ42M NM24C02FLZEM MAX3243CAI TC55V1001AF-85 TC58FVT400F-85 TA2011S TMP1940FDBF TA48M033F TA48M05F TC74LCX04F TC74LCX138F TC74LCX245F TC74LCX373F TC74VHC14F TC74VHC540F TC74VHC541F TC74VHC574F TLR336S TLG102A TLR102A RJ-6P100K RKLB4-221J RKLB8-473J MFL1/4-101 MFL1/4-102 MFL1/4-103 MFL1/4-105 MFL1/4-121 MFL1/4-122 MFL1/4-123 MFL1/4-202 MFL1/4-222 MFL1/4-223 MFL1/4-391 MFL1/4-392
Rating
33 pf 1.5 F 0.1 F 1 F 100 F 10 F 33 F 47 F 3.3 F 4.7 F
No. of Items
1 4 4 44 1 1 1 2 3 1 2 1 1 1 20 1 1 2 4 1 1 1 1 1 1 3 2 2 2 2 6 2 4
Green LED Red LED 220 x 4 47 K x 8 100 1 K 10 K 1 M 120 1.2 K 12 K 2 K 2.2 K 22 K 390 3.9 K
16 8 1 4 6 3 1 7 2 8 1 1 3 1 2 1 1
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TX1940 Application Note
Part Name
Resistors Resistors IC socket IC socket Short pins Short terminals DIP switches Toggle switches Push switches Transistor array Transistor array Photo-interrupter Crystal resonator Crystal resonator
Type Number
MFL1/4-473 MFL1/8-203 IC149-100-025S5 IC179-44600-110 DIC-128A DIC-149-3P DSS104 G-12AP DP1-120-K MP4015 TD62503PA TLP862 C-2-TYPE-32K CA-301-8M
Rating
47 K 20 K For the CPU For the F-ROM
No. of Items
7 3 1 1 4 4 2 2 20 1 1 1 1 1
2-9
TX1940 Application Note
2.5
Circuit Diagram
2-10
TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
2-18
TX1940 Application Note
2-19
TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
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TX1940 Application Note
Chapter 3 Description of the Software
3.1 Introduction
Sections 3.1.1 and 3.1.2 of this chapter explain the common start-up routine and link command file which are used by all the sample programs. Interrupt handling is explained in Section 3.1.3. The sample programs are compiled and assembled using Version 1.1 of the C compiler and assembler package for the TX19 Family of Toshiba microprocessors. 3.1.1 Overview of the start-up routine The start-up routine is the program which is executed immediately after a reset; it performs the following processing operations: * * * * * * * Definition of start-up routine variables and the like Initialization of the registers Initialization of system status (CP0 system control coprocessor settings) Initialization of external variable areas Call to main function
In addition, it may be necessary to include the following: Definitions of ANSI C library external variables and of certain functions from the ANSI C library Interrupt handler
This section explains the various definitions and processes which are coded in the start-up routine.
3.1.1.1 Start-up processing
For the purposes of explanation, the start-up routine is divided into four separate sections as follows: 1. 2. Symbol definition section: Defines symbols and the like used in the start-up routine. Start-up proper: Initializes the system, registers and memory, and calls the function main.
3. Exception handler section: Describes the processing which will be performed when an exception occurs. 4. Interrupt handler section: Describes the processing which will be performed when an interrupt occurs. Symbol definition section A typical start-up routine definition section is as follows:
;=== [User definition section] This section must always be included.=== (a) StackBase equ 0x0xffffba00 ;Address of stack base HeapTop equ 0x0xffffba00 ;Address of base of heap area HeapSize equ 0x400 ;Size of heap area ;### Interrupt Vector Register ;IVR equ 0xffffe040 ;=== [External functions and variable definitions] This section must always be included.=== (b)
(c)
3-1
TX1940 Application Note
t_area t_data t_const n_area n_data n_const f_area f_data f_const extern extern extern extern extern extern extern section section section section section section section section section large large large large large large large data data romdata data data romdata data data romdata small small small medium medium medium large large large ;Section where tiny-area variables whose initial values are undefined are located ;Section where tiny-area variables whose initial values are defined are located ;Section where tiny-area constants are located ;Section where near-area variables whose initial values are undefined are located ;Section where near-area variables whose initial values are defined are located ;Section where near-area constants are located ;Section where far-area variables whose initial values are undefined are located ;Section where far-area variables whose initial values are defined are located ;Section where far-area constants are located
TinyData,NearData,FarData TinyArea,NearArea,FarArea tinyAreaSize,nearAreaSize,farAreaSize tinyDataSize,nearDataSize,farDataSize tinyAreaOrg,nearAreaOrg,farAreaOrg tinyDataOrg,nearDataOrg,farDataOrg _main ;External reference declarations for main() written using 32-bit ISA instruction set instructions (d)
;When using interrupt functions, insert external declarations here.
;=== [Heap area definition] This section must always be included when malloc, calloc or realloc are used.=== n_data ection public public public ata medium _SBRK_break ;Start pointer for heap area _SBRK_size ;Size of heap area __allocb ;Control pointer for heap area dw HeapTop dw HeapSize dw 0 data abs=HeapTop HeapSize ;Heap area align=1,1
_SBRK_break _SBRK_size _ _allocb HeapArea heap section dsb
;=== [error definition] This section must always be included when arithmetic functions are used.=== n_area _errno section public dsw data _errno 1 medium
;=== [Standard library functions (32-bit ISA): exit()] Rewrite this section before use. === f_code section code isa32 public _exit _exit: j _exit nop ;=== [Standard library functions (16-bit ISA): exit()] Rewrite this section before use. === n_code section code isa16 public .exit .exit: b .exit ;=== [Standard library functions (32-bit ISA): abort()] Rewrite this section before use.=== f_code section code isa32 public _abort _abort: j _abort nop ;=== [Standard library functions (16-bit ISA): abort()] Rewrite this section before use.=== n_code section code isa16 public .abort .abort: b .abort
(e)
(f)
(g)
(h)
3-2
TX1940 Application Note The letters shown on the extreme right in the program listing correspond to the letters shown in the text in brackets before each section title. (a) User definition section This section defines the base addresses for the stack and heap areas, and the size of the heap area. In this case the stack and heap areas have the same base address, with the stack growing downwards in memory and the heap area growing upwards. The heap size is 400H; hence the heap area ranges from FFFFBA00H~FFFFBDFFH. (b) Declaration of the Interrupt Vector Register Declaring the Interrupt Vector Register IVR in this fashion facilitates the writing of code for the vector processing of hardware interrupts. For the TX1940 Series, IVR is at address FFFFE040H. (c) Definition of external functions and variables For some MCUs, part of the tiny-area (0H~00007FFFH) is missing. If this is the case, delete or comment out all declarations and routines associated with the tiny-area. In the above example this would entail deleting (or commenting out) t_area, t_data, t_const, TinyArea, tinyAreaSize, tinyAreaOrg, TinyData, tinyDataSize and tinyDataOrg. The same applies to the data initialization section explained below. (d) External declaration of interrupt functions If interrupt functions are to be used, they must be declared using extern declarations in the same way that the main function is declared. This enables the interrupt function names to be referenced in the interrupt vector definition section. Because interrupt functions are always written using 32-bit ISA instruction set instructions, they must be declared as shown below.
extern large _intrptFunc
The above example illustrates the declaration of the 32-bit ISA function intrptFunc. (e), (f), (g) and (h) Standard library functions The standard library functions exit() and abort() are not included in the standard libraries (c9ib.lib and c9il.lib). To use these functions, it is necessary to write some additional program statements. As in the above example, this program code can be included in the file which contains the start-up routine. Example of the start-up proper
ResetStart section code isa32 public _ _startup _ _startup: ;----------------------------------------------------------------------;[Register initialization] This section must always be included. lui addiu lui addiu sp,hi(StackBase) sp,sp,lo(StackBase) gp,hi(__gp) gp,gp,lo(__gp) ;Sets stack pointer. ;Sets global pointer.
a) b)
;Initializing the system control coprocessor (CP0) lui r2,0x1040 addiu r2,r2,0x0000 mtc0 r2,r12 ;Sets Status Register.
c)
3-3
TX1940 Application Note
;Clearing IVR register to 0 lui r2,hi(IVR) addiu r2,r2,lo(IVR) addu r3,r0,r0 sw r3,0(r2) ;[Halting Watchdog timer] ; lui r4,0xffff ori r4,r4,0xf090 sb r0,0(r4) ;WDMOD(0xfffff090) 0x00 addiu r2,r0,0xb1 sb r2,1(r4) ;WDCR(0xffff091) 0xb1 nop ;----------------------------------------------------------------------;[Clearing tiny-area to 0] Unnecessary when no variables whose initial values are undefined are located in the tiny-area addiu beq nop addiu clear_tiny_area: addiu sb bne addiu no_tiny_area: r4,r0,tinyAreaSize r4,r0,no_tiny_area r2,r0,TinyArea r4,r4,-1 r0,0(r2) r4,r0,clear_tiny_area r2,r2,1 d)
e)
f)
;----------------------------------------------------------------------;[Clearing near-area to 0] Unnecessary when no variables whose initial values are undefined are located in the near-area addiu beq nop lui addiu clear_near_area: addiu sb bne addiu no_near_area: r4,r0,nearAreaSize r4,r0,no_near_area r2,hi(NearArea) r2,r2,lo(NearArea) r4,r4,-1 r0,0(r2) r4,r0,clear_near_area r2,r2,1
g)
;----------------------------------------------------------------------;[Clearing far-area to 0] Unnecessary when no variables whose initial values are undefined are located in the far-area lui addiu beq nop lui addiu clear_far_area: addiu sb bne addiu no_far_area: r4,hi(farAreaSize) r4,r4,lo(farAreaSize) r4,r0,no_far_area r2,hi(FarArea) r2,r2,lo(FarArea) r4,r4,-1 r0,0(r2) r4,r0,clear_far_area r2,r2,1
h)
;----------------------------------------------------------------------;[Transferring variables whose initial values are defined to specified RAM area (tiny-area)] ;Unnecessary when no variables whose initial values are defined are located in the tiny-area addiu beq nop addiu r4,r0,tinyDataSize r4,r0,no_tiny r2,r0,TinyData ;Number of bytes to transfer
i)
;Start address of transfer destination
3-4
TX1940 Application Note
addiu move_t_data: addiu lb addiu sb bne addiu no_tiny: r3,r0,tinyDataOrg r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_t_data r2,r2,1 ;Start address of transfer source
;----------------------------------------------------------------------;[Transferring variables whose initial values are defined to specified RAM area (near-area)] ;Unnecessary when no variables whose initial values are defined are located in the near-area addiu beq nop lui addiu lui addiu move_n_data: addiu lb addiu sb bne addiu no_near: r4,r0,nearDataSize r4,r0,no_near r2,hi(NearData) r2,r2,lo(NearData) r3,hi(nearDataOrg) r3,r3,lo(nearDataOrg) r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_n_data r2,r2,1 ;Number of bytes to transfer
j)
;Start address of transfer destination ;Start address of transfer source
;----------------------------------------------------------------------;[Transferring variables whose initial values are defined to specified RAM area (far-area)] ;Unnecessary when no variables whose initial values are defined are located in the far-area lui addiu beq nop lui addiu lui addiu move_f_data: addiu lb addiu sb bne addiu no_far: r4,hi(farDataSize) r4,r4,lo(farDataSize) r4,r0,no_far r2,hi(FarData) r2,r2,lo(FarData) r3,hi(farDataOrg) r3,r3,lo(farDataOrg) r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_f_data r2,r2,1 ;Number of bytes to transfer
k)
;Start address of transfer destination ;Start address of transfer source
;----------------------------------------------------------------------;[Calling main function] jalx. nop self_jump: j nop main
self_jump
3-5
TX1940 Application Note The letters a) to k) below correspond to those shown on the extreme right in the preceding program listing. a) _ _startup The start-up routine included in the program sample is written to start from symbol _ _startup when reset. When you use Toshiba debuggers, add a description of "_ _startup" to Startup Label specification when creating a profile. b) Register initialization * Initializing the Stack Pointer (sp) In the C language local variables for functions are normally accessed using sp Register Relative Mode. Thus the register sp must be initialized before the function main is called. Initialize sp in the start-up routine. A typical line of code for initializing sp is shown below.
li sp,StackBase
StackBase is defined at the beginning of the start-up routine as explained in the definition section. * Initializing the Global Pointer
li gp, _ _gp
_ _gp is the label symbol determined when linking, a special symbol which does not require an extern declaration. The value of _ _gp is the start address of the medium-area plus 8000H. The start address of the medium-area is either the start address of data.m or the start address of romdata.m, whichever is the lower. Alternatively, absolute addresses, which do not require the use of _ _gp, can be used. In this case when setting absolute addresses, make sure that the entire medium-area, as defined in the link command file, is within the address range accessible in gp Relative Mode. c) Initializing the system control coprocessor (CP0) The CP0 controls exception handling, system configuration and memory management. The CP0 Status Register (r12) is used for determining interrupt control and the operation mode; thus it must be properly initialized when interrupts are used. The programmer can use the CP0 Status Register to define the exception vectors, interrupt mask levels, operation mode and interrupt enable state. The start-up routine shown is merely an example -- it can be rewritten as necessary to suit the application at hand. Note, however, that for a TX1940 microprocessor, the BEV bit (bit 23 counting up from the LSB) must always be set to 1. For details, please refer to the databook entitled 32-Bit TX System RISC TX19 Family TX1940. d) Clearing the register IVR to 0 The register IVR holds the vector for the interrupt source. The program branches to the interrupt routine pointed to by the vector held in the register IVR. e) Halting the Watchdog Timer The TX1940's Watchdog Timer is used for detecting CPU runaway. If the CPU starts operating erratically for some reason, e.g. because of noise, the Watchdog Timer detects the erroneous condition and sends a signal to the processor instructing it to return to its normal state. Resetting the device enables the Watchdog Timer. In this example, however, it is disabled. To enable it, comment out this code segment. For details, please refer to the databook entitled 32Bit TX System RISC TX19 Family TX1940.
3-6
TX1940 Application Note f), g) and h) Clearing variables whose initial values are undefined to 0 The following code sample demonstrates a technique which can be used to clear the t_area, n_area and f_area sections to 0. (These are areas for variables whose initial values are undefined.) In the example below the f_area section is cleared to 0.
lui addiu beq nop lui addiu clear_far_area: addiu sb bne addiu no_far_area: r4,hi(farAreaSize) r4,r4,lo(farAreaSize) r4,r0,no_far_area r2,hi(FarArea) r2,r2,lo(FarArea) r4,r4,-1 r0,0(r2) r4,r0,clear_far_area r2,r2,1 ;Size
of f_area
;Start
address of f_area
The farAreaSize and FarArea symbols are defined in the link command file. They are replaced by 32-bit unsigned integers at link time. farAreaSize represents the size of the f_area area and FarArea represents the start address of the f_area area. This routine clears an area of size farAreaSize starting at the address FarArea to 0. i), j) and k) Transferring variables whose initial values are defined from ROM to RAM Two kinds of variable are stored in the t_data, n_data and f_data sections: variables whose initial values are defined and which are defined outside of any function, and variables defined within functions as static variables. The initial values for these kinds of variable are stored in ROM; however, since the values of these variables will change when instructions are executed, they must be copied to RAM. In the example below the initial values are transferred from the f_data section of ROM to RAM.
lui addiu beq nop lui addiu lui addiu move_f_data: addiu lb addiu sb bne addiu no_far: r4,hi(farDataSize) r4,r4,lo(farDataSize) r4,r0,no_far r2,hi(FarData) r2,r2,lo(FarData) r3,hi(farDataOrg) r3,r3,lo(farDataOrg) r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_f_data r2,r2,1 ;Number of bytes to transfer
;Start address of transfer destination ;Start address of transfer source
They are replaced by 32-bit unsigned integers at link time. FarData represents the start address of the f_data area (the area in which the body of the variable with initial value is stored), and farDataOrg represents the start address of the ROM area in which the variable with initial value is stored. Namely, farDataOrg indicates the ROM address from which to transfer the data and FarData indicates the RAM address to which to transfer the data. They are replaced by 32-bit unsigned integers at link time. FarData represents the start address of the f_data area (the area in which the body of the variable with initial value is stored), and farDataOrg represents the start address of the ROM area in which the variable with initial value is stored. Namely, farDataOrg indicates the ROM address from which to transfer the data and FarData indicates the RAM address to which to transfer the data. Figure 1.1 shows how the initial values are transferred from ROM to RAM by the sample program shown in Section 3.1.2.1. However, this differs from the sample application programs (see Section 3.1.2.2).
3-7
TX1940 Application Note
Memory name 0xf f f f f f f f IO_SEC 0cffffe000 0xffffc000 (RESERVED)
Runtime address of far_data addr = org(far_area) + sizeof(far_area) and FarData = addr(far_data) far area
F_RAM 0cffffac00 near_const ROMDATA.M 0xffffa400 Initial value of near_data Runtime address of near_data DATA.M near_area 0xffff9c00 ROMDATA.S DATA.S 0xffff9800 0xffff9a00 tiny_const Initial value of tiny_data Runtime address of tiny data tiny_area
sizeof(far_area)
addr = org(near_area) + sizeof(near_area) and NearData = addr(near_data) sizeof(near_area)
addr = org(tiny_area) + sizeof(tiny_area) and TinyData = addr(tiny_data)
VECTOR V_RESET
0xbfc00400 0xbfc00200 0xbfc00000
VECTOR_INT RESET
0x1fc20000 far_const F_ROM 0x1fc10000 Initial value of far_data addr = org(code) + sizeof(code) code
0x00000000
Figure 3.1.1 Memory map showing transfer of initial values from ROM to RAM
3-8
TX1940 Application Note Exception handler definition When an exception occurs, the program will branch to the appropriate exception vector address once hardware exception processing (e.g. setting of the EPC) has been completed. The exception vector address depends on the type of exception which has occurred.
Type of Exception
Reset exception, non-maskable interrupt Debug exception Swi0 (maskable software interrupt) Swi1 (maskable software interrupt) Swi2 (maskable software interrupt) Swi3 (maskable software interrupt) Maskable hardware interrupt Other exceptions
Vector Address (virtual address)
0xbfc00000 0xbfc00200 0xbfc00210 0xbfc00220 0xbfc00230 0xbfc00240 0xbfc00260 0xbfc00180
The exception handler definition section in the start-up routine is shown below.
;Exception handler definition ;Reset exception, non-maskable interrupt VECTOR_RESET section code large abs=0xbfc00000 vReset: ;Reset: 0xbfc000000 mfc0 r26,r12 ;Status(r12),NMI srl r26,r26,20 andi r27,r26,1 bne r27,r0,J_Dummy ;If NMI, go to dummy function. nop lui r26,hi(__startup) ;Otherwise, go to __startup. addiu r26,r26,lo(__startup) jr r26 nop J_Dummy: lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 ;Debug exception VECTOR_DBG section code large abs=0xbfc00200 vDBG: ;debug:0xbfc0 0200 mfc0 r26,r16 ;r16=Debug register andi r26,r26,0x1 ;0bit=DSS(single step exception) bne r26,r0,J_Dummy2 ;r26=1 ->single step exception nop lui r26,hi(_Int_dummy) ;debug break point exception addiu r26,r26,lo(_Int_dummy) jr r26 nop J_Dummy2: ;single step exception lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;Software interrupt VECTOR_SWI0 section code large abs=0xbfc00210 vSwi0: ;Swi0:0xbfc0 0210 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop VECTOR_SWI1 section code large abs=0xbfc00220 vSwi1: ;Swi1:0xbfc0 0220 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop a)
b)
c)
3-9
TX1940 Application Note
VECTOR_SWI2 section code large abs=0xbfc00230 vSwi2: ;Swi2:0xbfc0 0230 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop VECTOR_SWI3 section code large abs=0xbfc00240 vSwi3: ;Swi3:0xbfc0 0240 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;Other exceptions ;Identify cause of exception from Cause Register. ;ExcCode bits (bits 2~6) of Cause Register (CP0:r13) VECTOR_EXC section code large abs=0xbfc00180 public __ExceptVector __ExceptVector: mfc0 r26,r13 andi r26,r26,0x7c ;Extract ExCode bits. addiu r26,r26,-0x10 lui r27,hi(__ExceptTable) addu r26,r26,r27 addiu r26,r26,lo(__ExceptTable) lw r26,0(r26) jr r26 nop ; ;Exception table (sample) ; ;Write other exception processing in this table and correlate them with specific causes of interrupt. EXCEPT_TAB section data large public __ExceptTable __ExceptTable: dw _Int_dummy ;4 --- Address Error exception, load (AdEL) dw _Int_dummy ;5 --- Address Error exception, store (AdES) dw _Int_dummy ;6 --- Bus Error exception, instruction (IBE) dw _Int_dummy ;7 --- Bus Error exception, data (DBE) dw _Int_dummy ;8 --- System Call exception (Sys) dw _Int_dummy ;9 --- Breakpoint exception (Bp) dw _Int_dummy ;10--- Reserved Instruction exception (R1) dw _Int_dummy ;11--- Coprocessor Unusable exception (CpU) dw _Int_dummy ;12--- Overflow exception (Ov) ;Hardware interrupt e) ;Hardware interrupts are explained in Section 3.1.3, Interrupt Processing.
The letters below correspond to those shown on the extreme right in the preceding program listing. a) Reset exception, non-maskable interrupt On both a reset exception and a non-maskable interrupt, the program branches to BFC00000H. Hence, the cause of the exception must be identified from the setting of the NMI bit in the Status Register (r12). If the NMI bit = 1, it signifies that a non-maskable interrupt has occurred, in which case control is transferred to a dummy function. If the NMI bit = 0, it signifies that a reset exception has occurred, in which case the program branches to the _startup symbol (see the data initialization section).
3-10
TX1940 Application Note b) Debug exception There are two types of Debug exception: the Single-Step exception and the Debug Breakpoint exception. In the sample program the code for this section includes a branch which depends on the exception type, allowing the two types to be processed in different ways. If necessary, write separate handler routines for each type. c) Software interrupt In the sample program control is transferred to a dummy function for each of the interrupts Swi0 to Swi3. If necessary, write separate handler routines for each type. d) Other exceptions When an exception such as an Address Error exception or Bus Error exception occurs, the sample program transfers control to the appropriate routine as determined by the corresponding look-up table entry. Rewrite the table as necessary. e) Hardware interrupt Hardware interrupts are explained in Section 3.1.3, Interrupt Processing. In the sample program shown later, control is transferred to a routine corresponding to the cause of the hardware interrupt. The cause is signified by the value of IVR.
3-11
TX1940 Application Note
3.1.1.2 Start-up routine (for sample applications)
This section includes a listing of the start-up routine which was used when compiling the sample applications. However, because the jump table for interrupt handling is different for each sample application, for details of a particular application's start-up routine, please refer to the specific individual section in this chapter, Description of the Software.
;************************************** ;* Application Note * ;* * ;* (Start Up Routine) * ;* * ;* MCU: TX1940FDBF * ;* 1999/10/15 * ;* * ;************************************** ;======================================================================= ;[Address definition] Rewrite this section as necessary before use. ;======================================================================= StackBase equ 0xffffbc00 ;Base address of stack HeapTop equ 0xffffbc00 ;Base address of heap area HeapSize equ 0x400 ;Size of heap area ;### Interrupt Vector Register IVR equ 0xffffe040 ;Interrupt Vector Register ;======================================================================= ;Start-up program ;======================================================================= ;----------------------------------------------------------------------;[Section] Section declarations are required even for sections for which no assembler variables are defined. ;----------------------------------------------------------------------t_area section data small ;Section containing variables whose initial values are undefined t_data section data small ;Section containing variables whose initial values are defined t_const section romdata small ;Section containing constants n_const section romdata medium ;Section containing constants f_area section data large ;Section containing variables whose initial values are undefined f_data section data large ;Section containing variables whose initial values are defined f_const section romdata large ;Section containing constants ;----------------------------------------------------------------------;[Global variable initialization area] As defined in the link command file ;----------------------------------------------------------------------extern large TinyData,FarData extern large TinyArea,FarArea extern large tinyAreaSize,farAreaSize extern large tinyDataSize,farDataSize extern large tinyAreaOrg,farAreaOrg extern large tinyDataOrg,farDataOrg ;### Interrupt functions used extern large _mnmi extern large _mint0 extern large _minttb21 extern large _mintta1 extern large _mintta2 extern large _mintad extern large _mintrx1 extern large _minttx1 extern large _mints2 extern large _mintrtc
3-12
TX1940 Application Note
;----------------------------------------------------------------------;[External reference declaration for main() function] (16bitISA) ;----------------------------------------------------------------------extern medium .main ;If the main() function is a 32-bit ISA function, ;replace ".main" with "_main" ;----------------------------------------------------------------------;Start-up program proper ;----------------------------------------------------------------------ResetStart section code isa32 public __startup __startup: ;----------------------------------------------------------------------;[Register initialization] ;This section must always be included. lui addiu lui addiu sp,hi(StackBase) sp,sp,lo(StackBase) gp,hi(__gp) gp,gp,lo(__gp) ;Set Stack Pointer. ;Set Global Pointer.
;Setting Status Register ;High-order 16 bits of Status Register (CP0:r12) ; CU 0 RE 0 BEV TS NmI 0 PMask ;After reset xxxx 00 x 00 1 0 0 0 xxx ;Low-order 16 bits of Status Register (CP0:r12) ; CMask 0 SwiMask 0 KUo IEo KUp IEp KUc IEc ;After reset xxx 0 xxxx 0x x x x x x ;0x1040_0000 means "enable CP0" & "BEV=1" & "disable interrupt" lui r2,0x1040 addiu r2,r2,0x0000 mtc0 r2,r12 lui addiu addu sw r2,hi(IVR) r2,r2,lo(IVR) r3,r0,r0 r3,0(r2)
;----------------------------------------------------------------------;[Disabling Watchdog Timer] ; lui r4,0xffff ori r4,r4,0xf090 sb r0,0(r4) ;WDMOD(0xfffff090) 0x00 addiu r2,r0,0xb1 sb r2,1(r4) ;WDCR(0xffff091) 0xb1 nop ;----------------------------------------------------------------------;[Clearing Tiny Area to 0] ;Unnecessary if there is no tiny-area or if the tiny-area does not include any variables whose initial values are undefined addiu beq addiu clear_tiny_area: addiu sb bne addiu no_tiny_area: r4,r0,tinyAreaSize r4,r0,no_tiny_area r2,r0,TinyArea r4,r4,-1 r0,0(r2) r4,r0,clear_tiny_area r2,r2,1
;----------------------------------------------------------------------;[Clearing Far Area to 0] ;Unnecessary if the far-area does not include any variables whose initial values are undefined
3-13
TX1940 Application Note
lui addiu beq lui addiu clear_far_area: addiu sb bne addiu no_far_area: r4,hi(farAreaSize) r4,r4,lo(farAreaSize) r4,r0,no_far_area r2,hi(FarArea) r2,r2,lo(FarArea) r4,r4,-1 r0,0(r2) r4,r0,clear_far_area r2,r2,1
;----------------------------------------------------------------------;[Transferring variables whose initial values are defined to specified RAM area (tiny-area)] ;Unnecessary if there is no tiny-area or if the tiny-area does not include any variables whose initial values are undefined addiu beq addiu addiu move_t_data: addiu lb addiu sb bne addiu no_tiny: r4,r0,tinyDataSize r4,r0,no_tiny r2,r0,TinyData r3,r0,tinyDataOrg r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_t_data r2,r2,1 ;Number of bytes to transfer ;Start address of transfer destination ;Start address of transfer source
;----------------------------------------------------------------------;[Transferring variables whose initial values are defined to specified RAM area (far-area)] ;Unnecessary if the far-area does not include any variables whose initial values are undefined lui addiu beq lui addiu lui addiu move_f_data: addiu lb addiu sb bne addiu no_far: r4,hi(farDataSize) r4,r4,lo(farDataSize) r4,r0,no_far r2,hi(FarData) r2,r2,lo(FarData) r3,hi(farDataOrg) r3,r3,lo(farDataOrg) r4,r4,-1 r5,0(r3) r3,r3,1 r5,0(r2) r4,r0,move_f_data r2,r2,1 ;Number of bytes to transfer
;Start address of transfer destination ;Start address of transfer source
;----------------------------------------------------------------------;[Calling main function] jalx .main nop self_jump: j self_jump nop ;======================================================================= ;[ANSI standard library functions] Change this section as necessary. ;======================================================================= ;-----------------------------------------------------------------------
3-14
TX1940 Application Note
;[errno variable] This section must always be included when standard library functions are used. ;----------------------------------------------------------------------t_area section data small public _errno _errno dsw 1 ;----------------------------------------------------------------------;[Heap area definition] This section must always be included when malloc, calloc or realloc are used. ;----------------------------------------------------------------------t_data section data small public _SBRK_break ;Start pointer for heap area public _SBRK_size ;Size of heap area public __allocb ;Control pointer for heap area _SBRK_break dw HeapTop _SBRK_size dw HeapSize __allocb dw 0 HeapArea heap section data abs=HeapTop align=1,1 dsb HeapSize ;Heap area
;----------------------------------------------------------------------;[abort function] Include this section if abort is called from a 32-bit ISA function. ;----------------------------------------------------------------------f_code section code isa32 public _abort _abort: j _abort nop ;----------------------------------------------------------------------;[abort function] Include this section if abort is called from a 16-bit ISA function. ;----------------------------------------------------------------------n_code section code isa16 public .abort .abort: b .abort ;----------------------------------------------------------------------;[exit function] Include this section if exit is called from a 32-bit ISA function. ;----------------------------------------------------------------------f_code section code isa32 public _exit _exit: j _exit nop ;----------------------------------------------------------------------;[exit function] Include this section if exit is called from a 16-bit ISA function. ;----------------------------------------------------------------------n_code section code isa16 public .exit .exit: b .exit ;===================================================================== ;Exception vector address definition for TX1940 ;====================================================================== VECTOR_RESET section code large abs=0xbfc00000 ;Reset exception, non-maskable interrupt vReset: ;Reset: 0xbfc000000 mfc0 r26,r12 ;Status(r12),NMI srl r26,r26,20 andi r27,r26,1 bne r27,r0,J_Dummy ;If NMI, go to dummy function. nop lui r26,hi(__startup) ;Otherwise, go to startup. addiu r26,r26,lo(__startup) jr r26
3-15
TX1940 Application Note
nop J_Dummy: lui r26,hi(_mnmi) addiu r26,r26,lo(_mnmi) jr r26 nop ;Debug exception VECTOR_DBG section code large abs=0xbfc00200 vDBG: ;debug:0xbfc0 0200 lui r26,hi(_DBG_except) addiu r26,r26,lo(_DBG_except) jr r26 nop ;Software interrupt 0 VECTOR_SWI0 section code large abs=0xbfc00210 vSwi0: ;Swi0:0xbfc0 0210 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;Software interrupt 1 VECTOR_SWI1 section code large abs=0xbfc00220 vSwi1: ;Swi1:0xbfc0 0220 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;Software interrupt 2 VECTOR_SWI2 section code large abs=0xbfc00230 vSwi2: ;Swi2:0xbfc0 0230 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;Software interrupt 3 VECTOR_SWI3 section code large abs=0xbfc00240 vSwi3: ;Swi3:0xbfc0 0240 lui r26,hi(_Int_dummy) addiu r26,r26,lo(_Int_dummy) jr r26 nop ;--------------------------------------------------------------------;Other exceptions ;Identify cause of interrupt from Cause Register. ;ExcCode bits (bits 2~6) of Cause Register (CP0:r13) ;--------------------------------------------------------------------VECTOR_EXC section code large abs=0xbfc00180 public __ExceptVector __ExceptVector: mfc0 r26,r13 andi r26,r26,0x7c ;Extract ExCode bits. addiu r26,r26,-0x10 lui r27,hi(__ExceptTable) addu r26,r26,r27 addiu r26,r26,lo(__ExceptTable) lw r26,0(r26) jr r26 nop ;-------------------------------------------------------------------;Exception table (example) ;-------------------------------------------------------------------;Write other exception processing in this table and correlate them with specific causes of interrupt. EXCEPT_TAB section data large public __ExceptTable __ExceptTable:
3-16
TX1940 Application Note
dw _Int_dummy ;4 --- Address Error exception, load (AdEL) dw _Int_dummy ;5 --- Address Error exception, store (AdES) dw _Int_dummy ;6 --- Bus Error exception, instruction (IBE) dw _Int_dummy ;7 --- Bus Error exception, data (DBE) dw _Int_dummy ;8 --- System Call exception (Sys) dw _Int_dummy ;9 --- Breakpoint exception (Bp) dw _Int_dummy ;10--- Reserved Instruction exception (R1) dw _Int_dummy ;11--- Coprocessor Unusable exception (CpU) dw _Int_dummy ;12--- Overflow exception (Ov) ;----------------------------------------------------------------------;Hardware interrupt ;----------------------------------------------------------------------VECTOR_INT section code large abs=0xbfc00260 public __InterruptVector __InterruptVector: lui r26,hi(IVR) addiu r26,r26,lo(IVR) lw r26,0(r26) andi r26,r26,0x03f0 srl r26,r26,2 lui r27,hi(__VectorTable) addu r26,r26,r27 addiu r26,r26,lo(__VectorTable) lw r26,0(r26) jr r26 nop ;----------------------------------------------------------------------;Interrupt vector table (example) ;----------------------------------------------------------------------;Write interrupt functions in this table and correlate them with specific causes of interrupt. VECTOR_TAB section data large public __VectorTable __VectorTable: dw _Int_dummy ;0 --- software set dw _mint0 ;1 --- INT[0] dw _Int_dummy ;2 --- INT[1] dw _Int_dummy ;3 --- INT[2] dw _Int_dummy ;4 --- INT[3] dw _Int_dummy ;5 --- INT[4] dw _Int_dummy ;6 --- * dw _Int_dummy ;7 --- * dw _Int_dummy ;8 --- * dw _Int_dummy ;9 --- * dw _Int_dummy ;10--- INT[5] dw _Int_dummy ;11--- INT[6] dw _Int_dummy ;12--- INT[7] dw _Int_dummy ;13--- INT[8] dw _Int_dummy ;14--- INT[9] dw _Int_dummy ;15--- INT[A] dw _Int_dummy ;16--- * dw _Int_dummy ;17--- * dw _Int_dummy ;18--- * dw _Int_dummy ;19--- * dw _Int_dummy ;20--- INTTA0 dw _mintta1 ;21--- INTTA1 dw _mintta2 ;22--- INTTA2 dw _Int_dummy ;23--- INTTA3 dw _Int_dummy ;24--- * dw _Int_dummy ;25--- * dw _Int_dummy ;26--- * dw _Int_dummy ;27--- * dw _Int_dummy ;28--- INTTB00 dw _Int_dummy ;29--- INTTB01 dw _Int_dummy ;30--- INTTB10 dw _Int_dummy ;31--- INTTB11
3-17
TX1940 Application Note
dw _Int_dummy ;32--- INTTB20 dw _minttb21 ;33--- INTTB21 dw _Int_dummy ;34--- INTTB30 dw _Int_dummy ;35--- INTTB31 dw _Int_dummy ;36--- * dw _Int_dummy ;37--- * dw _Int_dummy ;38--- * dw _Int_dummy ;39--- * dw _Int_dummy ;40--- INTTBOF0 dw _Int_dummy ;41--- INTTBOF1 dw _Int_dummy ;42--- INTTBOF2 dw _Int_dummy ;43--- INTTBOF3 dw _Int_dummy ;44--- * dw _Int_dummy ;45--- * dw _Int_dummy ;46--- * dw _Int_dummy ;47--- * dw _Int_dummy ;48--- INTRX0 dw _Int_dummy ;49--- INTTX0 dw _mintrx1 ;50--- INTRX1 dw _minttx1 ;51--- INTTX1 dw _mints2 ;52--- INTS2 dw _Int_dummy ;53--- * dw _Int_dummy ;54--- INTRX3 dw _Int_dummy ;55--- INTTX3 dw _Int_dummy ;56--- INTRX4 dw _Int_dummy ;57--- INTTX4 dw _mintrtc ;58--- INTRTC dw _mintad ;59--- INTAD dw _Int_dummy ;60--- INTDMA0 dw _Int_dummy ;61--- INTDMA1 dw _Int_dummy ;62--- INTDMA2 dw _Int_dummy ;63--- INTDMA3 ;----------------------------------------------------------------------;Dummy function for unused interrupts ;----------------------------------------------------------------------st_code section code large public _Int_dummy _Int_dummy: MFC0 r2,r14 j self_jump rfe ;----------------------------------------------------------------------;Debug Exception interrupt ;----------------------------------------------------------------------st_code section code large public _DBG_except _DBG_except: mfc0 r2,r16 ;r16=Debug register andi r2,r2,0x1 ;0bit=DSS(single step exception) bne r2,r0,J_Dummy2 ;r2=1 ->single step exception nop lui r2,hi(_Int_dummy) ;debug break point exception addiu r2,r2,lo(_Int_dummy) jr r2 nop J_Dummy2: ;single step exception lui r2,hi(_Int_dummy) addiu r2,r2,lo(_Int_dummy) jr r2 nop end
3-18
TX1940 Application Note 3.1.2 Compilation The compiler used for the applications presented in these application notes is the C compiler for the TX19 Family of Toshiba microprocessors. The command used at compile time is as follows:
cc9i -Nr16 -Rle -ZA tiny -ZD tiny -ZC tiny -Zx tiny -O3
The compile options used for the programs presented here are described below.
Compile Option
-Nr16 -Rle -ZA -ZD -ZC -Zx
Description
Compiles in 16-Bit ISA Mode. Compiles using little-endian byte alignment. Selecting this option is obligatory with the TX1940 Family. Specifies area (tiny, near or far) for storing external variables whose initial values are undefined. Specifies area (tiny, near or far) for storing external variables whose initial values are defined. Specifies area (tiny, near or far) for storing const objects. Specifies area (tiny, near or far) for storing external variables declared as extern.
The table below shows other frequently used options.
Compile Option
-Nr32 -O[level] -g -gn -f -I -o -zc -zw
Description
Compiles in 32-Bit ISA Mode. Optimizes program. An optimization level of 1, 2 or 3 can be specified. Outputs information required by debugger. This makes source-level debugging possible. Inserts nop instruction in delay slot for branch or jump instruction. This is required in order to be able to step through instructions in the debugger. Reads from specified file. Specifies search path for include file. Specifies output filename (abs file). Suppresses output of Warning-501, Warning-505, Warning-517 and Warning-518 by assembler. Suppresses output of Warning-520 by assembler.
3.1.2.1
Description of the link command file
This section explains the link command file in detail using an example. When a program is linked, principally the link command file carries out the following operations: (1) Specifies the target device's memory configuration. (2) Specifies the sections to be linked and the order in which they are to be linked. (3) Specifies the start addresses and sizes of the various sections. (4) Defines global symbols. An example of a link command file (named lnc9i.lcf) is shown below.
/********************************************************/ /*Link Command File */ /*Sample for TX19 (Direct Segment Mapping) */ /********************************************************/ /* MEMORY */ memory { DATA.S ROMDATA.S DATA.M ROMDATA.M F_RAM F_ROM F_ROM2 VECTOR
: : : : : : : :
org=0xffff9800, org=0xffff9a00, org=0xffff9c00, org=0xffffa400, org=0xffffac00, org=0x1fc10000, org=0x1fc20000, org=0xbfc00000,
len=0x00200 len=0x00200 len=0x00800 len=0x00800 len=0x01400 len=0x10000 len=0x10000 len=0x00400
3-19
TX1940 Application Note
IO_SEC } /* SECTION */ sections { tiny_area tiny_data : org=0xffffe000, len=0x02000
near_area near_data
far_area far_code near_code far_data
tiny_const near_const far_const
org=0xffff9800 : {*(t_area)} > DATA.S org=0xffff9a00 addr=org(tiny_area)+sizeof(tiny_area) : {*(t_data)} org=0xffff9c00 : {*(n_area)} > DATA.M org=0xffffa400 addr=org(near_area)+sizeof(near_area) : {*(n_data)} org=0xffffac00 : {*(f_area)} > F_RAM org=0x1fc10000 : {*(ResetStart) *(f_code)} > F_ROM org=org(far_code)+sizeof(far_code): {*(n_code)} org=org(near_code)+sizeof(near_code) addr=org(far_area)+sizeof(far_area) : {*(f_data)} : {*(t_const)} > ROMDATA.S : {*(n_const)} > ROMDATA.M : {*(f_const)} > F_ROM
TinyData = addr(tiny_data); NearData = addr(near_data); FarData = addr(far_data); TinyArea = addr(tiny_area); NearArea = addr(near_area); FarArea = addr(far_area); tinyAreaSize = sizeof(tiny_area); nearAreaSize = sizeof(near_area); farAreaSize = sizeof(far_area); tinyDataSize = sizeof(tiny_data); nearDataSize = sizeof(near_data); farDataSize = sizeof(far_data); tinyAreaOrg = org(tiny_area); nearAreaOrg = org(near_area); farAreaOrg = org(far_area); tinyDataOrg = org(tiny_data); nearDataOrg = org(near_data); farDataOrg = org(far_data); }
memory definition section
/* MEMORY */ memory { DATA.S ROMDATA.S DATA.M ROMDATA.M F_RAM F_ROM F_ROM2 VECTOR IO_SEC }
: : : : : : : : :
org=0xffff9800, org=0xffff9a00, org=0xffff9c00, org=0xffffa400, org=0xffffac00, org=0x1fc10000, org=0x1fc20000, org=0xbfc00000, org=0xffffe000,
len=0x00200 len=0x00200 len=0x00800 len=0x00800 len=0x01400 len=0x10000 len=0x10000 len=0x00400 len=0x02000
The memory definition section defines the memory area to be used. When coding this section, please refer to the memory map in the databook. DATA.S, F_RAM etc. are the names of the memory areas. The numeric value following the "org=" directive indicates the start address of each memory area; the numeric value following the "len=" directive indicates its size in bytes. 3-20
TX1940 Application Note For example, the name F_RAM represents the memory area FFFFAC00H~FFFFBFFFH and the name F_ROM represents the memory area 1FC10000H~1FC1FFFH. * DATA.S, ROMDATA.S
The DATA.S and ROMDATA.S sections are located in the small-area. The small-area corresponds to the compiler's tiny-area and can be specified to be in either the address range 0H~7FFFH or the address range FFFF8000H~FFFFFFFFH. When specifying the addresses, be careful not to exceed these ranges. * DATA.M, ROMDATA.M
DATA.M and ROMDATA.M correspond to the assembler's medium-area, the accessible range for which is specified using the gp register. Hence, the combined DATA.M and ROMDATA.M area is from the start address of DATA.M or ROMDATA.M (whichever of the two is lower) to the end address of DATA.M or ROMDATA.M (whichever is the higher)and cannot exceed 64 Kbytes. The start address for this area can be any valid DATA.M or ROMDATA.M address. * VECTOR
Exception vector addresses are specified in the VECTOR area. If a program is to incorporate exception handling, e.g. for Reset exceptions, this area must be included. For details on exception vector addresses, please refer to Section 3.1.1.1. * IO_SEC
IO_SEC is an internal I/O area which is common to all the microprocessors in the TX19 Family. This area must be defined if the MCU header file or references to internal module registers such as the Interrupt Vector Register (IVR) are included in the start-up routine. Note, however, that the internal register configuration is different for each MCU. sections definition section
sections { tiny_area tiny_data
near_area near_data
far_area far_code near_code far_data
tiny_const near_const far_const
org=0xffff9800 : {*(t_area)} > DATA.S org=0xffff9a00 addr=org(tiny_area)+sizeof(tiny_area) : {*(t_data)} org=0xffff9c00 : {*(n_area)} > DATA.M org=0xffffa400 addr=org(near_area)+sizeof(near_area) : {*(n_data)} org=0xffffac00 : {*(f_area)} > F_RAM org=0x1fc10000 : {*(ResetStart) *(f_code)} > F_ROM org=org(far_code)+sizeof(far_code): {*(n_code)} org=org(near_code)+sizeof(near_code) addr=org(far_area)+sizeof(far_area) : {*(f_data)} : {*(t_const)} > ROMDATA.S : {*(n_const)} > ROMDATA.M : {*(f_const)} > F_ROM
TinyData = addr(tiny_data); NearData = addr(near_data); FarData = addr(far_data); TinyArea = addr(tiny_area); NearArea = addr(near_area); FarArea = addr(far_area); tinyAreaSize = sizeof(tiny_area); nearAreaSize = sizeof(near_area);
3-21
TX1940 Application Note
farAreaSize = sizeof(far_area); tinyDataSize = sizeof(tiny_data); nearDataSize = sizeof(near_data); farDataSize = sizeof(far_data); tinyAreaOrg = org(tiny_area); nearAreaOrg = org(near_area); farAreaOrg = org(far_area); tinyDataOrg = org(tiny_data); nearDataOrg = org(near_data); farDataOrg = org(far_data); }
sections { } defines where the input sections are located. The format of this definition is as follows:
output section name [address definition]: {filename (input section name)} [> output memory name]
"org=" and "addr=" "org=" refers to the location address (address of initial value) and "addr=" refers to the start address (run-time address). Conversion of initial values to run-time addresses is performed in the start-up routine. In the above example "addr=" does not feature in the code and tiny_area definitions. If "addr=" is omitted in this fashion, "org=" and "addr=" take on the same value. "org ( )" and "sizeof ( )" "org" (output section name) is an operator for calculating the start address of the specified output section; "sizeof" (output section name) is an operator for calculating the size of the specified output section. If "org=" and "addr=" point to different addresses, ">output memory name" cannot be specified. If "addr=" is omitted (i.e. if "org=" and "addr=" point to the same address), ">output memory name" can be specified. For example, an output memory name could not be defined in lines 4~6 of the tiny_data definition; however an output memory name could be defined in the 3rd line of the tiny_area definition since "org=" and "addr=" have taken on the same address. In the following case also, the output memory name can be defined:
tiny_const : {*(t_const)} > ROMDATA.S
In the above example the output section tiny_const is defined to be in the free space of the ROMDATA.S memory area. If an asterisk (*) is used in place of the input section filename, the effect is the same as specifying all input files. Hence, {*(t_data)} refers to all the input sections whose name includes the string "t_data" and which are specified as input files on the command line. If section names in the source program are changed or sections are created in the assembly language source file, do not forget to modify the section names here so that they correspond. For example, if the code section name newsec is used in a C language source file and then a code section named asmsec is created in an assembly language source file asmfile.mac, the following lines must be added to the command language file.
code org=0x1fc10000 : {*(ResetStart) *(f_code)) *(newsec) asmfile.rel(asmsec)} > F_ROM
3-22
TX1940 Application Note
3.1.2.2 Memory map (for sample applications)
A memory map for the sample applications is shown in Figure 3.1.2.
0xffffffff Internal I/O 0xffffe000 0xffffbfff F_RAM Internal RAM DATA.S 0xffff8000 IO_SEC
0xbfc3ffff
Internal ROM
0xbfc00000 0x9fc3ffff
VECTOR
Internal ROM
0x9fc00000
0x0003ffff F_ROM_ST Internal ROM F_ROM ROMDATA.S 0x00000000
Figure 3.1.2 Memory map
3-23
TX1940 Application Note
3.1.2.3 Link command file (used in sample applications)
/********************************************************/ /* Application Note */ /* */ /* */ /* (Direct Segment Mapping) */ /* */ /* MCU: TX1940FDBF */ /* 1999/10/15 */ /* */ /********************************************************/ /* MEMORY */ memory { /*-------------------------------------------------*/ /* RAM area 0xffff8000 - 0xffffbfff (16KB) */ /*-------------------------------------------------*/ DATA.S : org=0xffff8000, len=0x03000 F_RAM : org=0xffffb000, len=0x01000 /*-------------------------------------------------*/ /* ROM area 0xbfc00000 - 0xbfc7ffff (512KB) kseg1 */ /* or 0x00000000 - 0x0007ffff (512KB) kuseg */ /*-------------------------------------------------*/ ROMDATA.S : org=0x00000400, len=0x07c00 ROMDATA.M : org=0x00008000, len=0x08000 F_ROM : org=0x00010000, en=0x70000 VECTOR : org=0xbfc00000, len=0x00400 /*-------------------------------------------------*/ /* SFR area 0xffffe000 - 0xffffffff (8KB) */ /*-------------------------------------------------*/ IO_SEC : org=0xffffe000, len=0x02000 } /* SECTION */ sections { tiny_area tiny_data
/* Locate Tiny variable */ /* Locate Far variable */
/* /* /* /*
Locate Locate Locate Locate
Tiny constant */ Near constant */ Code */ Vector */
far_area far_code near_code far_data
tiny_const near_const far_const
org=0xffff8000 : {*(t_area)} > DATA.S org=0x00000400 addr=org(tiny_area)+sizeof(tiny_area) : {*(t_data)} org=0xffffb000 : {*(f_area)} > F_RAM org=0x10000 : {*(ResetStart) *(st_code) *(f_code)} > F_ROM org=org(far_code)+sizeof(far_code) : {*(n_code)} org=org(near_code)+sizeof(near_code) addr=org(far_area)+sizeof(far_area) : {*(f_data)} : {*(t_const)} > ROMDATA.S : {*(n_const)} > ROMDATA.M : {*(f_const)} > F_ROM
TinyData = addr(tiny_data); FarData = addr(far_data); TinyArea = addr(tiny_area); FarArea = addr(far_area); tinyAreaSize = sizeof(tiny_area); farAreaSize = sizeof(far_area); tinyDataSize = sizeof(tiny_data);
3-24
TX1940 Application Note
farDataSize tinyAreaOrg farAreaOrg tinyDataOrg farDataOrg } = sizeof(far_data); = org(tiny_area); = org(far_area); = org(tiny_data); = org(far_data);
3-25
TX1940 Application Note 3.1.3
3.1.3.1
Interrupt handling
Hardware interrupts
Essentially the TX19 processor features two types of interrupt: non-maskable and maskable. Maskable interrupts are further sub-divided into software interrupts and hardware interrupts. The TX19 has a maximum of 64 interrupt sources for maskable hardware interrupts, each of which is assigned an individual interrupt vector. When a maskable hardware interrupt occurs, the interrupt controller's internal Interrupt Vector Register (IVR) is set to the corresponding interrupt vector value. The program can then read the vector value from this register and branch to the handler routine corresponding to the interrupt source.
3.1.3.2 Interrupt handler
The interrupt handler branches according to the interrupt number in the IVR register. A routine within the interrupt handler uses the interrupt vector table to determine the branch address which corresponds to the interrupt number. Interrupt handler
;Hardware interrupt ;Address of IVR must be predefined. VECTOR_INT section code large abs=0xbfc00260 public _ _InterruptVector _ _InterruptVector: lui r26,hi(IVR) addiu r26,r26,lo(IVR) lw r26,0(r26) andi r26,r26,0x03f0 srl r26,r26,2 lui r27,hi(_ _VectorTable) addu r26,r26,r27 addiu r26,r26,lo(_ _VectorTable) lw r26,0(r26) jr r26 nop
;(1) ;(2)
;(3) ;(4)
The numbers (1) to (4) below correspond to the numbers in the program listing above. (1) (2) First, the contents of the IVR register are stored in r26. Since only the low-order bits 5~10 of the IVR register are used to hold the interrupt source, all other bits are masked to 0. (3) (4) Next, the program looks up the address of the corresponding interrupt-processing function in the interrupt vector table and branches to it. Since this routine is located at address BFC00260H, the program will branch to this address when the maskable hardware interrupt occurs. Interrupt table
;Use this table to match interrupt functions to specific interrupt sources. VECTOR_TAB section data large public _ _VectorTable _ _VectorTable: ;Interrupt function name Interrupt number Interrupt source dw _Int_dummy ; 0 --- software set dw _Int_dummy ; 1 --- INT[0] dw _Int_dummy ; 2 --- INT[1] dw _Int_sample ; 3 --- INT[2] dw _Int_dummy ; 4 --- INT[3]
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TX1940 Application Note
dw _Int_dummy dw _Int_dummy dw _Int_dummy dw _Int_dummy dw _Int_dummy dw _Int_dummy dw _Int_dummy ;Subsequent code omitted ; ; ; ; ; ; ; 5 --6 --7 --8 --9 --10--11--INT[4] * * * * INT[5] INT[6]
The interrupt table look-up routine can thus determine the address of the interrupt-processing function corresponding to the interrupt which has occurred. Hence the handler can then jump to the appropriate interrupt-processing routine. In the above example, the routine will call the Int_sample function for interrupt number 3 (int[2]) and call a dummy function for all other interrupts. Create a dummy function and put its name into the table entries corresponding to the vectors for unused interrupts. Example of a dummy function
_Int_dummy: MFC0 j rfe r26,r14 self_jump ;Store interrupt-generated address in register r26. ;Do not reverse the order of two lines shown on the left. ;
3.1.3.3
Defining interrupt-processing functions
Interrupt-processing functions can be written in the C language. When writing interrupt-processing functions in C, use the function qualifier _ _interrupt. When _ _interrupt is used, all registers used in the function are saved on entry to the function and restored on exit from the function. Note also that interrupt-processing functions must be of type void and cannot have any parameters. Sample description of an interrupt-processing function
void _ _interrupt Int_sample(){ int i,j; for(i=0;i<10;i++) j*=i; }
In order to enable the exception handler to branch to an interrupt-processing function written in C, the interrupt-processing function must be declared externally. For example, if the interrupt handler routine is included in the start-up program, declare the interrupt-processing function at the beginning of the start-up program as shown below.
extern large _
The interrupt-processing function is declared as large since interrupt functions are always 32-bit ISA functions.
Note: An interrupt-processing function written in C will be slower than one written in assembly language. If interrupt processing must be carried out at high speed, it is recommended that the function be written in assembly language.
3-27
TX1940 Application Note 3.1.4 I/O header In the sample applications global variables are directly associated with addresses for use as I/O variables. I/O variables are unique to the Toshiba C compiler. Each of the sample applications includes the necessary I/O header.
3.1.4.1 I/O header file (used in sample applications)
io1940.h /* io1940.h */ /* register map */ typedef typedef typedef #ifndef #define #endif unsigned int _UINT_IO; unsigned char _UCHR_IO; unsigned short _USHT_IO; EXTERN EXTERN extern
/* PORT */ EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO
__io(0xfffff000) __io(0xfffff002) __io(0xfffff001) __io(0xfffff004) __io(0xfffff005) __io(0xfffff012) __io(0xfffff014) __io(0xfffff015) __io(0xfffff018) __io(0xfffff01A) __io(0xfffff01B) __io(0xfffff01E) __io(0xfffff020) __io(0xfffff021) __io(0xfffff025) __io(0xfffff02B) __io(0xfffff02E) __io(0xfffff02F) __io(0xfffff030) __io(0xfffff032) __io(0xfffff033) __io(0xfffff031) __io(0xfffff034) __io(0xfffff035) __io(0xfffff036) __io(0xfffff038) __io(0xfffff039) __io(0xfffff050)
IO_P0; IO_P0CR; IO_P1; IO_P1CR; IO_P1FC; IO_P2; IO_P2CR; IO_P2FC; IO_P3; IO_P3CR; IO_P3FC; IO_P4; IO_P4CR; IO_P4FC; IO_P5; IO_P7; IO_P7CR; IO_P7FC; IO_P8; IO_P8CR; IO_P8FC; IO_P9; IO_P9CR; IO_P9FC; IO_PA; IO_PACR; IO_PAFC; IO_ODE;
/* WDT */ EXTERN _UCHR_IO __io(0xfffff090) IO_WDMOD; EXTERN _UCHR_IO __io(0xfffff091) IO_WDCR; /* RT */ EXTERN _UCHR_IO __io(0xfffff0A0) IO_RTCCR; EXTERN _UCHR_IO __io(0xfffff0A4) IO_RTCREG; /* 8bit TIMER */ EXTERN _UCHR_IO __io(0xfffff100) EXTERN _UCHR_IO __io(0xfffff102) EXTERN _UCHR_IO __io(0xfffff103) EXTERN _UCHR_IO __io(0xfffff104) EXTERN _UCHR_IO __io(0xfffff105)
IO_TA01RUN; IO_TA0REG; IO_TA1REG; IO_TA01MOD; IO_TA1FFCR;
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TX1940 Application Note
EXTERN EXTERN EXTERN EXTERN EXTERN _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO __io(0xfffff108) __io(0xfffff10A) __io(0xfffff10B) __io(0xfffff10C) __io(0xfffff10D) IO_TA23RUN; IO_TA2REG; IO_TA3REG; IO_TA23MOD; IO_TA3FFCR;
/* 16bit TIMER */ EXTERN _UCHR_IO __io(0xfffff180) EXTERN _UCHR_IO __io(0xfffff182) EXTERN _UCHR_IO __io(0xfffff183) EXTERN _UCHR_IO __io(0xfffff188) EXTERN _UCHR_IO __io(0xfffff189) EXTERN _UCHR_IO __io(0xfffff18A) EXTERN _UCHR_IO __io(0xfffff18B) EXTERN _UCHR_IO __io(0xfffff18C) EXTERN _UCHR_IO __io(0xfffff18D) EXTERN _UCHR_IO __io(0xfffff18E) EXTERN _UCHR_IO __io(0xfffff18F) EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN EXTERN _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO _UCHR_IO __io(0xfffff190) __io(0xfffff192) __io(0xfffff193) __io(0xfffff198) __io(0xfffff199) __io(0xfffff19A) __io(0xfffff19B) __io(0xfffff19C) __io(0xfffff19D) __io(0xfffff19E) __io(0xfffff19F) __io(0xfffff1A0) __io(0xfffff1A2) __io(0xfffff1A3) __io(0xfffff1A8) __io(0xfffff1A9) __io(0xfffff1AA) __io(0xfffff1AB) __io(0xfffff1AC) __io(0xfffff1AD) __io(0xfffff1AE) __io(0xfffff1AF) __io(0xfffff1B0) __io(0xfffff1B2) __io(0xfffff1B3) __io(0xfffff1B8) __io(0xfffff1B9) __io(0xfffff1BA) __io(0xfffff1BB) __io(0xfffff1BC) __io(0xfffff1BD) __io(0xfffff1BE) __io(0xfffff1BF) */ __io(0xfffff200) __io(0xfffff201) __io(0xfffff202) __io(0xfffff203) __io(0xfffff204) __io(0xfffff205) __io(0xfffff208) __io(0xfffff209) __io(0xfffff20A) __io(0xfffff20B)
IO_TB0RUN; IO_TB0MOD; IO_TB0FFCR; IO_TB0RG0L; IO_TB0RG0H; IO_TB0RG1L; IO_TB0RG1H; IO_TB0CP0L; IO_TB0CP0H; IO_TB0CP1L; IO_TB0CP1H; IO_TB1RUN; IO_TB1MOD; IO_TB1FFCR; IO_TB1RG0L; IO_TB1RG0H; IO_TB1RG1L; IO_TB1RG1H; IO_TB1CP0L; IO_TB1CP0H; IO_TB1CP1L; IO_TB1CP1H; IO_TB2RUN; IO_TB2MOD; IO_TB2FFCR; IO_TB2RG0L; IO_TB2RG0H; IO_TB2RG1L; IO_TB2RG1H; IO_TB2CP0L; IO_TB2CP0H; IO_TB2CP1L; IO_TB2CP1H; IO_TB3RUN; IO_TB3MOD; IO_TB3FFCR; IO_TB3RG0L; IO_TB3RG0H; IO_TB3RG1L; IO_TB3RG1H; IO_TB3CP0L; IO_TB3CP0H; IO_TB3CP1L; IO_TB3CP1H;
/* UART/SIO 0/1 EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO
IO_SC0BUF; IO_SC0CR; IO_SC0MOD0; IO_BR0CR; IO_BR0ADD; IO_SC0MOD1; IO_SC1BUF; IO_SC1CR; IO_SC1MOD0; IO_BR1CR;
3-29
TX1940 Application Note
EXTERN _UCHR_IO __io(0xfffff20C) IO_BR1ADD; EXTERN _UCHR_IO __io(0xfffff20D) IO_SC1MOD1; /* ISCBUS/SIO */ EXTERN _UCHR_IO __io(0xfffff240) EXTERN _UCHR_IO __io(0xfffff241) EXTERN _UCHR_IO __io(0xfffff242) EXTERN _UCHR_IO __io(0xfffff243) #define IO_SBI0SR IO_SBI0CR2 EXTERN _UCHR_IO __io(0xfffff244) EXTERN _UCHR_IO __io(0xfffff245) /* UART 3/4 */ EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO /* 10bitADC */ EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO /* INTC */ EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO
IO_SBI0CR1; IO_SBI0DBR; IO_I2C0AR; IO_SBI0CR2; IO_SBI0BR0; IO_SBI0BR1;
__io(0xfffff280) __io(0xfffff281) __io(0xfffff282) __io(0xfffff283) __io(0xfffff284) __io(0xfffff285) __io(0xfffff288) __io(0xfffff289) __io(0xfffff28A) __io(0xfffff28B) __io(0xfffff28C) __io(0xfffff28D)
IO_SC3BUF; IO_SC3CR; IO_SC3MOD0; IO_BR3CR; IO_BR3ADD; IO_SC3MOD1; IO_SC4BUF; IO_SC4CR; IO_SC4MOD0; IO_BR4CR; IO_BR4ADD; IO_SC4MOD1;
__io(0xfffff300) __io(0xfffff301) __io(0xfffff302) __io(0xfffff303) __io(0xfffff304) __io(0xfffff305) __io(0xfffff306) __io(0xfffff307) __io(0xfffff310) __io(0xfffff311) __io(0xfffff312)
IO_ADREG04L; IO_ADREG04H; IO_ADREG15L; IO_ADREG15H; IO_ADREG26L; IO_ADREG26H; IO_ADREG37L; IO_ADREG37H; IO_ADMOD0; IO_ADMOD1; IO_ADMOD2;
__io(0xffffe000) __io(0xffffe002) __io(0xffffe004) __io(0xffffe008) __io(0xffffe00a) __io(0xffffe00c) __io(0xffffe00e) __io(0xffffe014) __io(0xffffe016) __io(0xffffe01c) __io(0xffffe01e) __io(0xffffe020) __io(0xffffe022) __io(0xffffe028) __io(0xffffe02a) __io(0xffffe030) __io(0xffffe032) __io(0xffffe034) __io(0xffffe036) __io(0xffffe038) __io(0xffffe03a) __io(0xffffe03c) __io(0xffffe03e) __io(0xffffe040) __io(0xffffe060)
IO_IMC0L; IO_IMC0H; IO_IMC1L; IO_IMC2L; IO_IMC2H; IO_IMC3L; IO_IMC3H; IO_IMC5L; IO_IMC5H; IO_IMC7L; IO_IMC7H; IO_IMC8L; IO_IMC8H; IO_IMCAL; IO_IMCAH; IO_IMCCL; IO_IMCCH; IO_IMCDL; IO_IMCDH; IO_IMCEL; IO_IMCEH; IO_IMCFL; IO_IMCFH; IO_IVR; IO_INTCLR;
3-30
TX1940 Application Note
/* DMAC ch.0 */ EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO /* DMAC ch.1 */ EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO /* DMAC ch.2 */ EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO /* DMAC ch.3 */ EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO EXTERN _USHT_IO __io(0xffffe200) __io(0xffffe204) __io(0xffffe208) __io(0xffffe20c) __io(0xffffe210) __io(0xffffe218) IO_CCR0; IO_CSR0; IO_SAR0; IO_DAR0; IO_BCR0; IO_DTCR0;
__io(0xffffe220) __io(0xffffe224) __io(0xffffe228) __io(0xffffe22c) __io(0xffffe230) __io(0xffffe238)
IO_CCR1; IO_CSR1; IO_SAR1; IO_DAR1; IO_BCR1; IO_DTCR1;
__io(0xffffe240) __io(0xffffe244) __io(0xffffe248) __io(0xffffe24c) __io(0xffffe250) __io(0xffffe258)
IO_CCR2; IO_CSR2; IO_SAR2; IO_DAR2; IO_BCR2; IO_DTCR2;
__io(0xffffe260) __io(0xffffe264) __io(0xffffe268) __io(0xffffe26c) __io(0xffffe270) __io(0xffffe278)
IO_CCR3; IO_CSR3; IO_SAR3; IO_DAR3; IO_BCR3; IO_DTCR3;
EXTERN _USHT_IO __io(0xffffe280) IO_DCR; EXTERN _USHT_IO __io(0xffffe28C) IO_DHR; /* CS/WAIT */ EXTERN _UINT_IO EXTERN _UINT_IO EXTERN _UINT_IO EXTERN _UINT_IO EXTERN _UINT_IO EXTERN _UINT_IO EXTERN _USHT_IO /* CG */ EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO EXTERN _UCHR_IO
__io(0xffffe400) __io(0xffffe404) __io(0xffffe408) __io(0xffffe40C) __io(0xffffe480) __io(0xffffe484) __io(0xffffe488)
IO_BMA0; IO_BMA1; IO_BMA2; IO_BMA3; IO_B01CS; IO_B23CS; IO_BEXCS;
__io(0xffffeE00) __io(0xffffeE01) __io(0xffffeE02) __io(0xffffeE03) __io(0xffffeE04) __io(0xffffeE10) __io(0xffffeE11) __io(0xffffeE12) __io(0xffffeE13) __io(0xffffeE14) __io(0xffffeE17) __io(0xffffeE20)
IO_SYSCR0; IO_SYSCR1; IO_SYSCR2; IO_SYSCR3; IO_ADCCLK; IO_IMCGA0; IO_IMCGA1; IO_IMCGA2; IO_IMCGA3; IO_IMCGB0; IO_IMCGB3; IO_EICRCG;
adc.h /* adc.h */ /* A/D Converter */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* ADMOD0 */
3-31
TX1940 Application Note
#define #define #define #define #define #define EOCF ADBF ITM0 REPEAT SCAN ADS _BIT07 _BIT06 _BIT03 _BIT02 _BIT01 _BIT00
/* ADMOD1 */ #define VREFON #define I2AD #define ADTRGE #define ADCH2 #define ADCH1 #define ADCH0
_BIT07 _BIT06 _BIT03 _BIT02 _BIT01 _BIT00
/* ADREG04L */ #define ADR01 _BIT07 #define ADR00 _BIT06 #define ADR0RF _BIT00 /* ADREG04H */ #define ADR09 #define ADR08 #define ADR07 #define ADR06 #define ADR05 #define ADR04 #define ADR03 #define ADR02
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* ADREG15L */ #define ADR11 _BIT07 #define ADR10 _BIT06 #define ADR1RF _BIT00 /* ADREG15H */ #define ADR19 #define ADR18 #define ADR17 #define ADR16 #define ADR15 #define ADR14 #define ADR13 #define ADR12
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* ADREG26L */ #define ADR21 _BIT07 #define ADR20 _BIT06 #define ADR2RF _BIT00 /* ADREG26H */ #define ADR29 #define ADR28 #define ADR27 #define ADR26 #define ADR25 #define ADR24 #define ADR23 #define ADR22
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* ADREG37L */ #define ADR31 _BIT07 #define ADR30 _BIT06 #define ADR3RF _BIT00 /* ADREG37H */
3-32
TX1940 Application Note
#define #define #define #define #define #define #define #define ADR39 ADR38 ADR37 ADR36 ADR35 ADR34 ADR33 ADR32 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
cg.h /* cg.h */ /* CG */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* SYSCR */ #define SCOSEL #define ALESEL #define LUPEG #define LUPTM #define WUPT1 #define WUPT0 #define STBY1 #define STBY0 #define DRVE #define SYSCK #define FPSEL #define DFOSC #define GEAR1 #define GEAR0 #define XEN #define XTEN #define RXEN #define RXTEN #define RSYSCK #define WUEF #define PRCK1 #define PRCK0
_BIT30 _BIT28 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT16 _BIT13 _BIT12 _BIT11 _BIT09 _BIT08 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* ADCLK */ #define ADCCK1 _BIT01 #define ADCCK0 _BIT00 /* IMCGA */ #define EMCG31 #define EMCG30 #define INT3EN #define EMCG21 #define EMCG20 #define INT2EN #define EMCG11 #define EMCG10 #define INT1EN #define EMCG01 #define EMCG00 #define INT0EN
_BIT29 _BIT28 _BIT24 _BIT21 _BIT20 _BIT16 _BIT13 _BIT12 _BIT08 _BIT05 _BIT04 _BIT00
/* IMCGB */ #define EMCG71 #define EMCG70 #define INTRTCEN #define EMCG41 #define EMCG40 #define INT4EN
_BIT29 _BIT28 _BIT24 _BIT05 _BIT04 _BIT00
3-33
TX1940 Application Note
/* EICRCG */ #define ICRCG2 _BIT02 #define ICRCG1 _BIT01 #define ICRCG0 _BIT00 cs_wait.h /* cs_wait.h */ /* CS/WAIT Controller */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* BMA0 */ #define MA0 (_BIT15|_BIT14|_BIT13|_BIT12|_BIT11|_BIT10|_BIT09|_BIT08|_BIT07|_BIT06|_BIT05|_BIT04|_BIT 03|_BIT02|_BIT01|_BIT00) #define BA0 (_BIT31|_BIT30|_BIT29|_BIT28|_BIT27|_BIT26|_BIT25|_BIT24|_BIT23|_BIT22|_BIT21|_BIT20|_BIT 19|_BIT18|_BIT17|_BIT16) /* BMA1 */ #define MA1 (_BIT15|_BIT14|_BIT13|_BIT12|_BIT11|_BIT10|_BIT09|_BIT08|_BIT07|_BIT06|_BIT05|_BIT04|_BIT 03|_BIT02|_BIT01|_BIT00) #define BA1 (_BIT31|_BIT30|_BIT29|_BIT28|_BIT27|_BIT26|_BIT25|_BIT24|_BIT23|_BIT22|_BIT21|_BIT20|_BIT 19|_BIT18|_BIT17|_BIT16) /* BMA2 */ #define MA2 (_BIT15|_BIT14|_BIT13|_BIT12|_BIT11|_BIT10|_BIT09|_BIT08|_BIT07|_BIT06|_BIT05|_BIT04|_BIT 03|_BIT02|_BIT01|_BIT00) #define BA2 (_BIT31|_BIT30|_BIT29|_BIT28|_BIT27|_BIT26|_BIT25|_BIT24|_BIT23|_BIT22|_BIT21|_BIT20|_BIT 19|_BIT18|_BIT17|_BIT16) /* BMA3 */ #define MA3 (_BIT15|_BIT14|_BIT13|_BIT12|_BIT11|_BIT10|_BIT09|_BIT08|_BIT07|_BIT06|_BIT05|_BIT04|_BIT 03|_BIT02|_BIT01|_BIT00) #define BA3 (_BIT31|_BIT30|_BIT29|_BIT28|_BIT27|_BIT26|_BIT25|_BIT24|_BIT23|_BIT22|_BIT21|_BIT20|_BIT 19|_BIT18|_BIT17|_BIT16) /* B01CS */ #define B0OM #define B0BUS #define B0W #define B0E #define B0RCV #define B1OM #define B1BUS #define B1W #define B1E #define B1RCV /* B23CS */ #define B2OM #define B2BUS #define B2W #define B2E #define B2M #define B2RCV #define B3OM #define B3BUS #define B3W
(_BIT07|_BIT06) _BIT04 (_BIT03|_BIT02|_BIT01|_BIT00) _BIT11 (_BIT09|_BIT08) (_BIT23|_BIT22) _BIT20 (_BIT19|_BIT18|_BIT17|_BIT16) _BIT27 (_BIT25|_BIT24)
(_BIT07|_BIT06) _BIT04 (_BIT03|_BIT02|_BIT01|_BIT00) _BIT11 _BIT10 (_BIT09|_BIT08) (_BIT23|_BIT22) _BIT20 (_BIT19|_BIT18|_BIT17|_BIT16)
3-34
TX1940 Application Note
#define B3E #define B3RCV /* BEXCS */ #define BEXOM #define BEXBUS #define BEXW #define BEXRCV _BIT27 (_BIT25|_BIT24)
(_BIT07|_BIT06) _BIT04 (_BIT03|_BIT02|_BIT01|_BIT00) (_BIT09|_BIT08)
dmac.h /* dmac.h */ /* DMAC */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* CCR0,CCR1,CCR2,CCR3 */ #define Str _BIT31 #define NIEn _BIT23 #define AbIEn _BIT22 #define Big _BIT17 #define ExR _BIT14 #define PosE _BIT13 #define Lev _BIT12 #define SReq _BIT11 #define RelEn _BIT10 #define SIO _BIT09 #define SAC1 _BIT08 #define SAC0 _BIT07 #define DIO _BIT06 #define DAC1 _BIT05 #define DAC0 _BIT04 #define TrSiz1 _BIT03 #define TrSiz0 _BIT02 #define DPS1 _BIT01 #define DPS0 _BIT00 /* CSR0,CSR1,CSR2,CSR3 */ #define Act _BIT31 #define NC _BIT23 #define AbC _BIT22 #define BES _BIT20 #define BED _BIT19 #define Conf _BIT18 /* SAR0,SAR1,SAR2,SAR3 */ #define SAddr0 _BIT00 #define SAddr1 _BIT01 #define SAddr2 _BIT02 #define SAddr3 _BIT03 #define SAddr4 _BIT04 #define SAddr5 _BIT05 #define SAddr6 _BIT06 #define SAddr7 _BIT07 #define SAddr8 _BIT08 #define SAddr9 _BIT09 #define SAddr10 _BIT10 #define SAddr11 _BIT11 #define SAddr12 _BIT12 #define SAddr13 _BIT13 #define SAddr14 _BIT14 #define SAddr15 _BIT15 #define SAddr16 _BIT16 #define SAddr17 _BIT17 #define SAddr18 _BIT18 #define SAddr19 _BIT19
3-35
TX1940 Application Note
#define #define #define #define #define #define #define #define #define #define #define #define SAddr20 SAddr21 SAddr22 SAddr23 SAddr24 SAddr25 SAddr26 SAddr27 SAddr28 SAddr29 SAddr30 SAddr31 _BIT20 _BIT21 _BIT22 _BIT23 _BIT24 _BIT25 _BIT26 _BIT27 _BIT28 _BIT29 _BIT30 _BIT31
/* DAR0,DAR1,DAR2,DAR3 */ #define DAddr0 _BIT00 #define DAddr1 _BIT01 #define DAddr2 _BIT02 #define DAddr3 _BIT03 #define DAddr4 _BIT04 #define DAddr5 _BIT05 #define DAddr6 _BIT06 #define DAddr7 _BIT07 #define DAddr8 _BIT08 #define DAddr9 _BIT09 #define DAddr10 _BIT10 #define DAddr11 _BIT11 #define DAddr12 _BIT12 #define DAddr13 _BIT13 #define DAddr14 _BIT14 #define DAddr15 _BIT15 #define DAddr16 _BIT16 #define DAddr17 _BIT17 #define DAddr18 _BIT18 #define DAddr19 _BIT19 #define DAddr20 _BIT20 #define DAddr21 _BIT21 #define DAddr22 _BIT22 #define DAddr23 _BIT23 #define DAddr24 _BIT24 #define DAddr25 _BIT25 #define DAddr26 _BIT26 #define DAddr27 _BIT27 #define DAddr28 _BIT28 #define DAddr29 _BIT29 #define DAddr30 _BIT30 #define DAddr31 _BIT31 /* BCR0,BCR1,BCR2,BCR3 */ #define DMABC0 _BIT00 #define DMABC1 _BIT01 #define DMABC2 _BIT02 #define DMABC3 _BIT03 #define DMABC4 _BIT04 #define DMABC5 _BIT05 #define DMABC6 _BIT06 #define DMABC7 _BIT07 #define DMABC8 _BIT08 #define DMABC9 _BIT09 #define DMABC10 _BIT10 #define DMABC11 _BIT11 #define DMABC12 _BIT12 #define DMABC13 _BIT13 #define DMABC14 _BIT14 #define DMABC15 _BIT15 #define DMABC16 _BIT16 #define DMABC17 _BIT17
3-36
TX1940 Application Note
#define #define #define #define #define #define DMABC18 DMABC19 DMABC20 DMABC21 DMABC22 DMABC23 _BIT18 _BIT19 _BIT20 _BIT21 _BIT22 _BIT23
/* DTCR0,DTCR1,DTCR2,DTCR3 */ #define DACM2 _BIT05 #define DACM1 _BIT04 #define DACM0 _BIT03 #define SACM2 _BIT02 #define SACM1 _BIT01 #define SACM0 _BIT00 /* DCR */ #define Rst
_BIT31
/* DHR0,DHR1,DHR2,DHR3 */ #define DOT0 _BIT00 #define DOT1 _BIT01 #define DOT2 _BIT02 #define DOT3 _BIT03 #define DOT4 _BIT04 #define DOT5 _BIT05 #define DOT6 _BIT06 #define DOT7 _BIT07 #define DOT8 _BIT08 #define DOT9 _BIT09 #define DOT10 _BIT10 #define DOT11 _BIT11 #define DOT12 _BIT12 #define DOT13 _BIT13 #define DOT14 _BIT14 #define DOT15 _BIT15 #define DOT16 _BIT16 #define DOT17 _BIT17 #define DOT18 _BIT18 #define DOT19 _BIT19 #define DOT20 _BIT20 #define DOT21 _BIT21 #define DOT22 _BIT22 #define DOT23 _BIT23 #define DOT24 _BIT24 #define DOT25 _BIT25 #define DOT26 _BIT26 #define DOT27 _BIT27 #define DOT28 _BIT28 #define DOT29 _BIT29 #define DOT30 _BIT30 #define DOT31 _BIT31 intc.h /* intc.h */ /* INTC */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* IMC0L */ #define EIM11 #define EIM10 #define DM1 #define IL12 #define IL11 #define IL10
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08
3-37
TX1940 Application Note
#define #define #define #define #define #define EIM01 EIM00 DM0 IL02 IL01 IL00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* IMC0H */ #define EIM31 #define EIM30 #define DM3 #define IL32 #define IL31 #define IL30 #define EIM21 #define EIM20 #define DM2 #define IL22 #define IL21 #define IL20 /* IMC1L */ #define EIM51 #define EIM50 #define DM5 #define IL52 #define IL51 #define IL50 #define EIM41 #define EIM40 #define DM4 #define IL42 #define IL41 #define IL40 /* IMC2H */ #define EIMB1 #define EIMB0 #define DMb #define ILB2 #define ILB1 #define ILB0 #define EIA1 #define EIMA0 #define DMA #define ILA2 #define ILA1 #define ILA0 /* IMC3L */ #define EIMD1 #define EIMD0 #define DMD #define ILD2 #define ILD1 #define ILD0 #define EIMC1 #define EIMC0 #define DMC #define ILC2 #define ILC1 #define ILC0
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* IMC3H */ #define EIMF1 _BIT29 #define EIMF0 _BIT28
3-38
TX1940 Application Note
#define #define #define #define #define #define #define #define #define #define DMF ILF2 ILF1 ILF0 EIME1 EIME0 DME ILE2 ILE1 ILE0 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
/* IMC5L */ #define EIM151 #define EIM150 #define DM15 #define IL152 #define IL151 #define IL150 #define EIM141 #define EIM140 #define DM14 #define IL142 #define IL141 #define IL140 /* IMC5H */ #define EIM171 #define EIM170 #define DM17 #define IL172 #define IL171 #define IL170 #define EIM161 #define EIM160 #define DM16 #define IL162 #define IL161 #define IL160 /* IMC7L */ #define EIMID1 #define EIMID0 #define DMID #define ILID2 #define ILID1 #define ILID0 #define EIMIC1 #define EIMIC0 #define DMIC #define ILIC2 #define ILIC1 #define ILIC0 /* IMC7H */ #define EIMIF1 #define EIMIF0 #define DMIF #define ILIF2 #define ILIF1 #define ILIF0 #define EIMIE1 #define EIMIE0 #define DMIE #define ILIE2 #define ILIE1 #define ILIE0
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
3-39
TX1940 Application Note
/* IMC8L */ #define EIM211 #define EIM210 #define DM21 #define IL212 #define IL211 #define IL210 #define EIM201 #define EIM200 #define DM20 #define IL202 #define IL201 #define IL200 /* IMC8H */ #define EIM231 #define EIM230 #define DM23 #define IL232 #define IL231 #define IL230 #define EIM221 #define EIM220 #define DM22 #define IL222 #define IL221 #define IL220 /* IMCAL */ #define EIM291 #define EIM290 #define DM29 #define IL292 #define IL291 #define IL290 #define EIM281 #define EIM280 #define DM28 #define IL282 #define IL281 #define IL280 /* IMCAH */ #define EIM2B1 #define EIM2B0 #define DM2B #define IL2B2 #define IL2B1 #define IL2B0 #define EIM2A1 #define EIM2A0 #define DM2A #define IL2A2 #define IL2A1 #define IL2A0 /* IMCCL */ #define EIM311 #define EIM310 #define DM31 #define IL312 #define IL311 #define IL310 #define EIM301 #define EIM300
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04
3-40
TX1940 Application Note
#define #define #define #define DM30 IL302 IL301 IL300 _BIT03 _BIT02 _BIT01 _BIT00
/* IMCCH */ #define EIM331 #define EIM330 #define DM33 #define IL332 #define IL331 #define IL330 #define EIM321 #define EIM320 #define DM32 #define IL322 #define IL321 #define IL320 /* IMCDL */ #define EIM341 #define EIM340 #define DM34 #define IL342 #define IL341 #define IL340 /* IMCDH */ #define EIM371 #define EIM370 #define DM37 #define IL372 #define IL371 #define IL370 #define EIM361 #define EIM360 #define DM36 #define IL362 #define IL361 #define IL360 /* IMCEL */ #define EIM391 #define EIM390 #define DM39 #define IL392 #define IL391 #define IL390 #define EIM381 #define EIM380 #define DM38 #define IL382 #define IL381 #define IL380 /* IMCEH */ #define EIM3B1 #define EIM3B0 #define DM3B #define IL3B2 #define IL3B1 #define IL3B0 #define EIM3A1 #define EIM3A0 #define DM3A #define IL3A2
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18
3-41
TX1940 Application Note
#define IL3A1 #define IL3A0 /* IMCFL */ #define EIM3D1 #define EIM3D0 #define DM3D #define IL3D2 #define IL3D1 #define IL3D0 #define EIM3C1 #define EIM3C0 #define DM3C #define IL3C2 #define IL3C1 #define IL3C0 /* IMCFH */ #define EIM3F1 #define EIM3F0 #define DM3F #define IL3F2 #define IL3F1 #define IL3F0 #define EIM3E1 #define EIM3E0 #define DM3E #define IL3E2 #define IL3E1 #define IL3E0 /* IVR */ #define IVR9 #define IVR8 #define IVR7 #define IVR6 #define IVR5 #define IVR4 /* INTCLR */ #define EICLR6 #define EICLR5 #define EICLR4 #define EICLR3 #define EICLR2 #define EICLR1 #define EICLR0 _BIT17 _BIT16
_BIT13 _BIT12 _BIT11 _BIT10 _BIT09 _BIT08 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT29 _BIT28 _BIT27 _BIT26 _BIT25 _BIT24 _BIT21 _BIT20 _BIT19 _BIT18 _BIT17 _BIT16
_BIT09 _BIT08 _BIT07 _BIT06 _BIT05 _BIT04
_BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
pio.h /* pio.h */ /* PIO */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* PORT0 */ /* P0 */ #define P07 #define P06 #define P05 #define P04 #define P03 #define P02 #define P01 #define P00 /* P0CR */
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
3-42
TX1940 Application Note
#define #define #define #define #define #define #define #define P07C P06C P05C P04C P03C P02C P01C P00C _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* PORT1 */ /* P1 */ #define P17 #define P16 #define P15 #define P14 #define P13 #define P12 #define P11 #define P10 /* P1CR */ #define P17C #define P16C #define P15C #define P14C #define P13C #define P12C #define P11C #define P10C /* P1FC */ #define P17F #define P16F #define P15F #define P14F #define P13F #define P12F #define P11F #define P10F /* PORT2 */ /* P2 */ #define P27 #define P26 #define P25 #define P24 #define P23 #define P22 #define P21 #define P20 /* P2CR */ #define P27C #define P26C #define P25C #define P24C #define P23C #define P22C #define P21C #define P20C /* P2FC */ #define P27F #define P26F #define P25F #define P24F #define P23F #define P22F #define P21F #define P20F
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
3-43
TX1940 Application Note
/* PORT3 */ /* P3 */ #define P37 #define P36 #define P35 #define P34 #define P33 #define P32 #define P31 #define P30 /* P3CR */ #define P37C #define P36C #define P35C #define P34C #define P33C #define P32C /* P3FC */ #define P36F #define P35F #define P34F #define P32F #define P31F #define P30F /* PORT4 */ /* P4 */ #define P44 #define P43 #define P42 #define P41 #define P40 /* P4CR */ #define P44C #define P43C #define P42C #define P41C #define P40C /* P4FC */ #define P44F #define P43F #define P42F #define P41F #define P40F /* PORT5 */ /* P5 */ #define P57 #define P56 #define P55 #define P54 #define P53 #define P52 #define P51 #define P50 /* PORT7 */ /* P7 */ #define P77 #define P76 #define P75 #define P74 #define P73 #define P72 #define P71
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT06 _BIT05 _BIT04 _BIT02 _BIT01 _BIT00
_BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01
3-44
TX1940 Application Note
#define /* P7CR #define #define #define #define #define #define #define #define /* P7FC #define #define #define #define #define #define #define P70 */ P77C P76C P75C P74C P73C P72C P71C P70C */ P76F P75F P74F P73F P72F P71F P70F _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* PORT8 */ /* P8 */ #define P87 #define P86 #define P85 #define P84 #define P83 #define P82 #define P81 #define P80 /* P8CR */ #define P87C #define P86C #define P85C #define P84C #define P83C #define P82C #define P81C #define P80C /* P8FC */ #define P87F #define P86F #define P85F #define P84F #define P83F #define P82F #define P81F #define P80F /* PORT9 */ /* P9 */ #define P97 #define P96 #define P95 #define P94 #define P93 #define P92 #define P91 #define P90 /* P9CR */ #define P97C #define P96C #define P95C #define P94C #define P93C #define P92C #define P91C
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01
3-45
TX1940 Application Note
#define /* P9FC #define #define #define #define P90C */ P95F P93F P92F P90F _BIT00 _BIT05 _BIT03 _BIT02 _BIT00
/* PORTA */ /* PA */ #define PA7 #define PA6 #define PA5 #define PA4 #define PA3 #define PA2 #define PA1 #define PA0 /* PACR */ #define PA7C #define PA6C #define PA5C #define PA4C #define PA3C #define PA2C #define PA1C #define PA0C /* PAFC */ #define PA7F #define PA6F #define PA5F #define PA4F /* ODE */ #define ODE72 #define ODE70 #define ODEA7 #define ODEA6 #define ODE93 #define ODE90
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04
_BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
sio.h /* sio.h */ /* SIO */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* SC0CR,SC1CR,SC3CR,SC4CR */ #define RB8 _BIT07 #define EVEN _BIT06 #define PE _BIT05 #define OERR _BIT04 #define PERR _BIT03 #define FERR _BIT02 #define SCLKS _BIT01 #define IOC _BIT00 /* SC0MOD0,SC1MOD0,SC3MOD0,SC4MOD0 */ #define TB8 _BIT07 #define CTSE _BIT06 #define RXE _BIT05 #define WU _BIT04 #define SM1 _BIT03 #define SM0 _BIT02 #define SC1 _BIT01 #define SC0 _BIT00
3-46
TX1940 Application Note
/* BR0CR */ #define BR0ADDE #define BR0CK1 #define BR0CK0 #define BR0S3 #define BR0S2 #define BR0S1 #define BR0S0 /* BR1CR */ #define BR1ADDE #define BR1CK1 #define BR1CK0 #define BR1S3 #define BR1S2 #define BR1S1 #define BR1S0 /* BR3CR */ #define BR3ADDE #define BR3CK1 #define BR3CK0 #define BR3S3 #define BR3S2 #define BR3S1 #define BR3S0 /* BR4CR */ #define BR4ADDE #define BR4CK1 #define BR4CK0 #define BR4S3 #define BR4S2 #define BR4S1 #define BR4S0
_BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* SC0MOD1,SC1MOD1,SC3MOD1,SC4MOD1 */ #define I2S0 _BIT07 #define FDPX0 _BIT06 /* BR0ADD */ #define BR0K3 #define BR0K2 #define BR0K1 #define BR0K0 /* BR1ADD */ #define BR1K3 #define BR1K2 #define BR1K1 #define BR1K0 /* BR3ADD */ #define BR3K3 #define BR3K2 #define BR3K1 #define BR3K0 /* BR4ADD */ #define BR4K3 #define BR4K2 #define BR4K1 #define BR4K0
_BIT03 _BIT02 _BIT01 _BIT00
_BIT03 _BIT02 _BIT01 _BIT00
_BIT03 _BIT02 _BIT01 _BIT00
_BIT03 _BIT02 _BIT01 _BIT00
/* SC0BUF,SC1BUF,SC3BUF,SC4BUF */
3-47
TX1940 Application Note
#define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* I2CBUS/SIO */ /* SBI0CR1 */ #define BC2 _BIT07 #define SIOS _BIT07 #define BC1 _BIT06 #define SIOINH _BIT06 #define BC0 _BIT05 #define SIOM1 _BIT05 #define ACK _BIT04 #define SIOM0 _BIT04 #define SCK2 _BIT02 #define SCK1 _BIT01 #define SCK0 _BIT00 /* SBI0DBR */ #define DB7 #define DB6 #define DB5 #define DB4 #define DB3 #define DB2 #define DB1 #define DB0 /* I2C0AR */ #define SA6 #define SA5 #define SA4 #define SA3 #define SA2 #define SA1 #define SA0 #define ALS
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
_BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00
/* SBI0CR2,SBI0SR */ #define MST _BIT07 #define TRX _BIT06 #define BB _BIT05 #define PIN _BIT04 #define SBIM1 _BIT03 #define AL _BIT03 #define SIOF _BIT03 #define SBIM0 _BIT02 #define AAS _BIT02 #define SEF _BIT02 #define SWRST1 _BIT01 #define AD0 _BIT01 #define SWRST0 _BIT00 #define LRB _BIT00
3-48
TX1940 Application Note
/* SBI0BR0 */ #define SBI0BR0 _BIT06 /* SBI0BR1 */ #define P4EN
_BIT07
tmr.h /* tmr.h */ /* TMR */ #ifndef _BIT32_DEF #include "bit32def.h" #endif /* 8bit timer */ /* TA01RUN */ #define TA0RDE #define I2TA01 #define TA01PRUN #define TA1RUN #define TA0RUN /* TA23RUN */ #define TA2RDE #define I2TA23 #define TA23PRUN #define TA3RUN #define TA2RUN /* TA01MOD */ #define TA01M1 #define TA01M0 #define PWM01 #define PWM00 #define TA1CLK1 #define TA1CLK0 #define TA0CLK1 #define TA0CLK0 /* TA23MOD */ #define TA23M1 #define TA23M0 #define PWM21 #define PWM20 #define TA3CLK1 #define TA3CLK0 #define TA2CLK1 #define TA2CLK0 /* TA1FFCR */ #define TAFF1C1 #define TAFF1C0 #define TAFF1IE #define TAFF1IS /* TA3FFCR */ #define TAFF3C1 #define TAFF3C0 #define TAFF3IE #define TAFF3IS
_BIT07 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT07 _BIT06 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT03 _BIT02 _BIT01 _BIT00 _BIT03 _BIT02 _BIT01 _BIT00
/* 16bit timer */ /* TB0RUN */ #define TB0RDE _BIT07 #define I2TB0 _BIT03 #define TB0PRUN _BIT02 #define TB0RUN _BIT00 /* TB1RUN */ #define TB1RDE _BIT07 #define I2TB1 _BIT03 #define TB1PRUN _BIT02
3-49
TX1940 Application Note
#define TB1RUN /* TB2RUN */ #define TB2RDE #define I2TB2 #define TB2PRUN #define TB2RUN /* TB3RUN */ #define TB3RDE #define I2TB3 #define TB3PRUN #define TB3RUN /* TB0MOD */ #define TB0CP0I #define TB0CPM1 #define TB0CPM0 #define TB0CLE #define TB0CLK1 #define TB0CLK0 /* TB1MOD */ #define TB1CP0I #define TB1CPM1 #define TB1CPM0 #define TB1CLE #define TB1CLK1 #define TB1CLK0 /* TB2MOD */ #define TB2CP0I #define TB2CPM1 #define TB2CPM0 #define TB2CLE #define TB2CLK1 #define TB2CLK0 /* TB3MOD */ #define TB3CP0I #define TB3CPM1 #define TB3CPM0 #define TB3CLE #define TB3CLK1 #define TB3CLK0 /* TB0FFCR */ #define TB0C1T1 #define TB0C0T1 #define TB0E1T1 #define TB0E0T1 #define TB0FF0C1 #define TB0FF0C0 /* TB1FFCR */ #define TB1C1T1 #define TB1C0T1 #define TB1E1T1 #define TB1E0T1 #define TB1FF0C1 #define TB1FF0C0 /* TB2FFCR */ #define TB2C1T1 #define TB2C0T1 #define TB2E1T1 #define TB2E0T1 #define TB2FF0C1 #define TB2FF0C0 /* TB0FFCR */ #define TB3C1T1 #define TB3C0T1 #define TB3E1T1 #define TB3E0T1 #define TB3FF0C1 _BIT00 _BIT07 _BIT03 _BIT02 _BIT00 _BIT07 _BIT03 _BIT02 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01 _BIT00 _BIT05 _BIT04 _BIT03 _BIT02 _BIT01
3-50
TX1940 Application Note
#define TB3FF0C0 _BIT00 /* WDT */ #define WDTE #define WDTP1 #define WDTP0 #define I2WDT #define RESCR /* RT */ #define RTCRCLR #define RTCSEL1 #define RTCSEL0 #define RTCRUN
_BIT07 _BIT06 _BIT05 _BIT02 _BIT01
_BIT03 _BIT02 _BIT01 _BIT00
bit32def.h /* _BIT32_DEF */ #ifndef _BIT32_DEF #define _BIT32_DEF #endif #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #define _BIT00 _BIT01 _BIT02 _BIT03 _BIT04 _BIT05 _BIT06 _BIT07 _BIT08 _BIT09 _BIT10 _BIT11 _BIT12 _BIT13 _BIT14 _BIT15 _BIT16 _BIT17 _BIT18 _BIT19 _BIT20 _BIT21 _BIT22 _BIT23 _BIT24 _BIT25 _BIT26 _BIT27 _BIT28 _BIT29 _BIT30 _BIT31 (0x00000001) (0x00000002) (0x00000004) (0x00000008) (0x00000010) (0x00000020) (0x00000040) (0x00000080) (0x00000100) (0x00000200) (0x00000400) (0x00000800) (0x00001000) (0x00002000) (0x00004000) (0x00008000) (0x00010000) (0x00020000) (0x00040000) (0x00080000) (0x00100000) (0x00200000) (0x00400000) (0x00800000) (0x01000000) (0x02000000) (0x04000000) (0x08000000) (0x10000000) (0x20000000) (0x40000000) (0x80000000)
io1940.c #ifndef EXTERN #define EXTERN #endif #include "io1940.h"
When the io1940.c file is created in this way, it should be compiled together with the io1940.h source file.
3-51
TX1940 Application Note
3
3.2
DC Motor Drive
To change the speed of the built-in DC motor, turn the control knob on the circuit board.
3.2.1
3.2.1.1
Functional specifications
Motor operation method
To start the built-in DC motor, press the INT0 switch on the TB1940 board. (*Take care to avoid personal injury or damage to other equipment from the motor's rotating shaft.) Turn the control knob on the circuit board clockwise to increase the motor speed and counterclockwise to reduce the motor speed. The motor speed is indicated by the decimal number on the 7-segment LEDs (in units of rpm). The motor speed shown is obtained by reading the pulse output from the motor's encoder using the TX1940 and converting it into a number of revolutions. (The motor speed is controlled using openloop control, and without using feedback control) The INT0 switch can also be used to stop the motor. The 7-segment LEDs display the number of revolutions while the motor is moving and "STOP" while it is not.
3.2.1.2 Basic specifications
* * * * * * *
The motor speed is controlled using PWM. The duty cycle of the PWM waveform is determined by the voltage level for the control knob. The voltage from the control knob is converted into a digital value by an AD converter. The motor speed can be increased by turning the control knob clockwise. The 7-segment LEDs show the rate of revolution based on the output from the motor's encoder. The motor encoder's period is calculated using the TX1940's capture function. The built-in motor generates 200 pulses per revolution. The INT0 switch can be used to start and stop the motor.
3-52
TX1940 Application Note 3.2.2 Functional block diagram Figure 3.2.1 shows the functional blocks of the TX1940 which are used by the sample program.
TX1940FDBF
P87-80 7SEG-LED 3.2.3 Output to control 7-segment LED display
LED PA4-PA0
INT0
INT0 Input
3.2.4 Switch to control external interrupt INT0
AN3
Variable Resistor
3.2.5 Capture of AD-converted data
Motor TA3OUT TB0IN0 Motor Driver
3.2.6 Control of 8-bit PWM
M
Pulse output 3.2.7 Control of external pulse frequency measurement
16-Bit Timer TMRB2
3.2.8 Control of 2-ms interval timer
Figure 3.2.1 Functional block diagram
3-53
TX1940 Application Note 3.2.3
3.2.3.1
Control of 7-segment LED display output
Overview of 7-segment LED display
*
The display data is dynamically displayed on the 7-segment LEDs and updated every 2 ms.
LED Digit 0 (PA0) (Data 0)
(Data 4)
(Data 3)
(Data 2)
(Data 1)
7SEG-LED
Segments (P80~P87)
Digit 1 (PA1) Digit 2 (PA2) Digit 3 (PA3) Digit 4 (PA4)
Figure 3.2.2 Correspondence between digits and segments
*
Segments (P80~P87)
Figure 3.2.3 shows the timing for the digit and segment outputs.
Data 0
Data 1
Data 2
Data 3
Data 4
Digit 0 (PA0)
Digit 1 (PA1)
Digit 2 (PA2)
Digit 3 (PA3)
Digit 4 (PA4) 2 ms Note: The segment and digit outputs are all active-Low.
Figure 3.2.3 Timing of display digit update
3-54
TX1940 Application Note * To light any given display segment, output a Low signal on the corresponding ports. The correspondence between display segments and port outputs is shown in Table 3.2.1.
A F G E D 7SEG-LED C Dp Dp G F E D LED C B A B
Table 3.2.1 Correspondence between display segments and port outputs
P87(Dp) 0 1 2 3 4 5 6 7 8 9 A B C D E F Blank * * * * * * * * * * * * * * * * 1 P86(G) 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 P85(F) 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 P84(E) 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 1 P83(D) 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 1 1 P82(C) 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1 P81(B) 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 1 P80(A) 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1
Note 1: All segment outputs are active-Low. Note 2: Set port output * to 0 to display Dp and to 1 to turn Dp off.
3-55
TX1940 Application Note
3.2.3.2 Control method for 7-segment LED display
Initial settings
P8 P8CR P8FC PA PACR PAFC 7 1 1 0 6 1 1 0 -5 1 1 0 4 1 1 0 1 1 0 3 1 1 0 1 1 0 2 1 1 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 Set P80~P87 output latches to 1. Set P80~P87 for output. Set P80~P87 to be port. Set PA0~PA4 output latches to 1. Set PA0~PA4 for output. Set PA0~PA4 to be port.
Note: X denotes Don't care; "-" denotes No change.
Processing of the display output Create the display data in the main routine and output display data for each digit to the ports within a 2-ms Interval Timer interrupt. For details of the 2-ms interval timer, please refer to Section 3.3.8. The brightness of the 7-segment and indicator LEDs can be adjusted by changing the time at which display data is output to the ports. The display output control flow is shown in Figure 3.2.4.
INTTB21 INTCLR 0x21
Clears INTC block interrupt requests.
Stop digit output for PA
Turns display off.
Output segment to P8
Output digit to PA
Turns display on.
Modify digit counter
End of interrupt
Figure 3.2.4 Display output control flow
3-56
TX1940 Application Note 3.2.4
3.2.4.1
Controlling of the INT0 external interrupt switch
Overview of the external interrupt switch
The INT0 interrupt is an edge-triggered interrupt; the interrupt is recognized on the falling edge of INT0. The active state of this interrupt is set by the CG block of the TX1940. In the sample program here, the INT0 interrupt is used as an external interrupt switch.
3.2.4.2 Method for controlling the external interrupt switch
Initial settings
P7CR P7FC IMCGA0 EICRCG=0x00 IMC0L 765 0-0-XX1 4 0 3 X 2 X 1 X 0 1
Set P77 to be INT0 input pin. Set the interrupt's active state to falling edge using the CG block.
INTCLR=0x01
X X 0 1 0 1 1 0 High- Make sure interrupt sources are recognized as active when High. order X X X X X X X X Low- Set the interrupt level to 6. order Any desired value can be set in the Interrupt Register. Clear the interrupt request during initialization.
Interrupt handling Figure 3.2.5 shows the control flow for handling of the INT0 interrupt. When INT0 and other external interrupts are handled, the CG block interrupt requests must be cleared in software. Also, INTC block interrupt requests must be processed in software, irrespective of how interrupt handling is performed.
INT0 EICRCG 0x00 INTCLR 0x01
Clears CG block interrupt requests.
Clears INTC block interrupt requests.
Body of the handler routine
End of interrupt
Figure 3.2.5 INT0 interrupt control flow
3-57
TX1940 Application Note 3.2.5
3.2.5.1
Capturing AD-converted data
Overview of AD conversion
*
When the control knob on the board is turned, a voltage proportional to the knob position is applied to AN3. In the sample program the analog data on AN3 is sampled every 2.0 ms. The 2.0-ms interval time is effected using an interval timer interrupt. (For details of how to set the interval timer interrupt, please refer to Section 3.2.8.) AD conversion is performed in Fixed-Channel Single-Conversion Mode. The voltage on AN3 is used to calculate the duty cycle for the PWM waveform. (For details of how to calculate the duty cycle, please refer to Section 3.2.6.)
* *
VREFH Clockwise turn
VREFL
Counterclockwise turn
AN3
Figure 3.2.6 Control knob switch circuit
3-58
TX1940 Application Note
3.2.5.2 AD conversion control method
Initial settings
Initial settings in the main routine 76543210 ADCCLK XXXXXX01 INTCLR=0x3b IMCEH X X 1 1 0 0 1 1 Highorder X X X X X X X X Loworder ADMOD1 1XXX0011 Note: X denotes Don't care. Settings for 2-ms interval timer 76543210 ADMOD0 XX000001
Set AD conversion time to 10.75 s (when fsys = 32 MHz). Set active state of INTAD to be rising edge and set level to 3. The Interrupt Register can be set to any desired value. Set analog input channel to AN3 and select Vref as voltage to apply.
Start conversion in Fixed-Channel Single-Conversion Mode.
Capturing AD-converted data * * When an interrupt is generated to signal completion of AD conversion, read out the data from the AD Conversion Result Register. The control flow for capturing AD converted data is shown in Figure 3.2.7.
INTAD INTCLR 0x3b Read ADREG37H and ADREG37L
End of interrupt
Figure 3.2.7 INTAD interrupt control flow
3-59
TX1940 Application Note 3.2.6
3.2.6.1
Controlling 8-bit PWM
Overview of 8-bit PWM
* *
Using the 8-Bit Timer (TMRA2), generate a PWM signal of 7-bit resolution. Using TMRA2 and 2 n-1 overflow control, output a PWM signal with any desired duty cycle in 126 steps from the timer flip-flop output pin TA3OUT. Figure 3.2.8 shows the PWM output waveform. The PWM period is set to 31.75 s. The duty cycle is rewritten every 2 ms based on the value of the AD conversion result (AN3). (The 2-ms interval time is effected using a TMRB Interval Timer interrupt.) The motor drive circuit on the TB1940 is active-Low (see Figure 3.2.9). Therefore, the revolution speed of the DC motor in this program is at its lowest when TAREG2 = 1 and at its highest when TAREG2 = 126. (When motor revolution is enabled, TA3FF is initially set to 1.) Control of the PWM duty cycle TA2REG = 1 Low-level duration = 0.25 s Duty cycle = 99.21% TA2REG = 126 Low-level duration = 31.5 s Duty cycle = 0.79% Adjust the waveform so that the Low-level duration lies between these two extremes. The Low-level duration can be set in increments of 0.25 s. In the sample program the seven high-order bits of the 10-bit AN3 conversion result are stored in TAREG2. However, because TAREG2 < (27 - 1) and TAREG2 0, TAREG2 can take any value from 1 to 126.
*
*
*
*
Matching of TA2REG and Up-Counter 2 2n-1 Overflow (INTTA2 interrupt) TA3OUT tPWM (PWM period)
Figure 3.2.8 PWM timing waveform
3.3 V 22 K TA3OUT (Shared with P73) 390 74VHCT14 MP4015
12 V 2FWJ42M Motor
Figure 3.2.9 Motor drive circuit
3-60
TX1940 Application Note
Table 3.2.2 PWM period
@fc = 32 MHz Peripheral Clock Selection Clock Gear Value 00 (fc) Selection of Prescaler Clock 01 (fperiph/2) 10 (fperiph) 01 (fc/2) PWM Period 26 - 1 T1 T4 63 s 31.5 s 15.8 s 126 s 63 s 31.5 s 126 s 63 s T16 252 s 126 s 63 s 504 s 252 s 126 s 504 s 252 s T1 31.8 s 63.5 s 31.8 s 63.5 s 27 - 1 T4 127 s 31.8 s 127 s 63.5 s T16 508 s 254 s 127 s 508 s 254 s T1 63.8 s 31.9 s 63.8 s 255 s 510 s 255 s 63.8 s 31.9 s 63.8 s 28 - 1 T4 255 s 127.5 s 63.8 s 510 s 255 s 127.5 s 510 s 255 s T16 1020 s 510 s 255 s 2040 s 1020 s 510 s 2040 s 1020 s
00 (fperiph/4) 15.8 s 7.9 s
15.9 s 63.5 s
00 (fperiph/4) 31.5 s 01 (fperiph/2) 15.8 s 10 (fperiph) 63 s 63 s 7.9 s
254 s 1016 s 127.5 s
0 (fgear)
10 (fc/4)
00 (fperiph/4) 10 (fperiph)
252 s 1008 s 127 s
508 s 2032 s 127 s 508 s
1020 s 4080 s
01 (fperiph/2) 31.5 s 11 (fc/8) 00 (fperiph/4) 126 s 01 (fperiph/2) 10 (fperiph) 00 (fc) 01 (fperiph/2) 10 (fperiph) 01 (fc/2) 01 (fperiph/2) 1 (fc) 10 (fperiph) 10 (fc/4) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 11 (fc/8) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph)
254 s 1016 s 127.5 s
504 s 2016 s 254 s 1016 s 4064 s 252 s 1008 s 127 s 126 s 63 s 31.5 s 15.8 s 63 s 31.5 s 15.8 s 63 s 31.5 s 63 s 504 s 252 s 126 s 63 s 252 s 126 s 63 s 252 s 126 s 63 s 252 s 126 s 63 s 31.8 s 31.8 s 508 s 2032 s 254 s 1016 s 127 s 31.8 s 127 s 63.5 s 31.8 s 127 s 63.5 s 127 s 508 s 254 s 127 s 508 s 254 s 127 s 508 s 254 s 127 s 508 s 254 s 127 s
2040 s 8160 s 1020 s 4080 s 510 s 255 s 127.5 s 63.8 s 255 s 127.5 s 63.8 s 255 s 127.5 s 255 s 2040 s 1020 s 510 s 255 s 1020 s 510 s 255 s 1020 s 510 s 255 s 1020 s 510 s 255 s
00 (fperiph/4) 15.8 s
15.9 s 63.5 s
00 (fperiph/4) 15.8 s
Note 1: The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Note 2: The dash character, --, in the table indicates a prohibited setting. 3.2.6.2 PWM control method
Initial settings
Clock conditions System clock High-speed clock gear Prescaler clock :High-speed (fc = 32 MHz) :x1 (fc) :fperiph/4 (fperiph = fsys)
P7CR P7FC TA23RUN TA23MOD TA2REG TA3FFCR
MSB LSB 76543210 ----1--- ----1--- -XXX---0 1110--01 00000001 XXXX0100
Set P73 to be TA3OUT pin.
Stop TMRA2 and clear it to 0. Select PWM Mode (with period = 27- 1) and select T1 as input clock. Initial value for PWM duty cycle Low-level duration Set TA3FF to 1 and set it to be inverted by a match detection signal from TMRA2. Set INT0 interrupt to enable inversion. TMRA2 count is started by INT0.
(Note: X denotes Don't care; "-" denotes No change.
3-61
TX1940 Application Note PWM duty cycle set-up
MSB LSB 76543210 0-------
TA2REG
Set Low-level duration
TAREG2 can be set to any value from 1 to 126. Figure 3.2.10 shows a diagram of the PWM waveform when the motor's rate of revolution is set to its minimum and its maximum values by the program.
0.25 s H-level TREG2 = 1 L-level
31.75 s H-level TREG2 = 126 L-level 31.5 s
Figure 3.2.10 Sample PWM waveform
PWM duty cycle set-up
Processing by 2-ms Interval Timer interrupt
Convert AD-converted value to 7-bits value Satisfy the condition TAREG < (27-1), TAREG2! = 0.
Determine final Low-level duration
Store in TA2REG
Because double-buffering is enabled, the duty cycle will change on the next cycle.
End
Figure 3.2.11 Flowchart showing how PWM duty cycle is determined
3-62
TX1940 Application Note Processing using the INT0 interrupt * * Stop and start the motor using the INT0 interrupt switch. (*For details of how to set the INT0 interrupt, please refer to Section 3.2.4.) Settings to start the motor
7 - X - MSB 65 XX XX XX 4 X X X 3 - 1 - 2 - 0 - LSB 10 -0 10 -1
TA23RUN TA3FFCR TA23RUN
Stop TA2RUN and clear to 0. Clear TA3FF and enable TMRA2 for inversion. TMRA2 starts counting.
Note: X denotes Don't care; "-" denotes No change.
*
Settings to stop the motor
MSB LSB 76543210 -XXX---0 XXXX0100
TA23RUN TA3FFCR
Stop TA2RUN and clear to 0. Set TA3FF and disable inversion.
Figure 3.2.12 shows the flowchart for starting and stopping the motor.
INT0 interrupt
Clear interrupt latch
Idle TA3OUT inversion starts
Enable/Disable motor revolution
Revolution Fix TA3OUT High
Enable motor revolution
Disable motor revolution
End of interrupt
Figure 3.2.12 Flowchart for starting and stopping the Motor
3-63
TX1940 Application Note 3.2.7
3.2.7.1
Controlling external pulse frequency measurement Overview of frequency measurement feature Using the 16-Bit Timer capture feature, measure the encoder pulse output frequency for the built-in DC motor. The built-in DC motor generates 200 encoder pulses per revolution. The motor's encoder output is connected to the TB0IN0 input to enable the frequency of the external pulses to be ascertained. * * * TA1OUT is selected for capture timing. TA1FF is inverted using TMRA1 as the source clock. The Low-level duration of TA1FF is set to 8192 s (to generate an INTTA1 interrupt every 8192 s). The number of pulses on TB0IN0 during this interval is measured. The INTTA1 generation interval can be set to any desired time by changing the value of TA1REG. The DC motor's encoder period (TB0IN0) is ascertained by the INTTA1 interrupt routine.
*
3.2.7.2
Method for controlling frequency measurement
Initial settings
76543210 TMRA1 setting TA01RUN TA01MOD TA1FFCR TA1REG IMC5L -X 00 XX 128 XX Stop TMRA1 and clear it to 0. Select T256 as the input clock. Clear TA1FF and select TMRA1 with inversion enabled. 64 s x 128 = 8192 s 1 1 0 1 0 1 High- Enable INTTA1, set interrupt level to 5 and active state to be order rising edge. (Note 1) X X X X X X X X Loworder Stop TMRB0 and clear it to 0. Select TA1OUT for capture timing, disable up-counter from being cleared and select TB0IN0 as source clock. Start TMRB0. Start TMRA1. XX- -1 XX11XX XX1011
TMRB setting TB0RUN -0XX- - - 0 TB0MOD 00111000 TB0RUN TA01RUN 00XX- 1X1 0XXX- 11X
Note 1: The interrupt level can be set to any desired value.
INTTA1 interrupt processing * * TMRB0 latches the value of UC0 into TB0CP0 on the rise of TA1OUT and the value of UC0 into TB0CP1 on the fall of TA1OUT. The difference between TB0CP0 and TB0CP1 is ascertained when the INTTA1 interrupt is generated on the rise of TA1OUT, enabling the number of pulses to be calculated. A flowchart showing INTTA1 interrupt control is shown in Figure 3.2.13. In the sample program the number of pulses is sampled 32 times. Each time the average of the sampled values is calculated by the INTTA1 interrupt routine. Figure 3.2.14 illustrates how the average of the sampled data is calculated.
* *
3-64
TX1940 Application Note
INTTA1 interrupt INTCLR 15
Clear INTC block interrupt requests.
Interrupt count ? Odd Even Latch TB0CP0L and TB0CP0H
Adopts the value captured on the rise of TA1OUT.
Latch TB0CP1L and TB0CP1H
Calculate number of pulses
Notice of pulse data change
Body of the handler routine
LOOP count
End of interrupt
Figure 3.2.13 INTTA1 control flowchart
INTTA1 interrupt count Value of TB0IN0 period
1st
2nd
3rd
31st
32nd
33rd
34th
35th
Interval A Interval B Interval C
Average of TB0IN0 period
Average of Average of Average of intervals A intervals B intervals C
8192 s : Undefined
Figure 3.2.14 Method for calculating average value
3-65
TX1940 Application Note 3.2.8
3.2.8.1
Controlling the 2-ms Interval Timer
Overview of the 2-ms Interval Timer
* * *
3.2.8.2
Generates a repeated interrupt with a period of 2 ms. Uses the 16-Bit Timer (TMRB2). Sets the interval time at which to generate INTTB21 in the Timer Register TB2RG1.
Control method for 2-ms Interval Timer
765 000 110 001 4 0 0 0 3 0 0 0 2 0 0 1 1 0 1 1 0 0 1 1
TB2RUN TB2FFCR TB2MOD TB2RG1L TB2RG1H IMC8L TB2RUN
00000001 11110100 0x33-00XX-1X1
Stop TMRB2. Disable trigger. Select prescaler output clock for input clock and disable capture feature. Set interval time. Set TB2RG1 to 2000 s / T16 = 500. Start TMRB0.
3-66
TX1940 Application Note 3.2.9
3.2.9.1
Sample programs
Generic flowchart
Main processing Disable interrupts Initialize SFR Enable interrupts
No
Pulse data changed? Yes Motor revolution enabled? Yes Calculate motor speed Update 7-segment LED display Update 7-segment LED display Start/stop motor revolution Clear Pulse Count Changed flag Interrupt done INT0 No
Figure 3.2.15 Main processing
Figure 3.2.16 INT0 interrupt processing
mpwm_duty INTAD Capture AD conversion results Interrupt done Determine PWM low-level duration Establish PWM low-level duration Interrupt done
Figure 3.2.17 INTAD interrupt processing
Figure 3.2.18 Determining the PWM duty cycle
INTTA1
Capture TB0CP0H/L and TB0CP1H/L
INTTB21 mpwm_duty(); 7-segment LED display output Start AD conversion Interrupt done
Calculate pulse count Set Pulse Count Changed flag Interrupt done
Figure 3.2.19 INTTA1 interrupt processing
Figure 3.2.20 INTTB21 interrupt processing
3-67
TX1940 Application Note
3.2.9.2 File configuration
The configuration of files used in the sample program is shown in Table 3.2.3.
Table 3.2.3 File configuration Filename
Stc9i16_dcm.asm io1940.c dcmotor_drv.c intrpt_dcmotor.c func_dcmotor.c io1940.h ram_dcmotor.h led_dcmotor.h
Contents
Start-up routine Defines special function registers DC motor drive main processing Interrupt processing Processing for various functions Declares special function registers Declares external variables Defines constants
Page Reference
3-12 3-51 3-70 3-73 3-75 3-28 3-77 3-78
3.2.9.3
Vector table
The vector table used in the sample programs is shown below. Replace the vector table section in the start-up routine with the vector table given below.
_VecTable: dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw
_Int_dummy _mint0 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintta1 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _minttb21 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy
;0 --;1 --;2 --;3 --;4 --;5 --;6 --;7 --;8 --;9 --;10--;11--;12--;13--;14--;15--;16--;17--;18--;19--;20--;21--;22--;23--;24--;25--;26--;27--;28--;29--;30--;31--;32--;33--;34--;35--;36--;37--;38--;39--;40---
software set INT[0] INT[1] INT[2] INT[3] INT[4] * * * * INT[5] INT[6] INT[7] INT[8] INT[9] INT[A] * * * * INTTA0 : 8bit Timer 0 INTTA1 : 8bit Timer 1 INTTA2 : 8bit Timer 2 INTTA3 : 8bit Timer 3 * * * * INTTB00 :16bit Timer 0 INTTB01 :16bit Timer 0 INTTB10 :16bit Timer 1 INTTB11 :16bit Timer 1 INTTB20 :16bit Timer 2 INTTB21 :16bit Timer 2 INTTN30 :16bit Timer 3 INTTB31 :16bit Timer 3 * * * * INTTBOF0:16bit Timer 0
(TB0RG0) (TB0RG1) (TB1RG0) (TB1RG1) (TB2RG0) (TB2RG1) (TB3RG0) (TB3RG1)
(OverFlow)
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TX1940 Application Note
dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintad _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;41--;42--;43--;44--;45--;46--;47--;48--;49--;50--;51--;52--;53--;54--;55--;56--;57--;58--;59--;60--;61--;62--;63--INTTBOF1:16bit Timer 1 (OverFlow) INTTBOF2:16bit Timer 2 (OverFlow) INTTBOF3:16bit Timer 3 (OverFlow) * * * * INTRX0 :Serial receive (channel.0) INTTX0 :Serial transmit (channel.0) INTRX1 :Serial receive (channel.1) INTTX1 :Serial transmit (channel.1) INTS2 :Serial Channel 2 interrupt * INTRX3 :Serial receive (channel.3) INTTX3 :Serial transmit (channel.3) INTRX4 :Serial receive (channel.4) INTTX4 :Serial transmit (channel.4) INTRTC :Timer for RTC interrupt INTAD :AD conversion finished INTDMA0:DMA transfer finished (channel.0) INTDMA1:DMA transfer finished (channel.1) INTDMA2:DMA transfer finished (channel.2) INTDMA3:DMA transfer finished (channel.3)
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TX1940 Application Note
3.2.9.4 Source code
Filename: dcmotor_drv.c
/* ************************************************** ** Application Note ** ** ** ** ( MAIN ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" #include "ram_dcmotor.h" #include "led_dcmotor.h" #include
/******************************************************************************/ /* Module name : */ /******************************************************************************/ /* Function :Initializes DC motor drive mode. */ /* Input :None */ /* Output :SFR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mdcmoter_init(void){ /*--- Setting CG ---*/ IO_SYSCR0 = 0xf0; IO_SYSCR1 IO_ADCCLK = 0x10; = 0x01;
/* /* /* /*
=1 =1 =1 =1 */ =0 =0 =00 */ =0 =1 =0 =0 */ =01 */
/*--- Setting I/O ports ---*/ IO_P0 = 0xff; /* Output High on P00-P07 */ IO_P0CR = 0xff; /* Set P00-P07 for output */ IO_P1 IO_P1CR IO_P1FC IO_P2 IO_P2CR IO_P2FC IO_P3 IO_P3CR IO_P3FC = 0xff; = 0xff; = 0x00; = 0xff; = 0xff; = 0x00; = 0xff; = 0x00; = 0x00; /* Output High on P10-P17 */ /* Set P10-P17 for output */ /* Set P10-P17 to be a port */ /* Output High on P20-P27 */ /* Set P20-P27 for output */ /* Set P20-P27 to be a port */ /* Output High on P30-P31 and set P32-P37 for pull-up */ /* Set P30-P31 for output and P32-P37 for input */ /* Set P30-P37 to be a port */
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TX1940 Application Note
IO_P4 IO_P4CR IO_P4FC = 0x1f; = 0x10; = 0x00; /* Set P40-P43 for pull-up and output High on P44 */ /* Set P40-P43 for input and P44 for output */ /* Set P40-P44 to be a port */
IO_P7 IO_P7CR IO_P7FC IO_P7 IO_P7CR IO_P7FC IO_P8 IO_P8CR IO_P8FC IO_P9 IO_P9CR IO_P9FC IO_PA IO_PACR IO_PAFC
= 0x65; = 0x67; = 0x00; = 0x6d; = 0x6f; = 0x98; = 0xff; = 0xff; = 0x00; = 0x3f; = 0xc0; = 0x00; = 0x1f; = 0x3f; = 0x00;
/* Output High on P70,P72,P75,P76 */ /* Set P70,P71,P72,P75,P76 for output and P73,P74,P77 for input */ /* Set P70-P77 to be a port */ /* Output High on P76,P75,P73,P72,P70 */ /* Set P76,P75,P74,P73,P72,P71,P70 for output and P77,P74 for input */ /* Use P74 as TB0IN0 and P73 as TA3OUT; set others to be ports */ /* Output High on P87-P80 */ /* Set P87-P80 for output */ /* Set P87-P80 to be a port */ /* Output Low on P96-P97 */ /* Set P90-P95 for input and P96-P97 for output */ /* Set P90-P97 to be a port */ /* Output High on PA4-PA0 */ /* Set PA5-PA0 for output and PA7-PA6 for input */ /* Set PA7-PA0 to be a port*/
/*--- INT0 switch ---*/ IO_IMCGA0 = 0x21; /* =10 =1 */ /* falling edge */ IO_IMC0L = 0x1600; /* High level, interrupt level 6 */ IO_INTCLR = 0x01; /* Interrupt request clear */ /*--- Settings for IO_ADMOD0 = IO_ADMOD1 = IO_IMCEH = AD conversion ---*/ 0x00; /* =0 =0 =0 =0 */ 0x83; /* =1 <12AD>=0 =0 =011 */ 0x3330; /* Rising edge, interrupt level 3 */
/*--- 2-ms timer settings ---*/ /* TMRB2 */ IO_TB2RUN = 0x00; /* =0 =0 =0 =0 */ IO_TB2FFCR = 0xc3; /* =0 =0 =0 */ /* =0 =11 */ IO_TB2MOD = 0x27; /* =1 =00 =1 =11 */ /* T16=4.0usec */ IO_TB2RG1L = 0xf4; /* TB2RG1 = 2000/4 */ IO_TB2RG1H = 0x01; /* */ IO_IMC8L = 0x3530; /* Rising edge, interrupt level 5 */ /*--- PWM settings /* TMRA2 */ IO_TA23RUN = IO_TA23MOD = IO_TA2REG = IO_TA3FFCR = ---*/ 0x00; 0xe1; 1; 0x04; /* =0 =0 =0 =0 */ /* PWM frequency 31.5 kHz, CLK:T1(0.25usec) */ /* =01 =0 =0 */ /* Set enable by INT0 */
/*--- Settings for capture feature ---*/ /* TMRA1 */ IO_TA01RUN = 0x00; /* =0 =0 =0 */ /* =0 =0 */ IO_TA01MOD = 0x0c; /* =00 =00 =11 =00 */ IO_TA1FFCR = 0x0b; /* =10 =1 =1 */ IO_TA1REG = 128; /* Generate interrupt approximately every about 8192 us */ IO_IMC5L = 0x3430; /* Rising edge, interrupt level 4 */ /* TMRB0 */
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TX1940 Application Note
IO_TB0RUN IO_TB0MOD = 0x00; = 0x38; /* =0 =0 =0 =0 */ /* =1 =11 =0 =00 */ /* Capture timing=TA1OU,T CLK=TB0IN0 */
/*--- Timer start ---*/ IO_TA01RUN = 0x06; IO_TB0RUN = 0x05; IO_TB2RUN = 0x05; }
/* =0 =0 =1 =1 =0 */ /* =0 =0 =1 =1 */ /* =0 =0 =1 =1 */
/******************************************************************************/ /* Module name :main */ /******************************************************************************/ /* Function :Main processing */ /* Input :None */ /* Output :None */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void main(void){ __DI(); /*--- Initialize SFR ---*/ mdcmoter_init(); __EI(); for(;;){ switch(frpm_disp){ case 0: break; case 1: /*--- Change 7 segment display data(revolution rate) ---*/ switch(fmotor_rot_able){ /*--- 7 segment LED display data during revolution of motor ---*/ case DRV_ENABLE: /*--- Calculate revolution rate of motor ---*/ mrpm_calc(); g7seg_data[3] = t7seg_ch[grpm3]; g7seg_data[2] = t7seg_ch[grpm2]; g7seg_data[1] = t7seg_ch[grpm1]; g7seg_data[0] = t7seg_ch[grpm0]; break; /*--- 7 segment LED display data during stop motor ---*/ case DRV_DISABLE: g7seg_data[3] = c7seg_S; g7seg_data[2] = c7seg_t; g7seg_data[1] = c7seg_o; g7seg_data[0] = c7seg_p; break; } frpm_disp = 0; break; } } }
3-72
TX1940 Application Note Filename: intrpt_dcmotor.c
/* ************************************************** ** Application Note ** ** ** ** ( INTERRUPT ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" #include "ram_dcmotor.h"
/*************************************************/ /* Constant definitions */ /*************************************************/ unsigned char fmotor_rot_able = DRV_DISABLE; /* Motor Revolution Enable flag */ unsigned short gad3_data; /* Store AN3 conversion result */ unsigned short gcp0, gcp1; /* Store captured value */ unsigned char frpm_disp = 0; /* Flag of 7SEG-LED display Enable */
/******************************************************************************/ /* Module name :mintad */ /******************************************************************************/ /* Function :Generate interrupt on completion of AD conversion. (interrupt)*/ /* Input :ADREG37H,ADREG37L */ /* Output :INTCLR,gad3_data */ /******************************************************************************/ void __interrupt mintad(void){ IO_INTCLR = 0x3b; gad3_data = (IO_ADREG37H<<2)+(IO_ADREG37L>>6); }
/* Capture value of AN3 */
/******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/ /* Function :2-ms Interval Timer (interrupt) */ /* Input :None */ /* Output :INTCLR,ADMOD0 */ /******************************************************************************/ void __interrupt minttb21(void){ IO_INTCLR = 0x21; mpwm_duty(); p7seg_disp();
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TX1940 Application Note
IO_ADMOD0 = 0x01; } /* =0 =0 =0 =1 */
/******************************************************************************/ /* Module name :mintta1 */ /******************************************************************************/ /* Function :INTTA1 interrupt (interrupt) capture */ /* Input :TB0CP0L,TB0CP0H,TB0CP1L,TB0CP1H */ /* Output :INTCLR,gcp0,gcp1,frpm_disp */ /******************************************************************************/ void __interrupt mintta1(void){ unsigned char cp0l,cp0h,cp1l,cp1h; static unsigned int loop_count = 0; IO_INTCLR = 0x15; if( loop_count%2 != 0 ){ cp0l = IO_TB0CP0L; cp0h = IO_TB0CP0H; cp1l = IO_TB0CP1L; cp1h = IO_TB0CP1H; gcp0 = (cp0h<<8)+cp0l; gcp1 = (cp1h<<8)+cp1l; frpm_disp = 1 ; } loop_count++; }
/* Store Capture Register value */ /* Store Capture Register value */
/******************************************************************************/ /* Module name :mint0 */ /******************************************************************************/ /* Function :INT0 interrupt (external interrupt) */ /* Input :None */ /* Output :EICRCG,INTCLR,TA23RUN,TA3FFCR, fmotor_rot_able */ /******************************************************************************/ void __interrupt mint0(void){ IO_EICRCG = 0x00; IO_INTCLR = 0x01; IO_TA23RUN = 0x80; switch(fmotor_rot_able){ /*--- Start motor revolution---*/ case DRV_DISABLE: IO_TA3FFCR = 0x0a; IO_TA23RUN = 0x85;
/* =1 =0 =0 */ /* =0 =0 */
/* =10 =1 =0 */ /* =1 =0 =1 */ /* =0 =1 */ fmotor_rot_able = DRV_ENABLE; /* Set Enable flag */ break; /*--- Stop motor revolution ---*/ case DRV_ENABLE: IO_TA3FFCR = 0x04; /* =01 =0 =0 */ fmotor_rot_able = DRV_DISABLE; /* Prohibit Enable flag */ break; } }
3-74
TX1940 Application Note Filename: func_dcmotor.c
/* ************************************************** ** Application Note ** ** ** ** ( FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" #include "ram_dcmotor.h" #include "led_dcmotor.h" /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Definitions of port output (7SEG-LED digit) ---*/ #define c7seg_digit_out0 0x1e /* PA (00011110) */ #define c7seg_digit_out1 0x1d /* PA (00011101) */ #define c7seg_digit_out2 0x1b /* PA (00011011) */ #define c7seg_digit_out3 0x17 /* PA (00010111) */ #define c7seg_digit_out4 0x0f /* PA (00001111) */ /*--- Number of buffer array ---*/ #define LIMIT 32 /*--- Digit count ---*/ #define digit(pos) ((pos+1)%5) /*--- Count of buffer number ---*/ #define next(pos) ((pos+1)%LIMIT)
/*************************************************/ /* External variable definitions */ /*************************************************/ unsigned char g7seg_data[4]; /* 7SEG-LED display data */ unsigned char gled_data = cled_all_off; /* LED display data */ unsigned char grpm0,grpm1,grpm2,grpm3; /* store data of motor revolution number */
/******************************************************************************/ /* Module name :p7seg_disp */ /******************************************************************************/ /* Function :7-segment LED display output (using 2-ms interrupt) */ /* Input :gled_data,g7seg_data */ /* Output :P8,PA */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void p7seg_disp(void){
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TX1940 Application Note
static unsigned char ldisp_digit = 0; /*--- Turning display off ---*/ IO_P8 = 0xff; /*--- Display output ---*/ switch (ldisp_digit) { case 0: IO_PA = c7seg_digit_out0; IO_P8 = gled_data; break; case 1: IO_PA = c7seg_digit_out1; IO_P8 = g7seg_data[0]; break; case 2: IO_PA = c7seg_digit_out2; IO_P8 = g7seg_data[1]; break; case 3: IO_PA = c7seg_digit_out3; IO_P8 = g7seg_data[2]; break; case 4: IO_PA = c7seg_digit_out4; IO_P8 = g7seg_data[3]; break; } /*--- Digit count processing ---*/ ldisp_digit = digit(ldisp_digit); } /************************************************/ /* Display data table */ /************************************************/ /*--- 7SEG-LED ---*/ const unsigned char t7seg_ch[16] = { 0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xd8, 0x80,0x98,0x88,0x83,0xc6,0xa1,0x86,0x8e, };
/* Change digits */ /* Output LED */
/* Change digits */ /* Output 7 segment LED */
/* Change digits */ /* Output 7 segment LED */
/* Change digits */ /* Output 7 segment LED */
/* Change digits */ /* Output 7 segment LED */
/******************************************************************************/ /* Module name :mpwm_duty */ /******************************************************************************/ /* Function :Determine PWM Low-level duration (using 2-ms interrupt) */ /* Input :gad3_data */ /* Output :SFR,g7seg_data[] */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mpwm_duty(void){ /* PWM frequency:31kHz */ volatile unsigned char pls_w;
pls_w = (unsigned char)((gad3_data >> 3)); /* Setting with TR2REG<=126 required */ if(pls_w == 0) pls_w++; else if(pls_w == 127) pls_w--; IO_TA2REG = } pls_w;
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TX1940 Application Note
/******************************************************************************/ /* Module name :mrpm_disp */ /******************************************************************************/ /* Function :Outputs motor revolutions to 7-segment LEDs */ (using 2-ms interrupt) */ /* Input :gcp0,gcp1 */ /* Output :SFR,g7seg_data[] */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mrpm_calc(void){ unsigned int static unsigned int static unsigned char static unsigned short rpm; sum = 0; index = 0; buffer[LIMIT];
if(gcp1 >= gcp0){ /*--- Storing number of pulses ---*/ sum -= buffer[index]; buffer[index] = (gcp1-gcp0); sum += buffer[index]; /*--- Incrementing array index ---*/ index = next(index); /*--- Determining motor revolution rate [rpm] ---*/ /* Encoder output = 200(pluse/rev) */ /* Number of buffers 32, 8192 us -> 18 buffers shifted rpm = (300000*sum) >> 18;
*/
/*--- Converting revolution rate [rpm] into decimal number ---*/ grpm3 = (rpm/1000); /* Calculate 4th digit */ rpm = rpm-(grpm3*1000); grpm2 = (rpm/100); /* Calculate 3rd digit */ rpm = rpm-(grpm2*100); grpm1 = (rpm/10); /* Calculate second digit */ grpm0 = (rpm%10); /* Calculate first digit */ } }
Filename: ram_dcmotor.h
extern extern extern extern extern extern unsigned char unsigned char unsigned short unsigned short unsigned short unsigned char g7seg_data[4]; gled_data; gcp0; gcp1; gad3; fenable;
3-77
TX1940 Application Note Filename: led_dcmotor.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( LED HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*** Definition of 7-segment LEDs (Display characters) ***/ #define c7seg_S 0x92 /* S */ #define c7seg_t 0x87 /* t */ #define c7seg_o 0xa3 /* o */ #define c7seg_p 0x8c /* P */ /*** Definition of LEDs ***/ #define cled_all_on #define cled_all_off
0x00 0xff
/* Turn all LEDs on */ /* Turn all LEDs off */
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TX1940 Application Note
3
3.3
E2PROM
One byte of data can be read from or written to the E2PROM using the I2C Bus Mode of the serial bus interface (SBI).
3.3.1
3.3.1.1
Specifications
Basic specifications
* * * *
Uses the I2C Bus Mode of the serial bus interface (SBI) for data transfer. Uses the matrix keys (0~F) and the AD conversion keys (Read and Write) for key input. Sounds the buzzer on each key input. Uses 7-segment LEDs to display addresses and data.
Table 3.3.1 Key list Key Name Type of Key
Matrix AD conversion AD conversion Executes read Executes write
Key Function
Used for entry of addresses and data
0F Read Write
3.3.1.2
Method for reading data from E2PROM
The following text explains how to read from the TB1940 board. Step 1: Enter a two-digit address using the keys 0~F. (The data is shifted left with each key press.) Step 2: Press the Read key. Step 3: The data at the specified address is displayed. Step 4: Press the Read key or any of the keys 0~F to return to step 1. (If the keys 0~F are used, the data entered becomes the new address.) Example: Figure 3.3.1 shows how to read the data from address 04H.
Address Data
Step 1
04
7SEG-LED Step 2 Step 4
Step 3
049E
Figure 3.3.1 Procedure for reading data from the E2PROM
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TX1940 Application Note
3.3.1.3 Method for writing data to the E2PROM
The following text explains how to write to the TB1940 board. Step 1: Enter a two-digit address using the keys 0~F. (The data is shifted left with each key press.) Step 2: Press the Write key. (The saved data is immediately displayed.) Step 3: Enter two digits data using the keys 0~F. Step 4: Press the Write key to return to step 1. (This saves the data to the E2PROM.) Example: Figure 3.3.2 shows how to write the data A5H to address 04H.
Address Data
Step 1
04
7SEG-LED Step 2
049E
(Saved data)
Step 4
Step 3
04A5
Figure 3.3.2 Procedure for writing data to the E2PROM
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TX1940 Application Note 3.3.2 Functional block diagram
TX1940FDBF
SCL, SDA
I2C Bus EEPROM
3.3.3 Control of the E2PROM
AN2
Switch
3.3.4 Control of AD conversion key input
P76, 75, 72, 70, 44 Matrix Switch P57-54 3.3.5 Control of matrix key input
P87-80 7SEG-LED
3.3.6 Control of 7-segment LED display output LED PA4-PA0
TA1OUT Piezo-electric buzzer 16-Bit Timer TMRB2 3.3.8 2-ms Interval Timer
3.3.7 Control of beep tone output
Figure 3.3.3 Functional block diagram
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TX1940 Application Note 3.3.3
3.3.3.1
Control of the E2PROM
Overview of the E2PROM
AC characteristics of the E2PROM Table 3.3.2 below shows the AC characteristics of the E2PROM.
Table 3.3.2 AC characteristics of E2PROM Parameter
SCL Clock Frequency SDA and SCL Noise Cancel Time Bus Release Time Before Start of Transfer Start Condition Hold Time SCL Low-Level Time SCL High-Level Time Start Condition Set-up Time Data Hold Time Data Set-up Time SDA and SCL Signal Rise Time SDA and SCL Signal Fall Time Stop Condition Set-up Time Output Data Hold Time
Symbol
fSCL Tl tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO tDH
Min
Max
100 100
Unit
kHz ns s s s s s ns ns
4.7 4.0 4.7 4.0 4.7 0 250 1 300 4.7 300
s ns s ns
Calculating the internal SCL clock frequency System clock: fc ( = 32 MHz) Clock gear: fc/1 T0 = fperiph/4 ( = 8 MHz)
tHIGH tLOW 1/fscl
tLOW = 2 /T0 tHIGH = 2 /T0 + 4/T0 fscl = 1/(tLow + tHIGH) =
n
n
T0
2 +4 n 4 5 6 7 8 9 10 SCL Frequency 400 kHz 222 kHz 117 kHz 60.6 kHz 30.7 kHz 15.5 kHz 7.78 kHz Reserved
n
SBI0CR1 000 001 010 011 100 101 110 111
Figure 3.3.4 Clock source
Since the maximum SCL clock frequency for the E2PROM is 100 kHz, the setting n = 7 (a clock frequency of 60.6 kHz) is used in these sample programs. 3-82
TX1940 Application Note Setting slave addresses
Device type Device address
1
0
1
0
A2
A1
A0
R/W
0 1 0 Sample program settings
Figure 3.3.5 Setting slave addresses
I2C bus data format
(a) 1-byte data write
Slave address
Address
Data
SDA Line S ACK R/W ACK ACK
P
(b) 1-byte data read
Slave address
Address
Slave address
Data
SDA Line S ACK R/W ACK
S ACK R/W ACK
P
Note: S = start condition R / W = Direction bit ACK = Acknowledge bit P = stop condition
Figure 3.3.6 I2C bus data format used with the E2PROM
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TX1940 Application Note
3.3.3.2 E2PROM control method
Initial settings
7 1 1 X X 6 1 1 X X 5 1 4 1 3 1 0 2 1 0 1 0 0 1
PACR PAFC ODE IMCDL

Set PA6 to be SDA. Set PA7 to be SCL. Set PA7 and PA6 to be open-drain. Set INTS2 for rising edge and to level 1.
Note 1: Note: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
*
Device initialization
765 X0X 1XX 000 4 X X 1 3 X X X 2 X X 0 1 X X 1 0 X X 1 Stop when idle. Activate internal baud rate circuit. Set SCL clock to 60.6 kHz and put interface in Acknowledgement Mode. Set to recognize slave address. Set initial state to Slave Receiver Mode.
SBI0BR0 SBI0BR1 SBI0CR1 I2C0AR SBI0CR2
00000000 00011000
Note: X denotes Don't care.
Controlling writing to E2PROM
Write to E2PROM
No
= 0 Yes SBI0CR1 0x13 SBI0DBR 0xa4 SBI0CR2 0xf8
Check that the bus is free.
Set the interface to Acknowledgement Mode, and, after setting the transmission slave address and Direction bit in SBI0DBR, generate a start condition.
No
INTS2 occurs Yes SBI0DBR write address Set the write address for the E2PROM.
No
INTS2 occurs Yes SBI0DBR write data Set the write data for the E2PROM.
No
INTS2 occurs Yes SCI0CR2 0xd8 End Generate a stop condition.
Figure 3.3.7 Operation flow for control of writing to the E2PROM
3-84
TX1940 Application Note Controlling reading from the E PROM
Read from E2PROM
2
No
= 0 Yes SBI0CR1 0x13 SBI0DBR 0xa4 SBI0CR2 0xf8
Check that the bus is free.
Set the interface to Acknowledgement Mode, and after setting the transmission slave address and Direction bit in SBI0DBR, generate a start condition.
No
INTS2 occurs Yes SBI0DBR read address Set the read address for the E2PROM.
No
INTS2 occurs Yes SCI0CR2 0x18 Release the bus.
No
= 0 & = 1 Yes
Check that the bus is free and that no other devices are pulling the SCL line Low.
No
4.7-s wait finished Yes SBI0CR1 0x13 SBI0DBR 0xa5 SBI0CR2 0xf8 Set the interface to Acknowledgement Mode, and after setting the transmission slave address and Direction bit in SBI0DBR, generate a start condition.
No
INTS2 occurs Yes SCI0CR1 0x03 Dummy data SBI0DBR Exit Acknowledgement Mode and read the dummy data.
No
INTS2 occurs Yes Read data SBI0DBR Store the read data.
No
INTS2 occurs Yes SCI0CR2 0xd8 End Generate a stop condition.
Figure 3.3.8 Operation flow for control of reading from the E2PROM
3-85
TX1940 Application Note 3.3.4
3.3.4.1
Control of AD conversion key input
Overview of AD conversion keys
* * * *
Determine whether the AD conversion keys are on or off by reading the voltage from each key. Eliminate ON-chattering for a 30-ms period and eliminate OFF-chattering for a 30-ms period. Set the resistance value for each resistor so that the voltages across each resistor are the same. If two or more keys are pressed simultaneously, the voltage of the key which is located closer to Vdd is read. (In the sample program, key number 5 is read.)
[Read] 5 [Write] 4 [Unused] 3 [Unused] 2 [Unused] 1
Vcc
R0
1 4 R0
5 12 R0
5 6 R0
5 2 R0
AN2
Figure 3.3.9 Key numbers Table 3.3.3 Correspondence between AD-converted values and voltages Key Number
OFF 1 2 3 4 5
Voltage when Key ON (logical value)
3.30 V 2.65 V 1.99 V 1.34 V 0.67 V 0.00 V
AD-Converted Value when Key ON (logical value)
1023 821 616 415 207 0
AD-Converted Value of 8 High-Order Bits (logical value)
255 205 154 103 51 0
Note 1: This applies when Vcc = 3.3 V. Note 2: In the sample program only the eight high-order bits of the AD-converted value are used (the two low-order bits are discarded).
3.3.4.2
Method for controlling AD conversion key input
Initial settings
ADCCLK ADMOD0 ADMOD1 IMCEH 7 X 0 1 X X 6 X 0 0 X X 5 X 0 X 1 4 X 0 X 1 3 X 0 0 0 2 X 0 0 0 1 0 0 1 1 0 1 0 0 0 Set AD conversion time to 8 s (when fsys = 32 MHz). Select Fixed-Channel Single-Conversion Mode. Select Channel 2 and VREF as the voltage to apply. L H Set INTAD for rising edge and to level 2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
3-86
TX1940 Application Note AD conversion key input processing When an interrupt is generated on completion of AD conversion, the AD Conversion Result Register is read and the contents is converted into key data. Based on this converted key data, chattering-elimination processing is performed using a 2-ms Interval Timer interrupt. The processing for each key is performed in the main routine only after it has been confirmed that chattering elimination has been completed. For details of the 2-ms Interval Timer, please refer to Section 3.3.8.
AD conversion key input processing
INTAD INTCLR 0x3b Read ADREG26H Clear INTC block interrupt requests.
Key Confirmed flag ON Yes AD key confirmation processing
No
Convert to key data End End of interrupt INTTB21 INTCLR 0x21
Clear INTC block interrupt requests.
Same as previous key data ? Yes Counter + 1
No
Counter 0 No
Counter > 15 Yes Counter 0
Key OFF Yes Key Depression flag OFF
No
Key Depression flag turned OFF Yes Key Depression flag ON
No
Key Confirmed flag ON
Save current key data
End of interrupt
Figure 3.3.10 Operation flow for control of AD conversion key input
3-87
TX1940 Application Note 3.3.5
3.3.5.1
Control of matrix key input
Overview of matrix key input
* * * *
Key input data is updated every 2 ms. Does not perform simultaneous key depression processing. Does not perform DIP switch read processing. Allows up to 16 keys to be connected. Digit output and key data input The row which is outputting a Low signal to the digit ports (P70, P72, P75 and P76) is selected. The key input ports (P54~P57) change state according to the key status of the selected row. A key input port corresponding to a key which is depressed goes High. Key input ports corresponding to keys which are not depressed go Low.
Note: Ensure that the key input ports are read 10 s or more after the digit output has changed. Avoid reading the key input ports immediately after changing the digit output, since this may not yield the correct value.
DIP data
D3
D2
D1
D0
DIP switch digit (P44)
Data 3
3
7
B
F
Digit 3 (P76)
Data 2
2
6
A
E
Digit 2 (P75)
Data 1
1
5
9
D
Digit 1 (P72)
Data 0
0
4
8
C
Digit 0 (P70) Bit 0 of key input (P54) Bit 1 of key input (P55) Bit 2 of key input (P56) Bit 3 of key input (P57)
Figure 3.3.11 Relationship between digits and input data
3-88
TX1940 Application Note In the sample program the key input ports are read at the beginning of a 2-ms interrupt; on completion of the reading the next digit row to be scanned outputs a Low signal. Processing key input in this way generates a wait time of at least 2 ms from the time at which the digits are changed to the time at which the key input ports are read. The data is always read correctly. Figure 3.3.12 shows the timing chart for reading in data and changing the digits.
Read port
Read port
Read port
Read port
Data input (P54P57)
Data 0
Data 1
Data 2
Data 3
Digit 0 (P70)
Digit 1 (P72)
Digit 2 (P75)
Digit 3 (P76)
2 ms Note: All digit outputs are active-Low.
Figure 3.3.12 Timing chart for reading in data and changing the digits
Two bytes of memory space are allocated for key data. Each bit holds the key state (whether depressed or released). For example, if only key 1 is depressed, the 8th bit is set to 1 and all other bits are 0. When multiple keys are depressed simultaneously, all the corresponding bits are set to 1. Table 3.3.4 shows the data structure of key data.
Table 3.3.4 Data structure of key data
Key Data (16 Bits) Data 3 0 1 2 3 4 Matrix Key Name 5 6 7 8 9 A B C D E F OFF Multiple depressions 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 * 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * Data 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 * 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * Data 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 * 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * Data 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 * 0x0008 0x0080 0x0800 0x8000 0x0004 0x0040 0x0400 0x4000 0x0002 0x0020 0x0200 0x2000 0x0001 0x0010 0x0100 0x1000 0x0000 Other than the above
3-89
TX1940 Application Note
3.3.5.2 Method for controlling matrix key input
Initial settings In the initial setting none of the digit rows is selected.
7654 0001 0001 0000 -11-11-003 2 1 1 0 1 0 1 1 0
P4 P4CR P4FC P7 P7CR P7FC
Set P44 output latch to 1. Set P44 for output. Set P44 for port. Set P70, P72, P75 and P76 output latches to 1. Set P70, P72, P75 and P76 for output. Set P70, P72, P75 and P76 to be ports.
Note: X denotes Don't care; "-" denotes No change.
Matrix key input processing After port input and digit update, chattering-elimination processing is performed using a 2-ms Interval Timer interrupt. The processing for each key is performed in the main routine only after it has been confirmed that chattering elimination has been completed. For details of the 2-ms Interval Timer, please refer to Section 3.3.8. Figure 3.3.13 shows the flow for control of matrix key input.
3-90
TX1940 Application Note
Matrix key confirmation processing
Key Confirmed flag ON Yes Matrix key confirmation processing
No
End
INTTB21 INTCLR 0x21
Clear INTC block interrupt requests.
Read P5 and store as key data
Output next digit on P7
Same as previous key data ? Yes Counter + 1
No
Counter 0 No
Counter > 15 Yes Counter 0
Key OFF Yes Key Depression flag OFF
No
Key Depression flag turned OFF Yes Key Depression flag ON
No
Key Confirmed flag ON
Save current key data
End of interrupt
Figure 3.3.13 Operation flow for control of matrix key input
3-91
TX1940 Application Note 3.3.6
3.3.6.1
Control of 7-segment LED display output
Overview of 7-segment LED display
*
The display data is dynamically displayed on the 7-segment LEDs and updated every 2 ms.
LED Digit 0 (PA0) (Data 0)
(Data 4)
(Data 3)
(Data 2)
(Data 1)
7SEG-LED
Segments (P80-P87)
Digit 1 (PA1) Digit 2 (PA2) Digit 3 (PA3) Digit 4 (PA4)
Figure 3.3.14 Correspondence between digits and segments
*
Figure 3.3.15 shows the timing for the digit and segment outputs.
Data 0 Data 1 Data 2 Data 3 Data 4
Segments (P80P87)
Digit 0 (PA0)
Digit 1 (PA1)
Digit 2 (PA2)
Digit 3 (PA3)
Digit 4 (PA4) 2 ms Note: The segment and digit outputs are all active-Low.
Figure 3.3.15 Timing of display digit update
3-92
TX1940 Application Note * To light any given display segment, output a Low signal on the corresponding ports. The correspondence between display segments and port outputs is shown in Table 3.3.5.
A F G E D 7SEG-LED C Dp Dp G F E D LED C B A B
Table 3.3.5 Correspondence between display segments and port outputs P87(Dp)
0 1 2 3 4 5 6 7 8 9 A B C D E F Blank * * * * * * * * * * * * * * * * 1
P86(G)
1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1
P85(F)
0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1
P84(E)
0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 1
P83(D)
0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 1 1
P82(C)
0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1
P81(B)
0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 1
P80(A)
0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1
Note 1: All segment outputs are active-Low. Note 2: Set port output * to 0 to display Dp and to 1 to turn Dp off.
3-93
TX1940 Application Note
3.3.6.2 Control method for 7-segment LED display
Initial settings
P8 P8CR P8FC PA PACR PAFC 7 1 1 0 6 1 1 0 5 1 1 0 4 1 1 0 1 1 0 3 1 1 0 1 1 0 2 1 1 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 Set P80~P87 output latches to 1. Set P80~P87 for output. Set P80~P87 to be port. Set PA0~PA4 output latches to 1. Set PA0~PA4 for output. Set PA0~PA4 to be port.
Note: X denotes Don't care; "-" denotes No change.
Processing of the display output Create the display data in the main routine and output display data for each digit to the ports within a 2-ms Interval Timer interrupt. For details of the 2-ms interval timer, please refer to Section 3.3.8. The brightness of the 7-segment and indicator LEDs can be adjusted by changing the time at which display data is output to the ports. The display output control flow is shown in Figure 3.3.16.
INTTB21 INTCLR 0x21
Clears INTC block interrupt requests.
Stop digit output for PA
Turns display off.
Output segment to P8
Output digit to PA
Turns display on.
Modify digit counter
End of interrupt
Figure 3.3.16 Display output control flow
3-94
TX1940 Application Note 3.3.7
3.3.7.1
Control of beep tone output
Overview of beep tone output
The beep tone is sounded for 100 ms at a frequency of 1 kHz (with a 50% duty cycle). (1) Using TMRA1, invert the value of the timer flip-flop TA1FF every 0.5 ms and output the inverted value on the Timer Flip-Flop Output pin TA1OUT.
T1 TA01RUN BIT7 2 UpCounter BIT1 BIT0 Comparator Comparator output (coincidence detection) INTTA1 Up-Counter clear TA1FF TA1OUT 0.5 ms @fc = 32 MHz 0 1 2 3 0 1 2 3 0 1 2 3 0
Figure 3.3.17 Square wave output timing chart (with 50% duty cycle)
3-95
TX1940 Application Note (2) Timer Register calculation
Table 3.3.6 Prescaler output clock resolution
@fc = 32 MHz Peripheral Clock Selection Clock Gear Value 00 (fc) Selection of Prescaler Clock 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fc/2) 0 (fgear) 10 (fc/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 11 (fc/8) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 00 (fc) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fc/2) 1 (fc) 10 (fc/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 11 (fc/8) 01 (fperiph/2) 10 (fperiph)
3 3 2 6 4 4 3 3 2
Minimum of Prescaler Output Clock Internal T1 fc/2 (0.25 s) fc/2 (0.125 s) fc/2 (0.5 s) fc/2 (0.25 s) fc/25 (1.0 s) fc/2 (0.5 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (0.25 s) fc/2 (0.125 s) fc/2 (0.25 s)
5 5 4
T4 fc/2 (1.0 s) fc/2 (0.5 s) fc/23 (0.25 s) fc/2 (2.0 s)
6 5 4
T16 fc/2 (4.0 s)
7 6
T256 fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/212 (128 s) fc/211 (64 s) fc/210 (32 s) fc/213 (256 s) fc/212 (128 s) fc/211 (64 s) fc/214 (512 s) fc/213 (256 s) fc/212 (128 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s)
fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7 6
fc/2 (1.0 s) fc/2 (0.5 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 8
fc/2 (4.0 s) fc/2 (2.0 s) fc/29 (16 s) fc/2 (8.0 s)
8 7
fc/2 (1.0 s) fc/2 (8.0 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 4
fc/2 (4.0 s) fc/2 (32 s)
10
fc/29 (16 s) fc/2 (8.0 s)
8 7 6
fc/2 (1.0 s) fc/2 (0.5 s) fc/23 (0.25 s) fc/2 (1.0 s)
5 4
fc/2 (4.0 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (4.0 s)
7 6 5
fc/2 (0.5 s) fc/2 (0.25 s)
3
fc/2 (2.0 s) fc/2 (1.0 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 7
fc/25 (1.0 s) fc/2 (0.5 s)
4
fc/2 (1.0 s)
fc/2 (1.0 s) fc/2 (4.0 s) fc/26 (2.0 s) fc/2 (1.0 s)
5
Note 1: The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Note 2: Do not change the clock gear value while the timer is operating. Note 3: The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) 1000 s / 0.25 s / 2 = 2000 (7D0H) Cannot be set with 8-Bit Timer. For T4 (fc/25) 1000 s / 1 s / 2 = 500 (1F4H) Cannot be set with 8-Bit Timer. For T16 (fc/27) 1000 s / 4.0 s / 2 = 125 (7DH) Set TA1REG to 7DH. For T256 (fc/211) 1000 s / 64 s / 2 = 7.8125 (08H) Set TA1REG to 08H. In this case the period is 1024 s, with a 2.4% margin of error.
3-96
TX1940 Application Note
3.3.7.2 Method for control of beep tone output
Initial settings
P7CR P7FC TA01RUN TA01MOD TA1REG TA1FFCR IMC5L 7 0 0 6 X 0 5 X 0 4 X 0 3 0 1 2 0 1 1 1 0 0 0 0
Set P71 to be TA1OUT output pin. Stop TMRA1 and clear it to 0. Select 8-Bit Timer Mode and set input clock to T16 (4 s @fc = 32 MHz). Set TA1REG to 1000 s / T16 / 2 = 125. Clear TA1FF to 0 and set it to be inverted by a match detection signal from TMRA1. L H Set INTTA1 for rising edge and to level 4.
01111101 XXXX1011 XX- - - - - XX110100
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
Beep tone processing Using an INTTA1 interrupt count the time for which the beep sounds. When 100 ms has elapsed, stop the timer and turn the beep tone off.
Start of beep tone processing
Set beep tone time TA01RUN 0x03 End
Start beep tone.
INTTA1 INTCLR 0x15 Count beep tone time
Clear INTC block interrupt requests.
No
Set time elapsed Yes TA01RUN 0x00 End of interrupt
Stop beep tone.
Figure 3.3.18 Beep tone processing flow
3-97
TX1940 Application Note 3.3.8
3.3.8.1
2-ms Interval Timer
Overview of the 2-ms Interval Timer
* *
Using the 16-Bit Timer (TMRB), generate an interrupt every 2 ms. Set the interval time in the Timer Register TB2RG1 and generate INTTB21. Timer Register calculation The prescaler output resolutions needed for calculation are shown in Table 3.3.7.
Table 3.3.7 Prescaler output clock resolution
@fc = 32 MHz
Peripheral Clock Selection
Clock Gear Value
Selection of Prescaler Clock 00 (fperiph/4)
2
Resolution of Prescaler Output Clock T1 fc/23 (0.25 s) fc/2 (0.125 s) fc/24 (0.5 s) fc/2 (0.25 s)
3
T4 fc/25 (1.0 s) fc/2 (0.5 s)
4
T16 fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/210 (32 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s)
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.25 s)
3
fc/26 (2.0 s) fc/2 (1.0 s)
5 4 7
01 (fc/2) 0 (gear) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5
fc/2 (0.5 s) fc/2 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7 6
fc/24 (0.5 s) fc/2 (2.0 s)
6
11 (fc/8)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5
fc/2 (4.0 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (0.5 s)
4
fc/23 (0.25 s) fc/2 (0.125 s)
2
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/23 (0.25 s)
fc/2 (0.25 s)
3
fc/25 (1.0 s) fc/2 (0.5 s)
4
01 (fc/2) 1 (fc) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.25 s)
3
fc/2 (1.0 s)
5
fc/24 (0.5 s) fc/2 (1.0 s)
5
11 (fc/8)
01 (fperiph/2) 10 (fperiph)

Note 1: Note 2: Note 3:
The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Do not change the clock gear value while the timer is operating. The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) 2000 s / 0.25 s = 8000 (1F40H) Set TB2RG1L to 00H and TB2RG1H to 1FH. For T4 (fc/25) 2000 s / 1.0 s = 2000 (07D0H) Set TB2RG1L to D0H and TB2RG1H to 07H. 3-98
TX1940 Application Note For T16 (fc/2 )
7
2000 s / 4.0 s = 500 (01F4H) Set TB2RG1L to F4H and TB2RG1H to 01H.
3.3.8.2
Method for controlling the 2-ms Interval Timer
Initial settings
TB2RUN TB2FFCR TB2MOD TB2RG1L TB2RG1H IMC8L TB2RUN 765 00X 110 001 111 000 XXXX1 00X 4 X 0 0 1 0 1 X 3 0 0 0 0 0 0 0 2 0 0 1 1 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 0 1 1 1 Stop TMRB2. Disable trigger. Select prescaler output clock as input clock and disable capture function. Set interval time. Set TB2RG1 to 2000 s / T16 = 500. L H Set INTTB21 for rising edge and to level 4. Start TMRB2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
* *
Always set the eight low-order data bits in the Timer Register first, followed by the eight high-order bits. In the sample program chattering-elimination processing for the matrix keys and AD conversion keys and 7-segment LED display output processing is performed using a INTTB21 interrupt.
3-99
TX1940 Application Note 3.3.9
3.3.9.1
Sample programs
Generic flowchart
Main processing Disable interrupts
Initialize
Enable interrupts
No
Address input finished ? Yes Read Mode Control mode ? Write Mode
Processing to read data from E2PROM
Processing to read data from E2PROM
No
Data input finished ? Yes
No
Data input finished ? Yes
Processing to write data to E PROM
2
INTS2 I2C bus processing
INTAD
Process AD key input
End of interrupt
End of interrupt
INTTA1
INTTB21
Processing to count buzzer tones
7-segment LED display processing
End of interrupt
AD key chattering-elimination processing
Matrix key chattering-elimination processing
End of interrupt
Figure 3.3.19 Generic flow
3-100
TX1940 Application Note
3.3.9.2 File configuration
The configuration of files used in the sample programs is listed in Table 3.3.8.
Table 3.3.8 File configuration Filename
eeprom.c func_eeprom.c led.h key.h Stc9i16.asm io1940.c io1940.h Bit32def.h adc.h sio.h
2
Contents
E PROM Mode main section E2PROM Mode functional section 7-segment LED display definitions Key definitions Start-up routine Special function registers Special function register definitions 32-bit macro definitions AD conversion register definitions Serial interface register definitions
Page References
3-103 3-110 3-117 3-118 3-12 3-51 3-28 3-42 3-31 3-46
3.3.9.3
Vector table
The vector table used in the sample programs is shown below. Replace the vector table section in the start-up routine with the vector table given below. Interrupt vector table section
_VecTable: dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintta1 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _minttb21 _Int_dummy ;0 --;1 --;2 --;3 --;4 --;5 --;6 --;7 --;8 --;9 --;10--;11--;12--;13--;14--;15--;16--;17--;18--;19--;20--;21--;22--;23--;24--;25--;26--;27--;28--;29--;30--;31--;32--;33--;34--software set INT[0] INT[1] INT[2] INT[3] INT[4] * * * * INT[5] INT[6] INT[7] INT[8] INT[9] INT[A] * * * * INTTA0 : 8bit Timer 0 INTTA1 : 8bit Timer 1 INTTA2 : 8bit Timer 2 INTTA3 : 8bit Timer 3 * * * * INTTB00 :16bit Timer 0 INTTB01 :16bit Timer 0 INTTB10 :16bit Timer 1 INTTB11 :16bit Timer 1 INTTB20 :16bit Timer 2 INTTB21 :16bit Timer 2 INTTN30 :16bit Timer 3
(TB0RG0) (TB0RG1) (TB1RG0) (TB1RG1) (TB2RG0) (TB2RG1) (TB3RG0)
3-101
TX1940 Application Note
dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mints2 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintad _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;35--;36--;37--;38--;39--;40--;41--;42--;43--;44--;45--;46--;47--;48--;49--;50--;51--;52--;53--;54--;55--;56--;57--;58--;59--;60--;61--;62--;63--INTTB31 :16bit Timer 3 (TB3RG1) * * * * INTTBOF0:16bit Timer 0 (OverFlow) INTTBOF1:16bit Timer 1 (OverFlow) INTTBOF2:16bit Timer 2 (OverFlow) INTTBOF3:16bit Timer 3 (OverFlow) * * * * INTRX0 :Serial receive (Channel 0) INTTX0 :Serial transmit (Channel 0) INTRX1 :Serial receive (Channel 1) INTTX1 :Serial transmit (Channel 1) INTS2 :Serial Channel 2 interrupt * INTRX3 :Serial receive (Channel 3) INTTX3 :Serial transmit (Channel 3) INTRX4 :Serial receive (Channel 4) INTTX4 :Serial transmit (Channel 4) INTRTC :Timer for RTC interrupt INTAD :AD conversion finished INTDMA0:DMA transfer finished (Channel INTDMA1:DMA transfer finished (Channel INTDMA2:DMA transfer finished (Channel INTDMA3:DMA transfer finished (Channel
0) 1) 2) 3)
3-102
TX1940 Application Note
3.3.9.4 Source code
Filename: eeprom.c
/* ************************************************** ** Application Note ** ** ** ** ( EEPROM ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 2000/2/3 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" /* Special function registers */ #include "sio.h" /* Serial communications */ #include "key.h" /* Key definitions */ #include "led.h" /* Display definitions */ #include /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Mode(gmd_eeprom) ---*/ #define cmd_address 0 /* Address input mode */ #define cmd_read_step1 1 /* Read Mode 1 */ #define cmd_write_step1 2 /* Write Mode 1 */ #define cmd_read_step2 3 /* Read Mode 2 */ #define cmd_write_step2 4 /* Write Mode 2 */ #define cmd_write_step3 5 /* Write Mode 3 */ /*--- Key ---*/ #define cadkey_write cadkey_4 /* Write key */ #define cadkey_read cadkey_5 /* Read key */ /*--- I2C ---*/ #define csbi0cr1 0x03 /* Serial Control Register 1 (SCL=60.6kHz) */ #define ceeprom_slave_add 0xa4 /* EEPROM slave address */ #define ci2c_write 0x00 /* Read Bit */ #define ci2c_read 0x01 /* Write Bit */ /*************************************************/ /* extern declaration */ /*************************************************/ extern void padkey_in(void); extern void padkey_chat(void); extern void pmatkey_chat(void); extern void padkey_decode(void); extern void pmatkey_decode(void); extern unsigned char pnumkey_ch(unsigned short); extern void p7seg_disp(void);
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TX1940 Application Note
extern extern extern extern extern extern extern extern extern extern void pbeep_start(unsigned short); void pbeep_timer(void); unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned char char char char short char char char g7seg_data[4]; gled_data; gadkey_code; fadkey_push; gmatkey_code; fmatkey_push; t7seg_ch[]; tled_ch1[];
/*************************************************/ /* RAM */ /*************************************************/ unsigned char gmd_eeprom; /* unsigned char gmd_eeprom_read; /* unsigned char gmd_eeprom_write; /* unsigned char geeprom_add; /* unsigned char geeprom_data; /* /*************************************************/ /* CODE */ /*************************************************/
Mode data */ Read Mode data */ Write Mode data */ EEPROM address */ EEPROM data */
/******************************************************************************/ /* Module name :meeprom_init */ /******************************************************************************/ /* Function :Initialize E2PROM mode */ /* Input :None */ /* Output :SFR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void meeprom_init(void){ /*--- CG settings ---*/ IO_SYSCR1 = 0x10; IO_ADCCLK = 0x01; /*--- I/O port settings ---*/ IO_P0 = 0xff; IO_P0CR = 0xff; IO_P1 IO_P1CR IO_P1FC IO_P2 IO_P2CR IO_P2FC IO_P3 IO_P3CR IO_P3FC IO_P4 IO_P4CR IO_P4FC IO_P7 IO_P7CR IO_P7FC IO_P8 = 0xff; = 0xff; = 0x00; = 0xff; = 0xff; = 0x00; = 0xff; = 0x00; = 0x00; = 0x1f; = 0x10; = 0x00; = 0x65; = 0x67; = 0x02; = 0xff;
/* =0 =1 =0 =00 */ /* =01 */
/* Output High on P00-P07 */ /* Set P00-P07 for output */ /* Output High on P10-P17 */ /* Set P10-P17 for output */ /* Set P10-P17 to be a port */ /* Output High on P20-P27 */ /* Set P20-P27 for output */ /* Set P20-P27 to be a port */ /* Output High on P30-P31 and set P32-P37 for pull-up */ /* Set P30-P31 for output and P32-P37 for input */ /* Set P30-P37 to be a port */ /* Set P40-P43 for pull-up and output High on P44 */ /* Set P40-P43 for input and P44 for output */ /* Set P40-P44 to be a port */ /* Output High on P70,P72,P75,P76 */ /* Set P70,P71,P72,P75,P76 for output and P73,P74,P77 for input */ /* Use P71 to be TA1OUT and set others to be a ports */ /* Output High on P80-P87 */
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TX1940 Application Note
IO_P8CR IO_P8FC IO_P9 IO_P9CR IO_P9FC IO_PA IO_PACR IO_PAFC IO_ODE = 0xff; = 0x00; = 0x3f; = 0xc0; = 0x00; = 0x1f; = 0xdf; = 0xc0; = 0x0c; /* Set P80-P87 for output */ /* Set P80-P87 to be a port */ /* Output Low on P96-P97 */ /* Set P90-P95 for input and P96-P97 for output */ /* Set P90-P97 to be a port */ /* Output High on PA0-PA4 */ /* Set PA5 for input and set others for output */ /* Use PA7 as SCL and PA6 as SDA, and set others to be ports */ /* =11 */
/*--- Timer settings ---*/ IO_TB2RUN = 0x00; IO_TB2FFCR = 0xc3; IO_TB2MOD IO_TB2RG1L IO_TB2RG1H IO_IMC8L = = = = 0x27; 0xf4; 0x01; 0x3330;
/* /* /* /* /* /* /*
=0 =0 =0 =0 */ =0 =0 =0 */ =0 =11 */ =1 =00 =1 =11 */ TB2RG1 = 2000 / 4 */ */ LEVEL3 */
/*--- Buzzer settings ---*/ IO_TA01RUN = 0x00; IO_TA01MOD IO_TA1REG IO_TA1FFCR IO_IMC5L /*--- AD conversion IO_ADMOD0 IO_ADMOD1 IO_IMCEH = = = = 0x08; 0x7d; 0x0b; 0x3430;
/* /* /* /* /* /*
=0 =0 =0 */ =0 =0 */ =00 =00 =10 =00 */ TA1REG = 500 / 4 */ =10 =1 =1 */ LEVEL4 */
settings ---*/ = 0x00; /* =0 =0 =0 =0 */ = 0x82; /* =1 =0 =0 =010 */ = 0x3210; /* LEVEL2 */
/*--- I2C settings ---*/ IO_SBI0BR0 = 0x00; /* =0 */ IO_SBI0BR1 = 0x80; /* =1 */ IO_SBI0CR1 = csbi0cr1 | ACK; /* =1 */ IO_I2C0AR = 0x00; /* =0 */ IO_SBI0CR2 = 0x18; /* =1 =10 */ IO_IMCDL = 0x31; /* LEVEL1 */ /*--- Data initialization ---*/ g7seg_data[0] = c7seg_spc; g7seg_data[1] = c7seg_spc; g7seg_data[2] = c7seg_0; g7seg_data[3] = c7seg_0; gled_data = cled_all_off; /*--- Timer start ---*/ IO_TB2RUN = 0x05; }
/* =0 =0 =1 =1 */
/******************************************************************************/ /* Module name :peeprom_read */ /******************************************************************************/ /* Function :Start reading from EEPROM */ /* Input :SBI0SR */ /* Output :SBI0CR1,SBI0DBR,SBI0CR2,gmd_eeprom_read */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void peeprom_read(void){ while ((IO_SBI0SR & BB) != 0x00); /* Check to see if bus is free */
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TX1940 Application Note
IO_SBI0CR1 = IO_SBI0DBR = IO_SBI0CR2 = gmd_eeprom_read } /******************************************************************************/ /* Module name :peeprom_write */ /******************************************************************************/ /* Function :Start writing to EEPROM */ /* Input :SBI0SR */ /* Output :SBI0CR1,SBI0DBR,SBI0CR2,gmd_eeprom_read */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void peeprom_write(void){ while ((IO_SBI0SR & BB) != 0x00); /* Check whether bus is free */ IO_SBI0CR1 = csbi0cr1 | ACK; /* ACK Set */ IO_SBI0DBR = ceeprom_slave_add | ci2c_write; /* Set slave address */ IO_SBI0CR2 = 0xf8; /* Generate start condition */ gmd_eeprom_write = 1; } /******************************************************************************/ /* Module name :main */ /******************************************************************************/ /* Function :Main processing */ /* Input :fadkey_push,fmatkey_push,gmatkey_code */ /* Output :gmatkey_code,gadkey_code,gmd_eeprom,geeprom_add,g7seg_data */ /* :gadkey_code,gled_data */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void main(void){ __DI(); meeprom_init(); __EI(); /****************************************/ /* */ /* Main loop */ /* */ /****************************************/ for(;;){ padkey_decode(); pmatkey_decode(); /*--- Disabling simultaneous key depressions ---*/ if (fadkey_push == 1 && fmatkey_push == 1) { gmatkey_code = cmatkey_no; gadkey_code = cadkey_no; } switch (gmd_eeprom) { /*--- Address input ---*/ case cmd_address: switch (gmatkey_code) { case cmatkey_0: case cmatkey_1: case cmatkey_2: case cmatkey_3: /* Initialize */ csbi0cr1 | ACK; /* Set ACK */ ceeprom_slave_add | ci2c_write; /* Set slave address */ 0xf8; /* Generate start condition */ = 1;
/* Numeric key processing */
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TX1940 Application Note
case case case case case case case case case case case case cmatkey_4: cmatkey_5: cmatkey_6: cmatkey_7: cmatkey_8: cmatkey_9: cmatkey_a: cmatkey_b: cmatkey_c: cmatkey_d: cmatkey_e: cmatkey_f: pbeep_start(100); geeprom_add = (geeprom_add<<4) + pnumkey_ch(gmatkey_code); g7seg_data[2] = t7seg_ch[geeprom_add & 0x0f]; g7seg_data[3] = t7seg_ch[geeprom_add >> 4]; break;
} switch (gadkey_code) { case cadkey_read: /* Read key processing */ pbeep_start(100); peeprom_read(); gmd_eeprom = cmd_read_step1; break; case cadkey_write: /* Write key processing */ pbeep_start(100); gled_data = cled_all_on; peeprom_read(); gmd_eeprom = cmd_write_step1; break; } break; /*--- Reading data from EEPROM ---*/ case cmd_read_step1: case cmd_write_step1: if (gmd_eeprom_read == 6) { gmd_eeprom_read = 0; g7seg_data[0] = t7seg_ch[geeprom_data & 0x0f]; g7seg_data[1] = t7seg_ch[geeprom_data >> 4]; if (gmd_eeprom == cmd_read_step1) gmd_eeprom = cmd_read_step2; else gmd_eeprom = cmd_write_step2; } break; /*--- Check for end during Read Mode ---*/ case cmd_read_step2: switch (gmatkey_code) { /* Numeric key processing */ case cmatkey_0: case cmatkey_1: case cmatkey_2: case cmatkey_3: case cmatkey_4: case cmatkey_5: case cmatkey_6: case cmatkey_7: case cmatkey_8: case cmatkey_9: case cmatkey_a: case cmatkey_b: case cmatkey_c: case cmatkey_d: case cmatkey_e: case cmatkey_f: pbeep_start(100); geeprom_add = (geeprom_add<<4) + pnumkey_ch(gmatkey_code); g7seg_data[0] = c7seg_spc;
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TX1940 Application Note
g7seg_data[1] = c7seg_spc; g7seg_data[2] = t7seg_ch[geeprom_add & 0x0f]; g7seg_data[3] = t7seg_ch[geeprom_add >> 4]; gmd_eeprom = cmd_address; break; } if(gadkey_code == cadkey_read) { /* Read key processing */ pbeep_start(100); g7seg_data[0] = c7seg_spc; g7seg_data[1] = c7seg_spc; gmd_eeprom = cmd_address; } break; /*--- Data input during Write Mode ---*/ case cmd_write_step2: switch (gmatkey_code) { /* Numeric key processing */ case cmatkey_0: case cmatkey_1: case cmatkey_2: case cmatkey_3: case cmatkey_4: case cmatkey_5: case cmatkey_6: case cmatkey_7: case cmatkey_8: case cmatkey_9: case cmatkey_a: case cmatkey_b: case cmatkey_c: case cmatkey_d: case cmatkey_e: case cmatkey_f: pbeep_start(100); geeprom_data = (geeprom_data<<4) + pnumkey_ch(gmatkey_code); g7seg_data[0] = t7seg_ch[geeprom_data & 0x0f]; g7seg_data[1] = t7seg_ch[geeprom_data >> 4]; break; } if(gadkey_code == cadkey_write) { /* Write key processing */ pbeep_start(100); peeprom_write(); gmd_eeprom = cmd_write_step3; } break; /*--- Writing data to EEPROM ---*/ case cmd_write_step3: if (gmd_eeprom_write == 4) { gmd_eeprom_write = 0; g7seg_data[0] = c7seg_spc; g7seg_data[1] = c7seg_spc; gled_data = cled_all_off; gmd_eeprom = cmd_address; } break; } } } /******************************************************************************/ /* Module name :mints2 */ /******************************************************************************/ /* Function :I2C interrupt */ /* Input :gmd_eeprom_read,SBI0SR,SBI0DBR */ /* Output :gmd_eeprom_read,SBI0CR1,SBI0DBR,SBI0CR2 */ /* Parameters :None */ /* Return value :None */
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/******************************************************************************/ void __interrupt mints2(void){ volatile unsigned int i; IO_INTCLR = 0x34; /* Clear interrupt latch */ /*--- Reading ---*/ switch (gmd_eeprom_read) { /*--- Address output ---*/ case 1: IO_SBI0DBR = geeprom_add; gmd_eeprom_read = 2; break; /*--- Restarting ---*/ case 2: IO_SBI0CR2 = 0x18; /* Release bus */ while ((IO_SBI0SR & BB) != 0x00); /* Check whether bus is free */ while ((IO_SBI0SR & LRB) != 0x01); /* Check LRB */ for (i=0 ;i<80 ;i++); /* Wait for 4.7 us */ IO_SBI0CR1 = csbi0cr1 | ACK; /* Restart */ IO_SBI0DBR = ceeprom_slave_add | ci2c_read; IO_SBI0CR2 = 0xf8; gmd_eeprom_read = 3; break; /*-- Dummy read ---*/ case 3: IO_SBI0CR1 = csbi0cr1; geeprom_data = IO_SBI0DBR; gmd_eeprom_read = 4; break; /*--- Reading data ---*/ case 4: IO_SBI0CR1 = csbi0cr1 | 0x20; geeprom_data = IO_SBI0DBR; gmd_eeprom_read = 5; break; /*--- Stop ---*/ case 5: IO_SBI0CR2 = 0xd8; gmd_eeprom_read = 6; break; } /*--- Writing ---*/ switch (gmd_eeprom_write) { /*--- Address output ---*/ case 1: IO_SBI0DBR = geeprom_add; gmd_eeprom_write = 2; break; /*--- Writing data ---*/ case 2: IO_SBI0DBR = geeprom_data; gmd_eeprom_write = 3; break; /*--- Stop ---*/ case 3: IO_SBI0CR2 = 0xd8; gmd_eeprom_write = 4; break; } } /******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/
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TX1940 Application Note
/* Function :2-ms Interval Timer interrupt */ /* Input :None */ /* Output :None */ /******************************************************************************/ void __interrupt minttb21(void){ IO_INTCLR = 0x21; p7seg_disp(); padkey_chat(); pmatkey_chat(); } /******************************************************************************/ /* Module name :mintta1 */ /******************************************************************************/ /* Function :Beep tone timer interrupt */ /* Input :None */ /* Output :None */ /******************************************************************************/ void __interrupt mintta1(void){ IO_INTCLR = 0x15; pbeep_timer(); } /******************************************************************************/ /* Module name :mintad */ /******************************************************************************/ /* Function :AD Conversion Finished interrupt */ /* Input :None */ /* Output :None */ /******************************************************************************/ void __interrupt mintad(void){ IO_INTCLR = 0x3b; padkey_in(); } /* Clear interrupt latch */ /* Clear interrupt latch */ /* Clear interrupt latch */
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TX1940 Application Note Filename: func_eeprom.c
/* ************************************************** ** Application Note ** ** ** ** (EEPROM FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" #include "adc.h" #include "key.h" /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Port output definitions (key digits) ---*/ #define ckey_digit_out0 0x64 /* P7 (01100100) #define ckey_digit_out1 0x61 /* P7 (01100001) #define ckey_digit_out2 0x45 /* P7 (01000101) #define ckey_digit_out3 0x25 /* P7 (00100101) /*--- Port output definitions (7-segment LED digits) ---*/ #define c7seg_digit_out0 0x1e /* PA (00011110) #define c7seg_digit_out1 0x1d /* PA (00011101) #define c7seg_digit_out2 0x1b /* PA (00011011) #define c7seg_digit_out3 0x17 /* PA (00010111) #define c7seg_digit_out4 0x0f /* PA (00001111) /*************************************************/ /* RAM */ /*************************************************/ unsigned char g7seg_data[4]; /* unsigned char gled_data; /* unsigned char gadkey_data; /* unsigned char gadkey_code; /* unsigned char fadkey_push; /* unsigned char fadkey_ok; /* unsigned short gmatkey_data; /* unsigned short gmatkey_code; /* unsigned char fmatkey_push; /* unsigned char fmatkey_ok; /* unsigned short gbeep_cnt; /* /*************************************************/ /* CODE */ /*************************************************/
*/ */ */ */ */ */ */ */ */
7-segment LED display data */ LED display data */ AD key data */ AD key confirmed data */ AD Key Depression Status flag */ AD Key Confirmed flag */ Matrix key data */ Matrix key confirmed data */ Matrix Key Depression Status flag */ Matrix Key Confirmed flag */ Beep tone count */
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/******************************************************************************/ /* Module name :padkey_in */ /******************************************************************************/ /* Function :Entry of AD key data (using AD finished interrupt) */ /* Input :ADREG26H */ /* Output :gadkey_data */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void padkey_in(void) { unsigned char lad_data; /*--- Entering AD-converted data ---*/ lad_data = IO_ADREG26H; /*--- Converting AD data into key data ---*/ if (lad_data > 225) gadkey_data = 0; else if (lad_data > 175) gadkey_data = else if (lad_data > 125) gadkey_data = else if (lad_data > 75) gadkey_data = else if (lad_data > 25) gadkey_data = else gadkey_data = 5; }
1; 2; 3; 4;
/******************************************************************************/ /* Module name :padkey_chat */ /******************************************************************************/ /* Function :Eliminates AD key chattering (using 2-ms interrupt) */ /* Input :gadkey_data */ /* Output :ADMOD0 ,fadkey_ok ,fadkey_push */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void padkey_chat(void) { static unsigned char ladkey_chat = 0 ,ladkey_buff = 0x00; /*--- Eliminating chattering ---*/ if (gadkey_data == ladkey_buff) { ladkey_chat++; if (ladkey_chat > 15) { ladkey_chat = 0; if (gadkey_data == 0x00) fadkey_push = 0; else { if (fadkey_push == 0) { fadkey_ok = 1; fadkey_push = 1; } } } } else ladkey_chat = 0; /*--- Holding key data ---*/ ladkey_buff = gadkey_data; /*--- Starting AD conversion ---*/ IO_ADMOD0 |= ADS; } /******************************************************************************/ /* Module name :pmatkey_chat */ /******************************************************************************/ /* Function :Eliminates matrix key chattering (using 2-ms interrupt) */ /* Input :P5 */ /* Output :P7 ,gmatkey_data ,fmatkey_ok ,fmatkey_push */ /* Parameters :None */
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/* Return value :None */ /******************************************************************************/ void pmatkey_chat(void) { static unsigned char lmatkey_chat = 0 ,lmatkey_digit = 0; static unsigned short lmatkey_buff = 0x0000; unsigned short lmat_data; /*--- Reading data ---*/ lmat_data = IO_P5 & 0xf0; /*--- Storing key data ---*/ switch (lmatkey_digit) { case 0: gmatkey_data = (gmatkey_data & 0xfff0) /* Storing data */ lmatkey_digit = 1; IO_P7 = ckey_digit_out1;/* Output next break; case 1: gmatkey_data = (gmatkey_data & 0xff0f) /* Storing data */ lmatkey_digit = 2; IO_P7 = ckey_digit_out2;/* Output next break; case 2: gmatkey_data = (gmatkey_data & 0xf0ff) /* Storing data */ lmatkey_digit = 3; IO_P7 = ckey_digit_out3;/* Output next break; case 3: gmatkey_data = (gmatkey_data & 0x0fff) /* Storing data */ lmatkey_digit = 0; IO_P7 = ckey_digit_out0;/* Output next break; }
+ (lmat_data >>4); /* Change digit count */ key digit */
+ lmat_data; /* Change digit count */ key digit */
+ (lmat_data <<4); /* Change digit count */ key digit */
+ (lmat_data <<8); /* Change digit count */ key digit */
/*--- Eliminating chattering ---*/ if (gmatkey_data == lmatkey_buff) { lmatkey_chat++; if (lmatkey_chat > 15) { lmatkey_chat = 0; if (gmatkey_data == 0x0000) fmatkey_push = 0; else { if (fmatkey_push == 0) { fmatkey_ok = 1; fmatkey_push = 1; } } } } else lmatkey_chat = 0; /*--- Holding key data ---*/ lmatkey_buff = gmatkey_data; } /******************************************************************************/ /* Module name :padkey_decode */ /******************************************************************************/ /* Function :Decodes AD key */ /* Input :gadkey_data ,fadkey_ok */ /* Output :gadkey_code ,fadkey_ok */ /* Parameters :None */
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TX1940 Application Note
/* Return value :None */ /******************************************************************************/ void padkey_decode(void) { gadkey_code = cadkey_no; if (fadkey_ok == 1) { fadkey_ok = 0; gadkey_code = gadkey_data; } } /******************************************************************************/ /* Module name :pmatkey_decode */ /******************************************************************************/ /* Function :Decodes matrix key */ /* Input :gmatkey_data ,fmatkey_ok */ /* Output :gmatkey_code ,fmatkey_ok */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void pmatkey_decode(void) { gmatkey_code = cmatkey_no; if (fmatkey_ok == 1) { fmatkey_ok = 0; gmatkey_code = gmatkey_data; } } /******************************************************************************/ /* Module name :pnumkey_ch */ /******************************************************************************/ /* Function :Converts numeric key into numeric data */ /* Input :None */ /* Output :None */ /* Parameters :Key code */ /* Return value :Key number */ /******************************************************************************/ unsigned char pnumkey_ch(unsigned short lkey_code) { switch (lkey_code) { case cmatkey_0: return 0x00; case cmatkey_1: return 0x01; case cmatkey_2: return 0x02; case cmatkey_3: return 0x03; case cmatkey_4: return 0x04; case cmatkey_5: return 0x05; case cmatkey_6: return 0x06; case cmatkey_7: return 0x07; case cmatkey_8: return 0x08; case cmatkey_9: return 0x09; case cmatkey_a: return 0x0a; case cmatkey_b: return 0x0b; case cmatkey_c: return 0x0c; case cmatkey_d: return 0x0d; case cmatkey_e: return 0x0e; case cmatkey_f: return 0x0f; default: return 0xff; } } /******************************************************************************/ /* Module name :p7seg_disp */ /******************************************************************************/ /* Function :Output for 7-segment LED display (using 2-ms interrupt) */ /* Input :gled_data,g7seg_data */ /* Output :P8,PA */
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/* Parameters :None */ /* Return value :None */ /******************************************************************************/ void p7seg_disp(void){ static unsigned char ldisp_digit = 0; /*--- Turning display off ---*/ IO_P8 = 0xff; /*--- Output for display ---*/ switch (ldisp_digit) { case 0: IO_PA = c7seg_digit_out0; IO_P8 = gled_data; break; case 1: IO_PA = c7seg_digit_out1; IO_P8 = g7seg_data[0]; break; case 2: IO_PA = c7seg_digit_out2; IO_P8 = g7seg_data[1]; break; case 3: IO_PA = c7seg_digit_out3; IO_P8 = g7seg_data[2]; break; case 4: IO_PA = c7seg_digit_out4; IO_P8 = g7seg_data[3]; break; }
/* Output digits */ /* Output for LED */
/* Output digits */ /* Output for 7-segment LED */
/* Output digits */ /* Output for 7-segment LED */
/* Output digits */ /* Output for 7-segment LED */
/* Output digits */ /* Output for 7-segment LED */
/*--- Digit count ---*/ ldisp_digit++; if (ldisp_digit > 4) ldisp_digit = 0; } /*************************************************/ /* Display data table */ /*************************************************/ /*--- 7SEG-LED ---*/ const unsigned char t7seg_ch[] = { 0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xd8, 0x80,0x98,0x88,0x83,0xc6,0xa1,0x86,0x8e, }; /*--- LED ---*/ const unsigned char tled_ch1[] = { 0xfe,0xfd,0xfb,0xf7,0xef,0xdf,0xbf,0x7f }; /****************************************************************************/ /* Module name :pbeep_start */ /****************************************************************************/ /* Function :Starts beep tone */ /* Input :None */ /* Output :gbeep_cnt,TA01RUN */ /* Parameters :Beep tone time */ /* Return value :None */ /****************************************************************************/ void pbeep_start(unsigned short lbeep_on_time){ gbeep_cnt = lbeep_on_time * 2; IO_TA01RUN = 0x06; }
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TX1940 Application Note
/****************************************************************************/ /* Module name :pbeep_timer */ /****************************************************************************/ /* Function :Beep tone */ /* Input :gbeep_cnt */ /* Output :gbeep_cnt */ /* Parameters :None */ /* Return value :None */ /****************************************************************************/ void pbeep_timer(void){ gbeep_cnt--; if(gbeep_cnt == 0) IO_TA01RUN = 0x00; }
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TX1940 Application Note Filename: led.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( LED HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*** Definition of 7-segment LEDs ***/ #define c7seg_0 #define c7seg_1 #define c7seg_2 #define c7seg_3 #define c7seg_4 #define c7seg_5 #define c7seg_6 #define c7seg_7 #define c7seg_8 #define c7seg_9 #define c7seg_a #define c7seg_b #define c7seg_c #define c7seg_d #define c7seg_e #define c7seg_f #define c7seg_p #define c7seg_spc /*** Definition of LEDs ***/ #define cled_all_on #define cled_all_off
0xc0 0xf9 0xa4 0xb0 0x99 0x92 0x82 0xd8 0x80 0x98 0x88 0x83 0xc6 0xa1 0x86 0x8e 0x8c 0xff
/* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /*
0 */ 1 */ 2 */ 3 */ 4 */ 5 */ 6 */ 7 */ 8 */ 9 */ A */ B */ C */ D */ E */ F */ P */ Blank */
0x00 0xff
/* Turn all LEDs on */ /* Turn all LEDs off */
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TX1940 Application Note Filename: key.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( KEY HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*--- Definition of matrix keys ---*/ #define cmatkey_no 0x0000 #define cmatkey_0 0x0008 #define cmatkey_1 0x0080 #define cmatkey_2 0x0800 #define cmatkey_3 0x8000 #define cmatkey_4 0x0004 #define cmatkey_5 0x0040 #define cmatkey_6 0x0400 #define cmatkey_7 0x4000 #define cmatkey_8 0x0002 #define cmatkey_9 0x0020 #define cmatkey_a 0x0200 #define cmatkey_b 0x2000 #define cmatkey_c 0x0001 #define cmatkey_d 0x0010 #define cmatkey_e 0x0100 #define cmatkey_f 0x1000 /*--- Definition of AD keys ---*/ #define cadkey_no 0x00 #define cadkey_1 0x01 #define cadkey_2 0x02 #define cadkey_3 0x03 #define cadkey_4 0x04 #define cadkey_5 0x05
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TX1940 Application Note
3
3.4
Stopwatch
This is a minute/seconds stopwatch with a split time facility. It also incorporates a feature for reducing the stopwatch's current consumption in Standby Mode.
3.4.1
3.4.1.1
Specifications
Basic specifications
* * *
Allows key input using the INT0 key (START/STOP), AD conversion keys (SPLIT/CLEAR, STOP, IDLE and SLEEP) and the NMI key. Sounds a buzzer each time a key is pressed (except for the NMI, STOP, IDLE and SLEEP keys). Displays the time on the 7-segment LEDs.
Table 3.4.1 Key list Key Name
START/STOP STOP IDLE SLEEP SPLIT/CLEAR
Type of Key
INT0 AD conversion AD conversion AD conversion AD conversion Starts or stops count
Key Function
Puts device into STOP Mode Puts device into IDLE Mode Puts device into SLEEP Mode Displays split time or clears count
3.4.1.2
How to use the stopwatch
Figure 3.4.1 below shows how to use the stopwatch on the TB1940 board.
[CLEAR]
Stop timekeeping count
[SPLIT]
Display split, stopping timekeeping count
[STOP]
[START]
[START]
[STOP]
Timekeeping count 0
[START]
Timekeeping count in progress
[SPLIT] [SPLIT]
Display split while continuing timekeeping count
[STOP] [IDLE] [NMI] [NMI] [SLEEP]
[NMI]
NORMAL Mode Standby modes
STOP Mode
IDLE Mode
SLEEP Mode
Note: [
] denotes a key.
Figure 3.4.1 How to use the stopwatch
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TX1940 Application Note In NORMAL Mode Press [START] and the stopwatch starts counting; press [STOP] and the stopwatch stops counting. Pressing [SPLIT] while the stopwatch is counting displays the split time. Pressing [CLEAR] while the stopwatch is idle clears the count. Pressing [STOP], [IDLE] or [SLEEP] while the stopwatch is counting puts the board into the corresponding standby mode.
7SEG-LED
000
[START]
[SPLIT]
001
[SPLIT] [STOP]
001
1531
[CLEAR]
Figure 3.4.2 Typical stopwatch display in NORMAL Mode
In SLEEP Mode The stopwatch display is cleared. The Timer for RTC continues to count. Count can be continued for up to two minutes (approximately). Pressing [NMI] returns the board from SLEEP Mode to NORMAL Mode, causing the count to continue. In IDLE Mode The stopwatch display is cleared. The count stops and the value reached in the previous mode retained. Pressing [NMI] returns the board from IDLE Mode to NORMAL Mode, causing the count to resume. In STOP Mode The stopwatch display is cleared. The count stops and the value reached in the previous mode retained. Pressing [NMI] returns the board from STOP Mode to NORMAL Mode, causing the count to resume.
[SPRIT] or [IDLE] or [STOP]
301
[NMI] 7SEG-LED
Figure 3.4.3 Typical stopwatch display during SLEEP, IDLE or STOP Mode
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TX1940 Application Note 3.4.2 Functional block diagram
TX1940FDBF
INT0
INT0 Input
3.4.3 Controlling the external interrupt switch
NMI
NMI Input
AN2
Switch
3.4.4 Controlling AD conversion key input
P87-80 7SEG-LED
3.4.5 Controlling 7-segment LED display output LED PA4-PA0
TA1OUT Piezo-electric buzzer
3.4.6 Controlling beep tone output
Timer for RTC
3.4.7 Controlling the time counter RTC
16-Bit Timer TMRB2
3.4.8 2-ms Interval Timer
Standby Control
3.4.9 Controlling standby
Figure 3.4.4 Functional block diagram
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TX1940 Application Note 3.4.3
3.4.3.1
Controlling the external interrupt switch
Overview of the external interrupt switch
If the key connected to the P77 (INT0) pin is pressed, an INT0 interrupt will be generated on the next falling edge of the signal on this pin.
H P77 L INT0 interrupt generated INT0 interrupt generated
Figure 3.4.5 INT0 interrupt generation timing 3.4.3.2 Controlling the external interrupt switch
Initial settings
P7CR P7FC IMCGA0 EICRCG=0x00 IMC0L 765 0-0-XX1 4 0 3 X 2 X 1 X 0 1
Set P77 to be INT0 input pin. Set the interrupt's active state to falling edge using the CG block.
INTCLR=0x01
X X 0 1 0 1 1 0 High- Make sure interrupt sources are recognized as active when High. order X X X X X X X X Low- Set the interrupt level to 6. order Any desired value can be set in the Interrupt Register. Clear the interrupt request during initialization.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
The sample program starts or stops the time count using an INT0 interrupt.
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TX1940 Application Note 3.4.4
3.4.4.1
Control of AD conversion key input
Overview of AD conversion keys
* * * *
Determine whether the AD conversion keys are on or off by reading the voltage from each key. Eliminate ON-chattering for a 30-ms period and eliminate OFF-chattering for a 30-ms period. Set the resistance value for each resistor so that the voltages across each resistor are the same. If two or more keys are pressed simultaneously, the voltage of the key which is located closer to Vdd is read. (In the sample program, key number 5 is read.)
[Unused] 5 [STOP] 4 [IDLE] 3 [SLEEP] 2 [SPLIT/CLEAR] 1
Vcc
R0
1 4 R0
5 12 R0
5 6 R0
5 2 R0
AN2
Figure 3.4.6 Key numbers Table 3.4.2 Correspondence between AD-converted values and voltages Key Number
OFF 1 2 3 4 5
Voltage when Key ON (logical value)
3.30 V 2.65 V 1.99 V 1.34 V 0.67 V 0.00 V
AD-Converted Value when Key ON (logical value)
1023 821 616 415 207 0
AD-Converted Value of 8 High-Order Bits (logical value)
255 205 154 103 51 0
Note 1: This applies when Vcc = 3.3 V. Note 2: In the sample program only the eight high-order bits of the AD-converted value are used (the two low-order bits are discarded).
3.4.4.2
Method for controlling AD conversion key input
Initial settings
7 X 0 1 X X 6 X 0 0 X X 5 X 0 X 1 4 X 0 X 1 3 X 0 0 0 2 X 0 0 0 1 0 0 1 1 0 1 0 0 0
ADCCLK ADMOD0 ADMOD1 IMCEH

Set AD conversion time to 10.75 s (when fsys = 32 MHz). Select Fixed-Channel Single Conversion Mode. Select Channel 2 and VREF as the voltage to apply. L H Set INTAD for rising edge and to level 2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
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TX1940 Application Note AD conversion key input processing When an interrupt is generated on completion of AD conversion, the AD Conversion Result Register is read and the contents is converted into key data. Based on this converted key data, chattering-elimination processing is performed using a 2-ms Interval Timer interrupt. The processing for each key is performed in the main routine only after it has been confirmed that chattering elimination has been completed. For details of the 2-ms Interval Timer, please refer to Section 3.4.8.
AD conversion key input processing
INTAD INTCLR 0x3b Read ADREG26H Clear INTC block interrupt requests.
Key Confirmed flag ON Yes AD key confirmation processing
No
Convert to key data End End of interrupt INTTB21 INTCLR 0x21
Clear INTC block interrupt requests.
Same as previous key data ? Yes Counter + 1
No
Counter 0 No
Counter > 15 Yes Counter 0
Key OFF Yes Key Depression flag OFF
No
Key Depression flag turned OFF Yes Key Depression flag ON
No
Key Confirmed flag ON
Save current key data
End of interrupt
Figure 3.4.7 Operation flow for control of AD conversion key input
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TX1940 Application Note 3.4.5
3.4.5.1
Control of 7-segment LED display output
Overview of 7-segment LED display
*
The display data is dynamically displayed on the 7-segment LEDs and updated every 2 ms.
LED Digit 0 (PA0) (Data 0)
(Data 4)
(Data 3)
(Data 2)
(Data 1)
7SEG-LED
Segments (P80~P87)
Digit 1 (PA1) Digit 2 (PA2) Digit 3 (PA3) Digit 4 (PA4)
Figure 3.4.8 Correspondence between digits and segments
*
Segments (P80~P87)
Figure 3.4.9 shows the timing for the digit and segment outputs.
Data 0
Data 1
Data 2
Data 3
Data 4
Digit 0 (PA0)
Digit 1 (PA1)
Digit 2 (PA2)
Digit 3 (PA3)
Digit 4 (PA4) 2 ms Note: The segment and digit outputs are all active-Low.
Figure 3.4.9 Timing of display digit update
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TX1940 Application Note * To light any given display segment, output a Low signal on the corresponding ports. The correspondence between display segments and port outputs is shown in Table 3.4.3.
A F G E D 7SEG-LED C Dp Dp G F E D LED C B A B
Table 3.4.3 Correspondence between display segments and port outputs
P87(Dp) 0 1 2 3 4 5 6 7 8 9 A B C D E F Blank * * * * * * * * * * * * * * * * 1 P86(G) 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 P85(F) 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 P84(E) 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 1 P83(D) 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 1 1 P82(C) 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1 P81(B) 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 1 P80(A) 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1
Note 1: All segment outputs are active-Low. Note 2: Set port output * to 0 to display Dp and to 1 to turn Dp off.
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TX1940 Application Note
3.4.5.2 Control method for 7-segment LED display
Initial settings
P8 P8CR P8FC PA PACR PAFC 7 1 1 0 6 1 1 0 5 1 1 0 4 1 1 0 1 1 0 3 1 1 0 1 1 0 2 1 1 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 Set P80~P87 output latches to 1. Set P80~P87 for output. Set P80~P87 to be port. Set PA0~PA4 output latches to 1. Set PA0~PA4 for output. Set PA0~PA4 to be port.
Note: X denotes Don't care; "-" denotes No change.
Processing of the display output Create the display data in the main routine and output display data for each digit to the ports within a 2-ms Interval Timer interrupt. For details of the 2-ms interval timer, please refer to Section 3.3.8. The brightness of the 7-segment and indicator LEDs can be adjusted by changing the time at which display data is output to the ports. The display output control flow is shown in Figure 3.4.10.
INTTB21 INTCLR 0x21
Clears INTC block interrupt requests.
Stop digit output for PA
Turns display off.
Output segment to P8
Output digit to PA
Turns display on.
Modify digit counter
End of interrupt
Figure 3.4.10 Display output control flow
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TX1940 Application Note 3.4.6
3.4.6.1
Control of beep tone output
Overview of beep tone output
The beep tone is sounded for 100 ms at a frequency of 1 kHz (with a 50% duty cycle). (1) Using TMRA1, invert the value of the timer flip-flop TA1FF every 0.5 ms and output the inverted value on the Timer Flip-Flop Output pin TA1OUT.
T1 TA01RUN BIT7 2 UpCounter BIT1 BIT0 Comparator Comparator output (coincidence detection) INTTA1 Up-Counter clear TA1FF TA1OUT 0.5 ms @fc = 32 MHz 0 1 2 3 0 1 2 3 0 1 2 3 0
Figure 3.4.11 Square wave output timing chart (with 50% duty cycle)
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TX1940 Application Note (2) Timer Register calculation
Table 3.4.4 Prescaler output clock resolution
@fc = 32 MHz Peripheral Clock Selection Clock Gear Value 00 (fc) Selection of Prescaler Clock 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fc/2) 0 (fgear) 10 (fc/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 11 (fc/8) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 00 (fc) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fc/2) 1 (fc) 10 (fc/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 11 (fc/8) 01 (fperiph/2) 10 (fperiph)
3 3 2 6 4 4 3 3 2
Minimum of Prescaler Output Clock Internal T1 fc/2 (0.25 s) fc/2 (0.125 s) fc/2 (0.5 s) fc/2 (0.25 s) fc/25 (1.0 s) fc/2 (0.5 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (0.25 s) fc/2 (0.125 s) fc/2 (0.25 s)
5 5 4
T4 fc/2 (1.0 s) fc/2 (0.5 s) fc/23 (0.25 s) fc/2 (2.0 s)
6 5 4
T16 fc/2 (4.0 s)
7 6
T256 fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/212 (128 s) fc/211 (64 s) fc/210 (32 s) fc/213 (256 s) fc/212 (128 s) fc/211 (64 s) fc/214 (512 s) fc/213 (256 s) fc/212 (128 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s) fc/211 (64 s) fc/210 (32 s) fc/29 (16 s)
fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7 6
fc/2 (1.0 s) fc/2 (0.5 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 8
fc/2 (4.0 s) fc/2 (2.0 s) fc/29 (16 s) fc/2 (8.0 s)
8 7
fc/2 (1.0 s) fc/2 (8.0 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 4
fc/2 (4.0 s) fc/2 (32 s)
10
fc/29 (16 s) fc/2 (8.0 s)
8 7 6
fc/2 (1.0 s) fc/2 (0.5 s) fc/23 (0.25 s) fc/2 (1.0 s)
5 4
fc/2 (4.0 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (4.0 s)
7 6 5
fc/2 (0.5 s) fc/2 (0.25 s)
3
fc/2 (2.0 s) fc/2 (1.0 s) fc/27 (4.0 s) fc/2 (2.0 s)
6 5 7
fc/25 (1.0 s) fc/2 (0.5 s)
4
fc/2 (1.0 s)
fc/2 (1.0 s) fc/2 (4.0 s) fc/26 (2.0 s) fc/2 (1.0 s)
5
Note 1: The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Note 2: Do not change the clock gear value while the timer is operating. Note 3: The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) / 1000 s / 0.25 s / 2 = 2000 (7D0H) Cannot be set with 8-Bit Timer. For T4 (fc/25) 1000 s / 1 s / 2 = 500 (1F4H) Cannot be set with 8-Bit Timer. For T16 (fc/27) 1000 s / 4.0 s / 2 = 125 (7DH) Set TA1REG to 7DH. For T256 (fc/211) 1000 s / 64 s / 2 = 7.8125 (08H) Set TA1REG to 08H. In this case the period is 1024 s, with a 2.4% margin of error.
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TX1940 Application Note
3.4.6.2 Method for control of beep tone output
Initial settings
P7CR P7FC TA01RUN TA01MOD TA1REG TA1FFCR IMC5L 7 0 0 6 X 0 5 X 0 4 X 0 3 0 1 2 0 1 1 1 0 0 0 0
Set P71 to be TA1OUT output pin. Stop TMRA1 and clear it to 0. Select 8-Bit Timer Mode and set input clock to T16 (4 s @fc = 32 MHz). Set TA1REG to 1000 s / T16 / 2 = 125. Clear TA1FF to 0 and set it to be inverted by the coincidence detection signal from TMRA1. L H Set INTTA1 for rising edge and to level 4.
01111101 XXXX1011 XX- - - - - XX110100
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
Beep tone processing Using an INTTA1 interrupt count the time for which the beep sounds. When 100 ms has elapsed, stop the timer and turn the beep tone off.
Start of beep tone processing
Set beep tone time TA01RUN 0x03 End
Start beep tone.
INTTA1 INTCLR 0x15 Count beep tone time
Clear INTC block interrupt requests.
No
Set time elapsed Yes TA01RUN 0x00 End of interrupt
Stop beep tone.
Figure 3.4.12 Beep tone processing flow
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TX1940 Application Note 3.4.7
3.4.7.1
Controlling the time counter
Overview of the time counter
* *
3.4.7.2
An interrupt for counting the time is generated every 0.5 seconds. The count can go up to 59 minutes 59 seconds before wrapping around to 0 minutes 0 seconds.
Controlling the time counter
Initial settings
RTCCR IMCGB3 IMCEH EICRCG INTCLR 765 0XX XX1 XX0 XXXXX XX1 4 X 1 1 X 1 3 0 X 0 X 1 2 0 X 1 1 0 1 0 X 0 1 1 0 0 1 1 1 0 Stops and clears the Timer for RTC. L H Sets INTRTC for rising edge and to level 5.
Clears the INTRTC interrupt latch.
Note 1: The interrupt level can be set to any desired value. Note 2: X denotes Don't care; "-" denotes No change. Note 3: When setting the Timer for RTC interrupt, be sure to set the active state to rising edge.
To use the INTRTC, the CG block must also be set up. Time counter
INT0 EICRCG 0x00 INTCLR 0x01 Clear CG Block interrupt requests.
Clear INTC Block interrupt requests.
No Count in progress Yes RTCCR 0x00 Stop End of interrupt INTRTC EICRCG 0x07 INTCLR 0x3a Count processing Clear CG Block interrupt requests. RTCCR 0x01 Start
Clear INTC Block interrupt requests.
60 minutes elapsed Yes Clear count time
No
End of interrupt
Figure 3.4.13 Flowchart for time control
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TX1940 Application Note 3.4.8
3.4.8.1
2-ms Interval Timer
Overview of the 2-ms Interval Timer
* *
Using the 16-Bit Timer (TMRB), generate an interrupt every 2 ms. Set the interval time in the Timer Register TB2RG1 and generate INTTB21. Timer Register calculation The prescaler output resolutions needed for calculation are shown in Table 3.4.5.
Table 3.4.5 Prescaler output clock resolution
@fc = 32 MHz
Peripheral Clock Selection
Clock Gear Value
Selection of Prescaler Clock 00 (fperiph/4)
3
Resolution of Prescaler Output Clock T1 fc/2 (0.25 s) fc/22 (0.125 s) fc/24 (0.5 s) fc/2 (0.25 s)
3 5
T4 fc/2 (1.0 s) fc/24 (0.5 s) fc/2 (0.25 s)
3
T16 fc/2 (4.0 s)
7
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/26 (2.0 s) fc/25 (1.0 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/210 (32 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s)
fc/26 (2.0 s) fc/2 (1.0 s)
5 4
01 (fc/2) 0 (gear) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/25 (1.0 s) fc/24 (0.5 s) fc/2 (2.0 s)
6
fc/2 (0.5 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7
11 (fc/8)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5
fc/2 (4.0 s) fc/26 (2.0 s) fc/2 (1.0 s)
5 4
fc/2 (0.25 s)
3
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.125 s)
2
fc/2 (0.5 s) fc/2 (0.25 s)
3
fc/23 (0.25 s)
fc/25 (1.0 s) fc/2 (0.5 s)
4
01 (fc/2) 1 (fc) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.25 s)
3
fc/25 (1.0 s) fc/24 (0.5 s) fc/2 (1.0 s)
5
11 (fc/8)
01 (fperiph/2) 10 (fperiph)

Note 1: Note 2: Note 3:
The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Do not change the clock gear value while the timer is operating. The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) 2000 s / 0.25 s = 8000 (1F40H) Set TB2RG1L to 00H and TB2RG1H to 1FH. For T4 (fc/25) 2000 s / 1.0 s = 2000 (07D0H) Set TB2RG1L to D0H and TB2RG1H to 07H. 3-132
TX1940 Application Note For T16 (fc/27) 2000 s / 4.0 s = 500 (01F4H) Set TB2RG1L to F4H and TB2RG1H to 01H.
3.4.8.2
Method for controlling the 2-ms Interval Timer
Initial settings
TB2RUN TB2FFCR TB2MOD TB2RG1L TB2RG1H IMC8L TB2RUN 765 00X 110 001 111 000 XXXX1 00X 4 X 0 0 1 0 1 X 3 0 0 0 0 0 0 0 2 0 0 1 1 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 0 1 1 1 Stop TMRB2. Disable trigger. Select prescaler output clock as input clock and disable capture function. Set interval time. Set TB2RG1 to 2000 s / T16 = 500. Set INTTB21 for rising edge and to level 4. Start TMRB2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
* *
Always set the eight low-order data bits in the Timer Register first, followed by the eight high-order bits. In the sample program AD conversion key chattering-elimination processing and 7segment LED display output processing is performed using an INTTB21 interrupt.
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TX1940 Application Note 3.4.9
3.4.9.1
Controlling standby
SLEEP Mode
The processor stops running and only the internal low-speed oscillator and the Timer for RTC continue to operate. To exit this mode use a reset, an NMI interrupt or a CG Block interrupt. In the sample program only a reset or an NMI interrupt may be used to exit SLEEP Mode so that only the Timer for RTC operates.
SLEEP Mode processing Disable interrupts Reset RTC accumulator Disable INT0 Disable INTTA1 Disable INTTB21 Disable INTAD Disable INTRTC Yes AD conversion busy? No Port processing Change mode Yes PLL locked? No Enable INTRTC Enable INTAD Enable INTTB21 Enable INTTA1 Enable INT0 Start RTC timer Enable interrupts Done SYSCR2 = 0x28; _asm("lui r2, 0x0000"); /* Mode selection */ /* Mode change */
_asm("addiu r2, r2, 0x0100"); _asm("mtc0 r2, r3");
Figure 3.4.14 Flow of control in SLEEP Mode
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TX1940 Application Note
3.4.9.2 IDLE Mode
The processor stops running and the internal I/O devices operate or halt as determined by the corresponding register bits. Each module has in its internal registers one bit which determines whether the module will continue to operate or stop operating in IDLE Mode.
Caution: The RTC cannot be set to continue to operate or stop operating in IDLE Mode.
To exit this mode use a reset, an NMI interrupt, a CG Block interrupt or an INTC Block interrupt. In the sample program only a RESET or an NMI interrupt may be used to exit IDLE Mode.
IDLE Mode processing Disable interrupts Reset RTC timer Disable INT0 Disable INTTA1 Disable INTTB21 Disable INTAD Disable INTRTC Yes AD conversion busy? No Port processing Change mode Enable INTRTC Enable INTAD Enable INTTB21 Enable INTTA1 Enable INT0 Start RTC timer Enable interrupts Done SYSCR2 = 0x2c; _asm("lui _asm("addiu _asm("mtc0 /* Mode selection */
r2, 0x0000"); /* Mode change */ r2, r2, 0x0100"); r2, r3");
Figure 3.4.15 Flow of control in IDLE Mode
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TX1940 Application Note
3.4.9.3 STOP Mode
The processor stops running and all internal I/O devices also stop operating. To exit this mode use a reset, an NMI interrupt or a CG Block interrupt. In the sample program only a RESET or an NMI interrupt may be used to exit STOP Mode.
STOP Mode processing Disable interrupts Disable INT0 Disable INTTA1 Disable INTTB21 Disable INTAD Disable INTRTC Yes AD conversion busy? No Port processing Change mode Yes PLL locked? No Enable INTRTC Enable INTAD Enable INTTB21 Enable INTTA1 Enable INT0 Enable interrupts Done SYSCR2 = 0x25; /* Mode selection */ _asm("lui r2, 0x0000"); /* Mode change */ _asm("addiu r2, r2, 0x0100"); _asm("mtc0 r2, r3");
Figure 3.4.16 Flow of control in STOP Mode
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TX1940 Application Note 3.4.10
3.4.10.1
Sample Program
Generic flowchart
Main processing
Disable interrupts
Initialize
Enable interrupts
Time data changed ? Yes Update 7-segment LED display data
No
Key input ? SLEEP IDLE STOP
SLEEP Mode processing IDLE Mode processing STOP Mode processing No Clear time counter
SPLIT
Time count in progress Yes
No off
Split display finished ? Yes
INT0
INTRTC
INTAD
Start/Stop counter
Count processing
AD key input processing
End of interrupt
End of interrupt
End of interrupt
INTTA1
INTTB21
Buzzer tone count processing
7-segment LED display processing
End of interrupt
AD key chattering-elimination processing
End of interrupt
Figure 3.4.17 Generalized flow of control in Stopwatch Mode
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3.4.10.2 File configuration
Table 3.4.6 below lists the files used in the sample programs.
Table 3.4.6 Filename
stopwatch.c func_stopwatch.c led.h key.h Stc9i16.asm io1940.c io1940.h Bit32def.h adc.h tmr.h
File configuration Contents Pages References
3-140 3-147 3-151 3-152 3-12 3-51 3-28 3-42 3-31 3-49
Stopwatch Mode main section Stopwatch Mode main functional section 7-segment LED display definitions Key definitions Start-up routine Special function registers Special function register definitions 32-bit macro definitions AD conversion register definitions Timer register definitions
3.4.10.3
Vector table
The vector table used in the sample programs is shown below. Replace the vector table section in the start-up routine with the vector table given below. Interrupt vector table section
_VecTable: dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _mint0 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintta1 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _minttb21 _Int_dummy ;0 --;1 --;2 --;3 --;4 --;5 --;6 --;7 --;8 --;9 --;10--;11--;12--;13--;14--;15--;16--;17--;18--;19--;20--;21--;22--;23--;24--;25--;26--;27--;28--;29--;30--;31--;32--;33--;34--software set INT[0] INT[1] INT[2] INT[3] INT[4] * * * * INT[5] INT[6] INT[7] INT[8] INT[9] INT[A] * * * * INTTA0 : 8bit Timer 0 INTTA1 : 8bit Timer 1 INTTA2 : 8bit Timer 2 INTTA3 : 8bit Timer 3 * * * * INTTB00 :16bit Timer 0 INTTB01 :16bit Timer 0 INTTB10 :16bit Timer 1 INTTB11 :16bit Timer 1 INTTB20 :16bit Timer 2 INTTB21 :16bit Timer 2 INTTN30 :16bit Timer 3
(TB0RG0) (TB0RG1) (TB1RG0) (TB1RG1) (TB2RG0) (TB2RG1) (TB3RG0)
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dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintrtc _mintad _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;35--;36--;37--;38--;39--;40--;41--;42--;43--;44--;45--;46--;47--;48--;49--;50--;51--;52--;53--;54--;55--;56--;57--;58--;59--;60--;61--;62--;63--INTTB31 :16bit Timer 3 (TB3RG1) * * * * INTTBOF0:16bit Timer 0 (OverFlow) INTTBOF1:16bit Timer 1 (OverFlow) INTTBOF2:16bit Timer 2 (OverFlow) INTTBOF3:16bit Timer 3 (OverFlow) * * * * INTRX0 :Serial receive (Channel 0) INTTX0 :Serial transmit (Channel 0) INTRX1 :Serial receive (Channel 1) INTTX1 :Serial transmit (Channel 1) INTS2 :Serial Channel 2 interrupt * INTRX3 :Serial receive (Channel 3) INTTX3 :Serial transmit (Channel 3) INTRX4 :Serial receive (Channel 4) INTTX4 :Serial transmit (Channel 4) INTRTC :Timer for RTC interrupt INTAD :AD conversion finished INTDMA0:DMA transfer finished (Channel INTDMA1:DMA transfer finished (Channel INTDMA2:DMA transfer finished (Channel INTDMA3:DMA transfer finished (Channel
0) 1) 2) 3)
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3.4.10.4 Source code
Filename: stopwatch.c
/* ************************************************** ** Application Note ** ** ** ** ( STOP WATCH ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 2000/2/3 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" /* #include "cg.h" /* #include "adc.h" /* #include "tmr.h" /* #include "led.h" /* #include "key.h" /* #include /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Mode definitions ---*/ #define cmd_watch_run 0 /* #define cmd_watch_split 1 /* /*--- Key definitions ---*/ #define csplit_key cadkey_1 /* #define csleep_key cadkey_2 /* #define cidle_key cadkey_3 /* #define cstop_key cadkey_4 /* /*************************************************/ /* extern declaration */ /*************************************************/ extern void padkey_in(void); extern void padkey_chat(void); extern void padkey_decode(void); extern void p7seg_disp(void); extern void pbeep_start(unsigned short); extern void pbeep_timer(void); extern extern extern extern extern unsigned unsigned unsigned unsigned unsigned char char char char char g7seg_data[4]; gled_data; gadkey_code; fadkey_push; t7seg_ch[];
Special registers */ CG */ AD conversion */ Timers */ Display definitions */ Key definitions */
Normal Mode */ Split Mode */ Split key */ Sleep operation key */ Idle operation key */ Stop operation key */
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extern unsigned char tled_ch1[];
/*************************************************/ /* RAM */ /*************************************************/ unsigned char gmd_watch; /* Mode data */ unsigned short gwatch_time; /* Time data */ /*************************************************/ /* CODE */ /*************************************************/ /******************************************************************************/ /* Module name :mwatch_init */ /******************************************************************************/ /* Function :Initializes stopwatch */ /* Inputs :None */ /* Outputs :SFR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mwatch_init(void){ /*--- CG settings ---*/ IO_SYSCR0 = 0xf0; IO_SYSCR1 IO_ADCCLK = 0x10; = 0x01;
/* /* /* /*
=1 =1 =1 =1 */ =0 =0 =00 */ =0 =1 =0 =00 */ =01 */
/*--- I/O port settings ---*/ IO_P0 = 0xff; IO_P0CR = 0xff; IO_P1 IO_P1CR IO_P1FC IO_P2 IO_P2CR IO_P2FC IO_P3 IO_P3CR IO_P3FC IO_P4 IO_P4CR IO_P4FC IO_P7 IO_P7CR IO_P7FC = 0xff; = 0xff; = 0x00; = 0xff; = 0xff; = 0x00; = 0xff; = 0x00; = 0x00; = 0x1f; = 0x10; = 0x00; = 0x65; = 0x67; = 0x02;
/* Output High on P00-P07 */ /* Set P00-P07 for output */ /* Output High on P10-P17 */ /* Set P10-P17 for output */ /* Set P10-P17 to be a port */ /* Output High on P20-P27 */ /* Set P20-P27 for output */ /* Set P20-P27 to be a port */ /* Output High on P30-P31 and set P32-P37 for pull-up */ /* Set P30-P31 for output and P32-P37 for input */ /* Set P30-P37 to be a port */ /* Set P40-P43 for pull-up and output High on P44 */ /* Set P40-P43 for input and P44 for output */ /* Set P40-P44 to be a port */ /* Output High on P70,P72,P75,P76 */ /* Set P70,P71,P72,P75,P76 for output and P73,P74,P77 for input */ /* Set P71 to be TA1OUT output pin and set others to be ports */ /* Output High on P80-P87 */ /* Set P80-P87 for output */ /* Set P80-P87 to be a port */ /* Output Low on P96-P97 */ /* Set P90-P95 for input and P96-P97 for output */ /* Set P90-P97 to be a port */ /* Output High on PA0-PA4 */ /* Set PA0-PA4 for output and PA5-PA7 for input */ /* Set PA0-PA7 to be a port */
IO_P8 IO_P8CR IO_P8FC IO_P9 IO_P9CR IO_P9FC IO_PA IO_PACR IO_PAFC
= 0xff; = 0xff; = 0x00; = 0x3f; = 0xc0; = 0x00; = 0x1f; = 0x1f; = 0x00;
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/*--- INT0 switch settings ---*/ IO_IMCGA0 = 0x21; IO_IMC0L = 0x1630; IO_EICRCG = 0x00; IO_INTCLR = 0x01;
/* LEVEL6 */ /* */ /* Clear interrupt latch */
/*--- AD conversion settings ---*/ IO_ADMOD0 = 0x00; /* =0 =0 =0 =0 */ IO_ADMOD1 = 0x82; /* =1 =0 =0 =010 */ IO_IMCEH = 0x3210; /* LEVEL2 */ /*--- Timer for RTC settings ---*/ IO_RTCCR = 0x00; /* Stop and clear Timer for RTC */ IO_IMCGB3 = 0x31; /* LEVEL5 */ IO_IMCEH | = 0x0015; /* */ IO_EICRCG = 0x07; /* Clear interrupt latch */ IO_INTCLR = 0x3a; /*--- Timer settings ---*/ IO_TB2RUN = 0x00; IO_TB2FFCR = 0xc3; IO_TB2MOD IO_TB2RG1L IO_TB2RG1H IO_IMC8L = = = = 0x27; 0xf4; 0x01; 0x3330;
/* /* /* /* /* /* /*
=0 =0 =0 =0 */ =0 =0 =0 */ =0 =11 */ =1 =00 =1 =11 */ TB2RG1 = 2000 / 4 */ */ LEVEL3 */
/*--- Buzzer settings ---*/ IO_TA01RUN = 0x00; IO_TA01MOD IO_TA1REG IO_TA1FFCR IO_IMC5L = = = = 0x08; 0x7d; 0x0b; 0x3430;
/* /* /* /* /* /*
=0 =0 =0 */ =0 =0 */ =00 =00 =10 =00 */ TA1REG = 500 / 4 */ =10 =1 =1 */ LEVEL4 */
/*--- Data initialization ---*/ g7seg_data[0] = c7seg_0; g7seg_data[1] = c7seg_0; g7seg_data[2] = c7seg_0; g7seg_data[3] = c7seg_spc; gled_data = 0xfe; gwatch_time = 0; gmd_watch = cmd_watch_run; /*--- Timer start ---*/ IO_TB2RUN = 0x05; }
/* =0 =0 =1 =1 */
/******************************************************************************/ /* Module name :pwatch_sleep */ /******************************************************************************/ /* Function :SLEEP Mode processing */ /* Inputs :ADMOD0 */ /* Outputs :RTCCR,IMCGA0,IMC0L,IMCGB3,IMCEH,P8,PA,SYSCR2,EICRCG,INTCLR */ /* Parameters :None */ /* Return value :None */ /* *****************************************************************************/ void __isa32 pwatch_sleep(void){ __DI(); IO_RTCCR = 0x01; /* Reset RTC accumulator */ IO_IMC0L & = 0xf0ff; /* Disable INT0 */ IO_IMCGA0 = 0x20; IO_IMC5L & = 0xf0ff; /* Disable INTTA1 */ IO_IMC8L & = 0xf0ff; /* Disable INTTB21 */ IO_IMCEH & = 0xf0ff; /* Disable INTAD */
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IO_IMCEH & = 0xfff0; IO_IMCGB3 = 0x30; while ((IO_ADMOD0 & ADBF) != 0x00); IO_P8 = 0xff; IO_PA = 0x1f; IO_SYSCR2 = 0x28; __SYNC(); __asm("lui r2,0x0000"); __asm("addiu r2,r2,0x0100"); __asm("mtc0 r2,r3"); __asm("nop"); while ((IO_SYSCR3 & LUPFG) != 0x00); IO_IMCGB3 = 0x31; IO_IMCEH = (IO_IMCEH & 0xff00) | IO_EICRCG = 0x07; IO_INTCLR = 0x3a; IO_IMCEH = (IO_IMCEH & 0x00ff) | IO_IMC8L = (IO_IMC8L & 0x00ff) | IO_IMC5L = (IO_IMC5L & 0x00ff) | IO_IMCGA0 = 0x21; IO_IMC0L = (IO_IMC0L & 0x00ff) | IO_EICRCG = 0x00; IO_INTCLR = 0x01; gwatch_time + = IO_RTCREG; __EI(); } /******************************************************************************/ /* Module name :pwatch_idle */ /******************************************************************************/ /* Function :IDLE Mode processing */ /* Inputs :ADMOD0 */ /* Outputs :IMCGA0,IMC0L,RTCCR,EICRCG,INTCLR,P8,PA,SYSCR2 */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __isa32 pwatch_idle(void){ __DI(); IO_RTCCR = 0x08; /* Stop Timer for RTC */ IO_IMC0L & = 0xf0ff; /* Disable INT0 */ IO_IMCGA0 = 0x20; IO_IMC5L & = 0xf0ff; /* Disable INTTA1 */ IO_IMC8L & = 0xf0ff; /* Disable INTTB21 */ IO_IMCEH & = 0xf0ff; /* Disable INTAD */ IO_IMCEH & = 0xfff0; /* Disable INTRTC */ IO_IMCGB3 = 0x30; while ((IO_ADMOD0 & ADBF) != 0x00); /* Check AD conversion */ IO_P8 = 0xff; /* Port processing */ IO_PA = 0x1f; IO_SYSCR2 = 0x2c; /* Select mode */ __SYNC(); __asm("lui r2,0x0000");/* Change mode */ __asm("addiu r2,r2,0x0100"); __asm("mtc0 r2,r3"); __asm("nop"); /* Dummy instructions */ IO_IMCGB3 = 0x31; /* Enable INTRTC */ IO_IMCEH = (IO_IMCEH & 0xff00) | 0x0015; IO_EICRCG = 0x07; IO_INTCLR = 0x3a; IO_IMCEH = (IO_IMCEH & 0x00ff) | 0x3200; /* Enable INTAD */ IO_IMC8L = (IO_IMC8L & 0x00ff) | 0x3300; /* Enable INTTB21 */ IO_IMC5L = (IO_IMC5L & 0x00ff) | 0x3400; /* Enable INTTA1 */ IO_IMCGA0 = 0x21; /* Enable INT0 */ IO_IMC0L = (IO_IMC0L & 0x00ff) | 0x1600; IO_EICRCG = 0x00; IO_INTCLR = 0x01; /* Disable INTRTC */ /* Check AD conversion */ /* Port processing */ /* Select mode */ /* Change mode */
/* Dummy instructions */ /* Enable INTRTC */ 0x0015;
0x3200; /* 0x3300; /* 0x3400; /* /* Enable 0x1600;
Enable INTAD */ Enable INTTB21 */ Enable INTTA1 */ INT0 */
/* Increment RTC accumulator */
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TX1940 Application Note
IO_RTCCR __EI(); } /******************************************************************************/ /* Module name :pwatch_stop */ /******************************************************************************/ /* Function :STOP Mode processing */ /* Inputs :ADMOD0 */ /* Outputs :IMCGA0,IMC0L,P8,PA,SYSCR2,EICRCG,INTCLR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __isa32 pwatch_stop(void){ __DI(); IO_IMC0L & = 0xf0ff; /* Disable INT0 */ IO_IMCGA0 = 0x20; IO_IMC5L & = 0xf0ff; /* Disable INTTA1 */ IO_IMC8L & = 0xf0ff; /* Disable INTTB21 */ IO_IMCEH & = 0xf0ff; /* Disable INTAD */ IO_IMCEH & = 0xfff0; /* Disable INTRTC */ IO_IMCGB3 = 0x30; while ((IO_ADMOD0 & ADBF) != 0x00); /* Check AD conversion */ IO_P8 = 0xff; /* Port processing */ IO_PA = 0x1f; IO_SYSCR2 = 0x25; /* Select mode */ __SYNC(); __asm("lui r2,0x0000"); /* Change mode */ __asm("addiu r2,r2,0x0100"); __asm("mtc0 r2,r3"); __asm("nop"); /* Dummy instructions */ while ((IO_SYSCR3 & LUPFG) != 0x00); IO_IMCGB3 = 0x31; /* Enable INTRTC */ IO_IMCEH = (IO_IMCEH & 0xff00) | 0x0015; IO_EICRCG = 0x07; IO_INTCLR = 0x3a; IO_IMCEH = (IO_IMCEH & 0x00ff) | 0x3200; /* Enable INTAD */ IO_IMC8L = (IO_IMC8L & 0x00ff) | 0x3300; /* Enable INTTB21 */ IO_IMC5L = (IO_IMC5L & 0x00ff) | 0x3400; /* Enable INTTA1 */ IO_IMCGA0 = 0x21; /* Enable INT0 */ IO_IMC0L = (IO_IMC0L & 0x00ff) | 0x1600; IO_EICRCG = 0x00; IO_INTCLR = 0x01; __EI(); } /******************************************************************************/ /* Module name :main */ /******************************************************************************/ /* Function :Stopwatch Mode main processing */ /* Inputs :gmd_watch,gwatch_time,RTCCR,ADMOD0,RTCREG,gadkey_code */ /* Outputs :g7seg_data,gled_data,gmd_watch,IMCGA0,IMCGB3,RTCCR,P8,PA,SYSCR2*/ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void main(void){ static unsigned short lwatch_buff = 0; unsigned int lminute ,lsecond; __DI(); mwatch_init(); __EI(); /* Initialize */ = 0x09; /* Start Timer for RTC */
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TX1940 Application Note
/****************************************/ /* */ /* Main loop */ /* */ /****************************************/ for(;;){ padkey_decode(); switch (gmd_watch) { case cmd_watch_run: /*--- Display update processing ---*/ if (lwatch_buff != gwatch_time) { lminute = gwatch_time / 120; /* Calculate time in minutes */ lsecond = (gwatch_time / 2) % 60; /* Calculate time in seconds */ g7seg_data[0] = t7seg_ch[lsecond % 10]; g7seg_data[1] = t7seg_ch[lsecond / 10]; g7seg_data[2] = t7seg_ch[lminute % 10]; lminute /= 10; if (lminute == 0) g7seg_data[3] = c7seg_spc; else g7seg_data[3] = t7seg_ch[lminute]; gled_data = tled_ch1[gwatch_time & 0x0007]; lwatch_buff = gwatch_time; /* Store time data */ } switch (gadkey_code) { /*--- SPLIT & CLEAR processing ---*/ case csplit_key: pbeep_start(100); if ((IO_RTCCR & RTCRUN) != 0x00) { gled_data = 0x00; gmd_watch = cmd_watch_split; } else gwatch_time = 0; break; /*--- SLEEP Mode processing ---*/ case csleep_key: if ((IO_RTCCR & RTCRUN) != 0x00) { pwatch_sleep(); } break; /*--- IDLE Mode processing ---*/ case cidle_key: if ((IO_RTCCR & RTCRUN) != 0x00) { pwatch_idle(); } break; /*--- STOP Mode processing ---*/ case cstop_key: if ((IO_RTCCR & RTCRUN) != 0x00) { pwatch_stop(); } break; } break; case cmd_watch_split: /* SPLIT display wait processing */ if (gadkey_code == csplit_key) { pbeep_start(100); gled_data = tled_ch1[gwatch_time & 0x0007]; gmd_watch = cmd_watch_run; } break; } } } /******************************************************************************/
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/* Module name :mintrtc */ /******************************************************************************/ /* Function :Time counter processing (using Timer for RTC interrupt) */ /* Inputs :gwatch_time */ /* Outputs :gwatch_time */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __interrupt mintrtc(void){ IO_EICRCG = 0x07; IO_INTCLR = 0x3a; gwatch_time++; if (gwatch_time == 7200) gwatch_time = 0; } /******************************************************************************/ /* Module name :mint0 */ /******************************************************************************/ /* Function :Time count start (using INT0 interrupt) */ /* Inputs :None */ /* Outputs :RTCCR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __interrupt mint0(void){ IO_EICRCG = 0x00; IO_INTCLR = 0x01; if ((IO_RTCCR & RTCRUN) != 0x00) { IO_RTCCR = 0x00; pbeep_start(100); } else { IO_RTCCR = 0x01; pbeep_start(100); } } /******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/ /* Function :2-ms Interval Timer interrupt */ /* Inputs :None */ /* Outputs :None */ /******************************************************************************/ void __interrupt minttb21(void){ IO_INTCLR = 0x21; p7seg_disp(); padkey_chat(); } /******************************************************************************/ /* Module name :mintta1 */ /******************************************************************************/ /* Function :Beep Tone Timer interrupt */ /* Inputs :None */ /* Outputs :None */ /******************************************************************************/ void __interrupt mintta1(void){ IO_INTCLR = 0x15; pbeep_timer(); /* Clear interrupt latch */ /* Clear interrupt latch */ /* Clear interrupt latch */ /* Clear interrupt latch */
/* Time count */ /* Check for time overflow */
/* Stop count */
/* Start count */
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} /******************************************************************************/ /* Module name :mintad */ /******************************************************************************/ /* Function :AD Conversion-Finished interrupt */ /* Inputs :None */ /* Outputs :None */ /******************************************************************************/ void __interrupt mintad(void){ IO_INTCLR = 0x3b; padkey_in(); } /******************************************************************************/ /* Module name :mnmi */ /******************************************************************************/ /* Function :NMI interrupt */ /* Inputs :None */ /* Outputs :None */ /******************************************************************************/ void __interrupt mnmi(void){ __asm("NOP"); } /* Clear interrupt latch */
Filename: func_stopwatch.c
/* ************************************************** ** Application Note ** ** ** ** ( STOP WATCH FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" #include "adc.h" #include "key.h" /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Port output definitions(7SEG-LED digits) ---*/
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#define #define #define #define #define c7seg_digit_out0 c7seg_digit_out1 c7seg_digit_out2 c7seg_digit_out3 c7seg_digit_out4 0x1e 0x1d 0x1b 0x17 0x0f /* /* /* /* /* PA PA PA PA PA (00011110) (00011101) (00011011) (00010111) (00001111) */ */ */ */ */
/*************************************************/ /* RAM */ /*************************************************/ unsigned char g7seg_data[4]; /* unsigned char gled_data; /* unsigned char gadkey_data; /* unsigned char gadkey_code; /* unsigned char fadkey_push; /* unsigned char fadkey_ok; /* unsigned short gbeep_cnt; /* /*************************************************/ /* CODE */ /*************************************************/
7-segment LED display data */ LED display data */ AD key data */ AD key confirmed data */ AD Key Depression Status flag */ AD Key Confirmed flag */ Beep tone count */
/******************************************************************************/ /* Module name :padkey_in */ /******************************************************************************/ /* Function :AD key data input (using AD Conversion-Finished interrupt) */ /* Inputs :ADREG26H */ /* Outputs :gadkey_data */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void padkey_in(void) { unsigned char lad_data; /*--- Entering AD conversion data ---*/ lad_data = IO_ADREG26H; /*--- Converting AD data into key data ---*/ if (lad_data > 225) gadkey_data = 0; else if (lad_data > 175) gadkey_data else if (lad_data > 125) gadkey_data else if (lad_data > 75) gadkey_data else if (lad_data > 25) gadkey_data else gadkey_data }
= = = = =
1; 2; 3; 4; 5;
/******************************************************************************/ /* Module name :padkey_chat */ /******************************************************************************/ /* Function :AD key chattering elimination (using 2-ms interrupt) */ /* Inputs :gadkey_data */ /* Outputs :ADMOD0 ,fadkey_ok ,fadkey_push */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void padkey_chat(void) { static unsigned char ladkey_chat = 0 ,ladkey_buff = 0x00; /*--- Eliminating chattering ---*/ if (gadkey_data == ladkey_buff) { ladkey_chat++; if (ladkey_chat > 15) { ladkey_chat = 0; if (gadkey_data == 0x00) fadkey_push = 0; else {
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TX1940 Application Note
if (fadkey_push == 0) { fadkey_ok = 1; fadkey_push = 1; } } } } else ladkey_chat = 0; /*--- Holding key data ---*/ ladkey_buff = gadkey_data; /*--- Starting AD decode ---*/ IO_ADMOD0 |= ADS; } /******************************************************************************/ /* Module name :padkey_decode */ /******************************************************************************/ /* Function :AD key decoding */ /* Inputs :gadkey_data ,fadkey_ok */ /* Outputs :gadkey_code ,fadkey_ok */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void padkey_decode(void) { gadkey_code = cadkey_no; if (fadkey_ok == 1) { fadkey_ok = 0; gadkey_code = gadkey_data; } } /******************************************************************************/ /* Module name :p7seg_disp */ /******************************************************************************/ /* Function :7-segment LED display output (using 2-ms interrupt) */ /* Inputs :gled_data,g7seg_data */ /* Outputs :P8,PA */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void p7seg_disp(void){ static unsigned char ldisp_digit = 0; /*--- Turning display off ---*/ IO_P8 = 0xff; /*--- Display output ---*/ switch (ldisp_digit) { case 0: IO_PA = c7seg_digit_out0; IO_P8 = gled_data; break; case 1: IO_PA = c7seg_digit_out1; IO_P8 = g7seg_data[0]; break; case 2: IO_PA = c7seg_digit_out2; IO_P8 = g7seg_data[1]; break; case 3: IO_PA = c7seg_digit_out3; IO_P8 = g7seg_data[2]; break;
/* Digit output */ /* LED output */
/* Digit output */ /* 7-segment LED output */
/* Digit output */ /* 7-segment LED output */
/* Digit output */ /* 7-segment LED output */
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case 4: IO_PA = c7seg_digit_out4; IO_P8 = g7seg_data[3]; break; } /*--- Digit count ---*/ ldisp_digit++; if (ldisp_digit > 4) ldisp_digit = 0; } /*************************************************/ /* Display data table */ /*************************************************/ /*--- 7SEG-LED ---*/ const unsigned char t7seg_ch[] = { 0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xd8, 0x80,0x98,0x88,0x83,0xc6,0xa1,0x86,0x8e, }; /*--- LED ---*/ const unsigned char tled_ch1[] = { 0xfe,0xfd,0xfb,0xf7,0xef,0xdf,0xbf,0x7f }; /******************************************************************************/ /* Module name :pbeep_start */ /******************************************************************************/ /* Function :Beep tone start */ /* Inputs :None */ /* Outputs :gbeep_cnt,TA01RUN */ /* Parameters :Beep tone time */ /* Return value :None */ /******************************************************************************/ void pbeep_start(unsigned short lbeep_on_time){ gbeep_cnt = lbeep_on_time * 2; IO_TA01RUN = 0x06; } /******************************************************************************/ /* Module name :pbeep_timer */ /******************************************************************************/ /* Function :Beep tone */ /* Inputs :gbeep_cnt */ /* Outputs :gbeep_cnt */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void pbeep_timer(void){ gbeep_cnt--; if(gbeep_cnt == 0) IO_TA01RUN = 0x00; } /* Digit output */ /* 7-segment LED output */
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TX1940 Application Note Filename: led.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( LED HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*** 7-segment LED definition ***/ #define c7seg_0 #define c7seg_1 #define c7seg_2 #define c7seg_3 #define c7seg_4 #define c7seg_5 #define c7seg_6 #define c7seg_7 #define c7seg_8 #define c7seg_9 #define c7seg_a #define c7seg_b #define c7seg_c #define c7seg_d #define c7seg_e #define c7seg_f #define c7seg_p #define c7seg_spc /*** LED difinition ***/ #define cled_all_on #define cled_all_off
0xc0 0xf9 0xa4 0xb0 0x99 0x92 0x82 0xd8 0x80 0x98 0x88 0x83 0xc6 0xa1 0x86 0x8e 0x8c 0xff
/* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /*
0 */ 1 */ 2 */ 3 */ 4 */ 5 */ 6 */ 7 */ 8 */ 9 */ A */ B */ C */ D */ E */ F */ P */ Blank */
0x00 0xff
/* Turn all LEDs on */ /* Turn all LEDs off */
3-151
TX1940 Application Note Filename: key.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( KEY HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*--- Matrix key definition ---*/ #define cmatkey_no 0x0000 #define cmatkey_0 0x0008 #define cmatkey_1 0x0080 #define cmatkey_2 0x0800 #define cmatkey_3 0x8000 #define cmatkey_4 0x0004 #define cmatkey_5 0x0040 #define cmatkey_6 0x0400 #define cmatkey_7 0x4000 #define cmatkey_8 0x0002 #define cmatkey_9 0x0020 #define cmatkey_a 0x0200 #define cmatkey_b 0x2000 #define cmatkey_c 0x0001 #define cmatkey_d 0x0010 #define cmatkey_e 0x0100 #define cmatkey_f 0x1000 /*--- AD #define #define #define #define #define #define key definition ---*/ cadkey_no 0x00 cadkey_1 0x01 cadkey_2 0x02 cadkey_3 0x03 cadkey_4 0x04 cadkey_5 0x05
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TX1940 Application Note
3
3.5
PC Communications (simple desktop calculator)
This facility enables calculation formulae to be received from a personal computer and then returns the results of the calculation to the personal computer.
3.5.1
3.5.1.1
Functional block diagram
Basic specifications
* * *
The serial channels' (SIO) UART Mode is used for communicating with the personal computer. Calculations can only use the operators +, -, x and / and can only be performed on pairs of positive numbers. Calculation operands and results are always 32 bits in length; (operands: 0~2147483647), (results: -2147483647~2147483647).
Note: If an operation results in an overflow, the result might not be produced correctly.
* *
3.5.1.2
All data is received and transmitted as ASCII data. The 7-segment LEDs are used for display in PC Communications Mode.
Operation method
Enter a calculation formula into the personal computer and press [Enter]. The calculation result will be output. Example 1: Calculation formula: 354363+546454[Enter] Calculation result: 900817 Example 2: Calculation formula: 67/25[Enter] Calculation result: 2 Example 3: Calculation formula: 65757+746464-6476473[Enter] An error is generated because there are more than two terms. Calculation result: Error Example 4: Calculation formula: 6566+746464647456473[Enter] An error is generated because the data is too long. Calculation result: Error Example 5: Calculation formula: 100/0[Enter] An error is generated because an attempt has been made to divide by 0. Calculation result: Error
TB1940 Calculator Ver.1 >354363+546454 900817 >67/25 2 >65757+746464-6476473 Error >6566+746464647456473 Error >100/0 Error Figure 3.5.1 PC screen display example
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TX1940 Application Note Table 3.5.1 lists the valid ASCII codes which can be used in a sample program. Any other ASCII codes which are present in the data sent to the personal computer will be ignored.
Table 3.5.1 List of ASCII codes Character Code
0 1 2 3 4 5 6 7 8 9
ASCII Code
30 31 32 33 34 35 36 37 38 39
Character Code
A B C D E F + - x /
ASCII Code
3A 3B 3C 3D 3E 3F 2B 2D 2A 2F
Control codes
CR
ASCII Code
0D
3.5.2
Functional block diagram
TX1940FDBF TXD1, RXD1, CTS1 RS-232C (ch-1)
3.5.3 UART communication
P87-80 7SEG-LED
3.5.4 7-segment LED display output control LED PA4-PA0
16-Bit Timer TMRB2
3.5.5 2-ms interval timer
Figure 3.5.2 Block diagram
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TX1940 Application Note 3.5.3
3.5.3.1
UART communication
Overview of UART communication
Transfer data settings are shown below.
Baud rate Data bits Parity Stop bits 9600bps 8 bits None 1 bit
Note: The sample program is not equipped to handle communications errors.
Method for calculating the baud rate The following equation demonstrates how the baud rate is calculated when the baud rate generator is used. Baud rate = * Baud rate generator divisor Baud rate generator input clock / 16
Divide by integer If fc = 32 MHz is selected for fperiph and T0 = fperiph/4, to set the baud rate to 9600 bps, the input clock is calculated and the divisor selected as follows. For T0 (fc/22) 9600 = fc/4 Divisor 32,000,000 9600 x 4 x 16 / 16 Divisor = 52.0833 <52>
Divisor =
For T2 (fc/24) 9600 = fc/16 Divisor 32,000,000 9600 x 16 x 16 / 16 Divisor = 13.0208 <13>
Divisor =
For T8 (fc/26) 9600 = fc/64 Divisor 32,000,000 9600 x 64 x 16 / 16 Divisor = 3.2552 <3>
Divisor =
For T32 (fc/28) 9600 = fc/256 Divisor 32,000,000 9600 x 256 x 16 / 16 Divisor = 0.8138 <1>
Divisor =
Note: Values in < > are divisor values which have been rounded to the nearest integer.
3-155
TX1940 Application Note Hence: For T0 the baud rate cannot be set since the maximum divisor value is 15. For T2 the baud rate is 9615.38 bps with a margin for error of 0.16%. For T8 the baud rate is 10416.67 bps with a margin for error of 8.5%. For T32 the baud rate is 7812.50 bps with a margin for error of 18.6%. Therefore T2 is used in the sample program.
Data storage area In the sample program of PC communications the transmission data and receive data each have 32 bytes of storage area set aside for them.
Transmission data area
32 bytes
Receive data area
32 bytes
3-156
TX1940 Application Note
3.5.3.2 Method for controlling UART communications
Initial settings
P9CR P9FC SC1MOD0 SC1MOD1 SC1CR BR1CR IMCCH 7 X 0 0 6 X 0 0 5 0 0 0 X 4 0 X 0 X 0 1 1 1 3 1 1 1 X 0 1 0 0 2 0 X 0 1 1 1 1 X 0 X 0 0 0 0 0 1 X 0 1 1 0 Set P93 to be TxD1. Set P94 to be RxD1. Select 8-Bit UART Mode and baud rate generator. Select to Half-Duplex Synchronous Mode and set to stop when IDLE. Select No parity. Set baud rate to 9600 bps (when fc = 32 MHz). Set INTRX1 for rising edge and to level 5. Set INTTX1 for rising edge and to level 4.
000 000 XX0 XX1
L H
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
Receive control Until the reception-finished code (0D) is received, the received data is returned directly to the PC as transmission data.
INTRX1 INTCLR 0x32 Receive data SC1BUF Yes Disable reception
Received data = calculation formula
SC1MOD0 0x09 Save received data SC1BUF received data
No
Received data = new-line code
Yes
SC1MOD0 0x09 Disable reception Save received data
No
End of interrupt
Figure 3.5.3 Flow of control for transmission/receive
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TX1940 Application Note Transmission control To transmit/receive data, enable receive operation. When transmitting multiple data sets, store the transmission data in a buffer.
INTTX1 INTCLR 0x33 Clear INTC Block interrupt requests.
Transmit only No SC1MOD0 0x29 Enable reception End of interrupt
Yes
SC1BUF transmission data
Figure 3.5.4 Flow of control for transmission
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TX1940 Application Note 3.5.4
3.5.4.1
Control of 7-segment LED display output
Overview of 7-segment LED display
*
The display data is dynamically displayed on the 7-segment LEDs and updated every 2 ms.
LED Digit 0 (PA0) (Data 0)
(Data 4)
(Data 3)
(Data 2)
(Data 1)
7SEG-LED
Segments (P80~P87)
Digit 1 (PA1) Digit 2 (PA2) Digit 3 (PA3) Digit 4 (PA4)
Figure 3.5.5 Correspondence between digits and segments
*
Segments (P80~P87)
Figure 3.5.6 shows the timing for the digit and segment outputs.
Data 0
Data 1
Data 2
Data 3
Data 4
Digit 0 (PA0)
Digit 1 (PA1)
Digit 2 (PA2)
Digit 3 (PA3)
Digit 4 (PA4) 2 ms Note: The segment and digit outputs are all active-Low.
Figure 3.5.6 Timing of display digit update
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TX1940 Application Note * To light any given display segment, output a Low signal on the corresponding ports. The correspondence between display segments and port outputs is shown in Table 3.5.2.
A F G E D 7SEG-LED C Dp Dp G F E D LED C B A B
Table 3.5.2 Correspondence between display segments and port outputs
P87(Dp) 0 1 2 3 4 5 6 7 8 9 A B C D E F Blank * * * * * * * * * * * * * * * * 1 P86(G) 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 P85(F) 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 P84(E) 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 1 P83(D) 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 1 1 P82(C) 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1 P81(B) 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 1 P80(A) 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1
Note 1: All segment outputs are active-Low. Note 2: Set port output * to 0 to display Dp and to 1 to turn Dp off.
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TX1940 Application Note
3.5.4.2 Control method for 7-segment LED display
Initial settings
P8 P8CR P8FC PA PACR PAFC 7 1 1 0 6 1 1 0 5 1 1 0 4 1 1 0 1 1 0 3 1 1 0 1 1 0 2 1 1 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 Set P80~P87 output latches to 1. Set P80~P87 for output. Set P80~P87 to be port. Set PA0~PA4 output latches to 1. Set PA0~PA4 for output. Set PA0~PA4 to be port.
Note: X denotes Don't care; "-" denotes No change.
Processing of the display output Create the display data in the main routine and output display data for each digit to the ports within a 2-ms Interval Timer interrupt. For details of the 2-ms interval timer, please refer to Section 3.5.5. The brightness of the 7-segment and indicator LEDs can be adjusted by changing the time at which display data is output to the ports. The display output control flow is shown in Figure 3.5.7.
INTTB21 INTCLR 0x21
Clears INTC block interrupt requests.
Stop digit output for PA
Turns display off.
Output segment to P8
Output digit to PA
Turns display on.
Modify digit counter
End of interrupt
Figure 3.5.7 Display output control flow
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TX1940 Application Note 3.5.5
3.5.5.1
2-ms Interval Timer
Overview of the 2-ms Interval Timer
* *
Using the 16-Bit Timer (TMRB), generate an interrupt every 2 ms. Set the interval time in the Timer Register TB2RG1 and generate INTTB21. Timer Register calculation The prescaler output resolutions needed for calculation are shown in Table 3.5.3.
Table 3.5.3 Prescaler output clock resolution
@fc = 32 MHz
Peripheral Clock Selection
Clock Gear Value
Selection of Prescaler Clock 00 (fperiph/4)
2
Resolution of Prescaler Output Clock T1 fc/23 (0.25 s) fc/2 (0.125 s) fc/24 (0.5 s) fc/23 (0.25 s) fc/2 (1.0 s)
5 4
T4 fc/25 (1.0 s) fc/2 (0.5 s)
4
T16 fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/210 (32 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s)
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.25 s)
3
fc/26 (2.0 s) fc/25 (1.0 s) fc/2 (0.5 s)
4 7 6
01 (fc/2) 0 (gear) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (4.0 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7 6
fc/2 (0.5 s) fc/2 (2.0 s)
6
11 (fc/8)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5
fc/2 (4.0 s) fc/2 (2.0 s) fc/25 (1.0 s) fc/2 (0.5 s)
4
fc/23 (0.25 s) fc/2 (0.125 s)
2
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/23 (0.25 s)
fc/2 (0.25 s)
3
fc/25 (1.0 s) fc/24 (0.5 s) fc/2 (0.25 s)
3
01 (fc/2) 1 (fc) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5 4
fc/2 (0.5 s) fc/2 (1.0 s)
5
11 (fc/8)
01 (fperiph/2) 10 (fperiph)

Note 1: Note 2: Note 3:
The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Do not change the clock gear value while the timer is operating. The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) 2000 s / 0.25 s = 8000 (1F40H) Set TB2RG1L to 00H and TB2RG1H to 1FH. For T4 (fc/25) 2000 s / 1.0 s = 2000 (07D0H) Set TB2RG1L to D0H and TB2RG1H to 07H.
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TX1940 Application Note For T16 (fc/2 ) 2000 s / 4.0 s = 500 (01F4H)
7
Set TB2RG1L to F4H and TB2RG1H to 01H.
3.5.5.2
Method for controlling the 2-ms Interval Timer
Initial settings
TB2RUN TB2FFCR TB2MOD TB2RG1L TB2RG1H IMC8L TB2RUN 765 00X 110 001 111 000 XXXX1 00X 4 X 0 0 1 0 1 X 3 0 0 0 0 0 0 0 2 0 0 1 1 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 0 1 1 1 Stop TMRB2. Disable trigger. Select prescaler output clock as input clock and disable capture function. Set interval time. Set TB2RG1 to 2000 s/ T16 = 500. L H Set INTTB21 for rising edge and to level 4. Start TMRB2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
* *
Always set the eight low-order data bits in the Timer Register first, followed by the eight high-order bits. In the sample program chattering-elimination processing for the matrix keys and AD conversion keys and 7-segment LED display output processing is performed using a INTTB21 interrupt.
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TX1940 Application Note 3.5.6
3.5.6.1
Sample program
Generic flowchart
Main processing Disable interrupts
Initialize
Enable interrupts
No
Finished sending initial screen ? Yes
No
Finished receiving calculation formula?
Yes Perform calculation
No
Finished sending calculation result ?
Yes
INTTB2
INTAD
Perform 7-segment LED display processing
Process AD key input
End of interrupt
End of interrupt
INTTX1
INTRX1
Perform data transmission processing
Perform data reception processing
End of interrupt
End of interrupt
Figure 3.5.8
General flow of operation in PC Communications Mode
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TX1940 Application Note
3.5.6.2 File configuration
Table 3.5.4 lists the files used in the sample programs.
Table 3.5.4 File configuration Filename
uart.c func_uart.c led.h ascii.h Stc9i16.asm io1940.c io1940.h
Contents
Main PC communications section PC Communications Mode functional section 7-segment LED display definitions ASCII code definitions Start-up routine Special function registers Special function register definitions
Page References
3-167 3-174 3-176 3-177 3-12 3-51 3-28
3.5.6.3
Vector table
The vector table used in the sample programs is shown below. Replace the vector table section in the start-up routine with the vector table given below. Interrupt vector table section (start-up routine)
_VecTable: dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _minttb21 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;0 --;1 --;2 --;3 --;4 --;5 --;6 --;7 --;8 --;9 --;10--;11--;12--;13--;14--;15--;16--;17--;18--;19--;20--;21--;22--;23--;24--;25--;26--;27--;28--;29--;30--;31--;32--;33--;34--;35--;36--;37--;38--;39--software set INT[0] INT[1] INT[2] INT[3] INT[4] * * * * INT[5] INT[6] INT[7] INT[8] INT[9] INT[A] * * * * INTTA0 : 8bit Timer 0 INTTA1 : 8bit Timer 1 INTTA2 : 8bit Timer 2 INTTA3 : 8bit Timer 3 * * * * INTTB00 :16bit Timer 0 INTTB01 :16bit Timer 0 INTTB10 :16bit Timer 1 INTTB11 :16bit Timer 1 INTTB20 :16bit Timer 2 INTTB21 :16bit Timer 2 INTTN30 :16bit Timer 3 INTTB31 :16bit Timer 3 * * * *
(TB0RG0) (TB0RG1) (TB1RG0) (TB1RG1) (TB2RG0) (TB2RG1) (TB3RG0) (TB3RG1)
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TX1940 Application Note
dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintrxl _mintrxl _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;40--;41--;42--;43--;44--;45--;46--;47--;48--;49--;50--;51--;52--;53--;54--;55--;56--;57--;58--;59--;60--;61--;62--;63--INTTBOF0:16bit Timer 0 (OverFlow) INTTBOF1:16bit Timer 1 (OverFlow) INTTBOF2:16bit Timer 2 (OverFlow) INTTBOF3:16bit Timer 3 (OverFlow) * * * * INTRX0 :Serial receive (Channel 0) INTTX0 :Serial transmit (Channel 0) INTRX1 :Serial receive (Channel 1) INTTX1 :Serial transmit (Channel 1) INTS2 :Serial Channel 2 interrupt * INTRX3 :Serial receive (Channel 3) INTTX3 :Serial transmit (Channel 3) INTRX4 :Serial receive (Channel 4) INTTX4 :Serial transmit (Channel 4) INTRTC :Timer for RTC interrupt INTAD :AD conversion finished INTDMA0:DMA transfer finished (Channel INTDMA1:DMA transfer finished (Channel INTDMA2:DMA transfer finished (Channel INTDMA3:DMA transfer finished (Channel
0) 1) 2) 3)
3-166
TX1940 Application Note
3.5.6.4 Source code
Filename: uart.c
/* ************************************************** ** Application Note ** ** ** ** ( U-art ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 2000/2/3 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" /* Special registers */ #include "led.h" /* Display definitions */ #include "ascii.h" /* ASCII definitions */ #include /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Mode definitions ---*/ #define cmd_uart_open 0 /* #define cmd_uart_input 1 /* #define cmd_uart_output 2 /* /*--- Transmission/Receive definitions ---*/ #define ctx_data_max 32 /* #define crx_data_max 32 /* /*************************************************/ /* External declaration */ /*************************************************/ extern void p7seg_disp(void); extern unsigned char extern unsigned char g7seg_data[4]; gled_data;
Initial Screen Display Mode */ Calculation Data Input Mode */ Calculation Result Output Mode */ Maximum volume of transmission data */ Maximum volume of receive data */
/*************************************************/ /* RAM */ /*************************************************/ unsigned char gmd_uart; /* unsigned char guart_rx_size; /* unsigned char guart_tx_size; /* unsigned char guart_tx_point; /* char guart_rx_data[crx_data_max]; /* char guart_tx_data[ctx_data_max]; /* /*************************************************/
Mode data */ Receive data size */ Transmission data size */ Transmission data position */ Stored receive data */ Stored transmission data */
3-167
TX1940 Application Note
/* CODE */ /*************************************************/ /******************************************************************************/ /* Module name :muart_init */ /******************************************************************************/ /* Function :Initialize PC Communications Mode. */ /* Inputs :None */ /* Outputs :SFR */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ const unsigned char tuart_open[] = { /* Initial screen display data */ cascii_cr,cascii_lf,cascii_lf,'T','B','1','9','4','0',cascii_cr,cascii_lf, 'C','a','l','c','u','l','a','t','o','r',' ','V','e','r','.','1','.','0', cascii_cr,cascii_lf,'>'}; /* TB1940 */ /* Calculator Ver.1.0 */ void muart_init(void){ unsigned char i; /*--- CG settings ---*/ IO_SYSCR1 = 0x10; /*--- I/O port settings ---*/ IO_P0 = 0xff; IO_P0CR = 0xff; IO_P1 IO_P1CR IO_P1FC IO_P2 IO_P2CR IO_P2FC IO_P3 IO_P3CR IO_P3FC IO_P4 IO_P4CR IO_P4FC IO_P7 IO_P7CR IO_P7FC IO_P8 IO_P8CR IO_P8FC IO_P9 IO_P9CR IO_P9FC = 0xff; = 0xff; = 0x00; = 0xff; = 0xff; = 0x00; = 0xff; = 0x00; = 0x00; = 0x1f; = 0x10; = 0x00; = 0x65; = 0x67; = 0x00; = 0xff; = 0xff; = 0x00; = 0x3f; = 0xc8; = 0x08;
/* =0 =1 =0 =00 */
/* Output High on P00-P07 */ /* P00-P07 for output */ /* Output High on P10-P17 */ /* Set P10-P17 for output */ /* Set P10-P17 to be a port */ /* Output High on P20-P27 */ /* Set P20-P27 for output */ /* Set P20-P27 to be a port */ /* Output High on P30-P31 and set P32-P37 to be a port */ /* Set P30-P31 for output and P32-P37 for input */ /* Set P30-P37 to be a port */ /* Set P40-P43 to be a port and output High on P44 */ /* Set P40-P43 for input and P44 for output */ /* Set P40-P44 to be a port */ /* Output High on P70,P72,P75,P76 */ /* Set P70,P71,P72,P75,P76 for output and P73,P74,P77 for input */ /* Set P70-P77 to be a port */ /* Output High on P80-P87 */ /* Set P80-P87 for output */ /* Set P80-P87 to be a port */ /* Output Low on P96-P97 */ /* Set P90-P92,P94-P95 for input and P93,P96-P97 for output */ /* Set P93 to be TXD1 and P94 to be RxD1, and set others to be ports */ /* Output High on PA0-PA4 */ /* Set PA0-PA4 for output and PA5-PA7 for input */ /* Set PA0-PA7 to be a port */
IO_PA IO_PACR IO_PAFC
= 0x1f; = 0x1f; = 0x00;
/*--- Timer settings ---*/
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TX1940 Application Note
IO_TB2RUN IO_TB2FFCR IO_TB2MOD IO_TB2RG1L IO_TB2RG1H IO_IMC8L = 0x00; /* =0 =0 =0 =0 */ = 0xc3; /* =0 =0 =0 */ /* =0 =11 */ = 0x27; /* =1 =00 =1 =11 */ = 0xf4; /* TB2RG1 = 2000 / 4 */ = 0x01; /* */ = 0x3330; /* LEVEL3 */
/*--- UART settings ---*/ IO_SC1MOD0 = 0x09; IO_SC1MOD1 = 0X00; IO_SC1CR = 0x00; IO_BR1CR = 0x1d; IO_IMCCH = 0x3435;
/* /* /* /* /*
=0 =0 =0 =0 =10 =01 */ =0 =0 */ =0 =0 =0 =0 */ 9600bps */ (Receive) LEVEL5 (Transmission) LEVEL4 */
/*--- Data initialization ---*/ g7seg_data[0] = c7seg_c; g7seg_data[1] = c7seg_p; g7seg_data[2] = c7seg_spc; g7seg_data[3] = c7seg_spc; gled_data = cled_all_off; for (i=0 ;i<32 ;i++) { guart_tx_data[i] = tuart_open[i]; guart_tx_size++; } /*--- Timer start ---*/ IO_TB2RUN = 0x05;
/* =0 =0 =1 =1 */
/*--- Transmission start ---*/ guart_tx_point = 1; IO_SC1BUF = guart_tx_data[0]; } /******************************************************************************/ /* Module name :puart_answer */ /******************************************************************************/ /* Function :Generates calculation result */ /* Inputs :None */ /* Outputs :guart_tx_size,guart_tx_point,guart_tx_data,SC1BUF */ /* Parameter :Calculation result */ /* Return value :None */ /******************************************************************************/ void puart_answer(int ldata) { unsigned char ldata_count ,i; unsigned char ldata_work[10]; /*--- Generating new-line data ---*/ guart_tx_size = 0; guart_tx_point = 1; guart_tx_data[guart_tx_size++] = cascii_cr; guart_tx_data[guart_tx_size++] = cascii_lf; /*--- Positive number ---*/ if (ldata >= 0) { for (ldata_count=0 ;ldata_count<10 ;ldata_count++) { ldata_work[ldata_count] = '0' + (ldata % 10); ldata /= 10; if (ldata == 0) break; } } /*--- Negative number ---*/ else { guart_tx_data[guart_tx_size++] = '-'; for (ldata_count=0 ;ldata_count<10 ;ldata_count++) {
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TX1940 Application Note
ldata_work[ldata_count] = '0' - (ldata % 10); ldata /= 10; if (ldata == 0) break; } } /*--- Generating calculation result data ---*/ for (i=0 ;i<(ldata_count+1) ;i++) { guart_tx_data[guart_tx_size++] = ldata_work[ldata_count-i]; } /*--- Generating new-line data ---*/ guart_tx_data[guart_tx_size++] guart_tx_data[guart_tx_size++] guart_tx_data[guart_tx_size++] guart_tx_data[guart_tx_size++] /*--- Start of transmission ---*/ IO_SC1BUF = guart_tx_data[0]; } /******************************************************************************/ /* Module name :puart_error */ /******************************************************************************/ /* Function :Generates error data */ /* Inputs :None */ /* Outputs :guart_tx_data,guart_tx_size,guart_tx_point,SC1BUF */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ const unsigned char tuart_error[] = { cascii_cr,cascii_lf,'E','r','r','o','r', cascii_cr,cascii_lf,cascii_lf,'>'}; void puart_error(void){ unsigned char i; /*--- Generating error data ---*/ guart_tx_size = 0; for (i=0 ;i<11 ;i++) { guart_tx_data[i] = tuart_error[i]; guart_tx_size++; } /*--- Start of transmission ---*/ guart_tx_point = 1; IO_SC1BUF = guart_tx_data[0]; } /******************************************************************************/ /* Module name :puart_cal */ /******************************************************************************/ /* Function :Perform calculation processing */ /* Inputs :guart_rx_data */ /* Outputs :None */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void puart_cal(void) { unsigned int ldata_left, ldata_right, lwork; unsigned char lpoint ,lcal ,fcal_error; int ldata_ans; /*--- Data initialization ---*/
= = = =
cascii_cr; cascii_lf; cascii_lf; '>';
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TX1940 Application Note
lpoint = fcal_error = 0; ldata_left = ldata_right = 0; /*--- Generating left-side data ----*/ lwork = guart_rx_data[lpoint]; /* Read data */ if (lwork>='0' && lwork<='9') { /* Check that data is numeric */ for(;;) { if (lwork>='0' && lwork<='9') { /* Check that data is numeric */ ldata_left = ldata_left*10 + (lwork-'0'); /* Check for overflow */ if (ldata_left > 0x7fffffff) { fcal_error = 1; break; } /* Read next data item */ else lwork = guart_rx_data[++lpoint]; } else break; } } else fcal_error = 1; /*--- Generating operator ---*/ if (fcal_error == 0) { switch (lwork) { case cascii_add: case cascii_sub: case cascii_mul: case cascii_div: lcal = lwork; break; default: fcal_error = 1; break; } lpoint++; }
/* Store operator */
/*--- Generating right-side data ---*/ if (fcal_error == 0) { lwork = guart_rx_data[lpoint]; /* Read data */ if (lwork>='0' && lwork<='9') { /* Check that data is numeric */ for(;;) { if (lwork>='0' && lwork<='9') { /* Check that data is numeric */ ldata_right = ldata_right*10 + (lwork-'0'); /* Check for overflow */ if (ldata_right > 0x7fffffff) { fcal_error = 1; break; } /* Read next data item */ else lwork = guart_rx_data[++lpoint]; } else break; } } else fcal_error = 1; } /*--- Check for end of data ---*/ if (fcal_error == 0) { if (lwork != cascii_cr) fcal_error = 1; } /*--- Calculation ---*/
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TX1940 Application Note
if (fcal_error == 0) { switch (lcal) { case cascii_add: /* Add */ ldata_ans = (int)ldata_left + (int)ldata_right; puart_answer(ldata_ans); /* Generate answer data */ break; case cascii_sub: /* Subtract */ ldata_ans = (int)ldata_left - (int)ldata_right; puart_answer(ldata_ans); /* Generate answer data */ break; case cascii_mul: /* Multiply */ ldata_ans = (int)ldata_left * (int)ldata_right; puart_answer(ldata_ans); /* Generate answer data */ break; case cascii_div: /* Divide */ if (ldata_right != 0) { /* Check whether right side is 0 */ ldata_ans = (int)ldata_left / (int)ldata_right; puart_answer(ldata_ans); /* Generate answer data */ } else puart_error(); /* Generate error data */ break; } } else puart_error(); /* Generate error data */ } /******************************************************************************/ /* Module name :main */ /******************************************************************************/ /* Function :Main processing for PC Communications Mode */ /* Inputs :gmd_uart,guart_tx_point,guart_tx_size,guart_rx_data,guart_rx_size */ /* Outputs :SC1MOD0,gmd_uart,guart_rx_size */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void main(void){ __DI(); muart_init(); __EI(); /****************************************/ /* */ /* Main loop */ /* */ /****************************************/ for(;;){ switch (gmd_uart) { case cmd_uart_open: if (guart_tx_point == guart_tx_size) { /* Check for end of transmission */ IO_SC1MOD0 = 0x29; /* Enable reception */ gmd_uart = cmd_uart_input; } break; case cmd_uart_input: if (guart_rx_data[guart_rx_size-1] == cascii_cr) { /* Check for end of reception */ puart_cal(); /* Perform calculation */ gmd_uart = cmd_uart_output; } break; case cmd_uart_output: if (guart_tx_point == guart_tx_size) { /* Check for end of transmission */ guart_rx_size = 0; /* Initialization */
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TX1940 Application Note
IO_SC1MOD0 = 0x29; gmd_uart = cmd_uart_input; } break; } } } /******************************************************************************/ /* Module name :minttx1 */ /******************************************************************************/ /* Function :Transmits data (using Serial Transmission interrupt) */ /* Inputs :guart_tx_point,guart_tx_size,guart_tx_data */ /* Outputs :SC1BUF,SC1MOD0 */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __interrupt minttx1(void){ IO_INTCLR = 0x33; /* Clear interrupt latch */ /* Enable reception */
switch (gmd_uart) { case cmd_uart_open: case cmd_uart_output: if (guart_tx_point < guart_tx_size) { /* Set transmission data */ IO_SC1BUF = guart_tx_data[guart_tx_point++]; } break; case cmd_uart_input: IO_SC1MOD0 = 0x29; /* Enable reception */ break; } } /******************************************************************************/ /* Module name :mintrx1 */ /******************************************************************************/ /* Function :Receive data (using Serial Receive interrupt) */ /* Inputs :SC1BUF,guart_rx_size,guart_rx_data */ /* Outputs :SC1MOD0,SC1BUF */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void __interrupt mintrx1(void){ unsigned char lrx_data; IO_INTCLR = 0x32; lrx_data = IO_SC1BUF; /* Clear interrupt latch */ /* Read received data */
/*--- Dividing up received data ---*/ switch (lrx_data) { case cascii_0: case cascii_1: case cascii_2: case cascii_3: case cascii_4: case cascii_5: case cascii_6: case cascii_7: case cascii_8: case cascii_9: case cascii_mul: case cascii_add:
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TX1940 Application Note
case cascii_sub: case cascii_div: IO_SC1MOD0 = 0x09; /* Disable reception */ if (guart_rx_size < (crx_data_max-1)) { /* Check amount of received data */ guart_rx_data[guart_rx_size++] = lrx_data; /* Store received data */ } IO_SC1BUF = lrx_data; /* Set transmission data */ break; case cascii_cr: IO_SC1MOD0 = 0x09; /* Disable reception */ guart_rx_data[guart_rx_size++] = cascii_cr; /* Store received data */ break; } } /******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/ /* Function :2-ms Interval Timer interrupt */ /* Inputs :None */ /* Outputs :None */ /******************************************************************************/ void __interrupt minttb21(void){ IO_INTCLR = 0x21; p7seg_disp(); } /* Clear interrupt latch */
Filename: func_uart.c
/* ************************************************** ** Application Note ** ** ** ** ( URAT FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** T0 = 8MHz ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATIO * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header file */ /*************************************************/ #include "io1940.h" /*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Port output definitions (for 7-segment LED digits) ---*/
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TX1940 Application Note
#define #define #define #define #define c7seg_digit_out0 c7seg_digit_out1 c7seg_digit_out2 c7seg_digit_out3 c7seg_digit_out4 0x1e 0x1d 0x1b 0x17 0x0f /* /* /* /* /* PA PA PA PA PA (00011110) (00011101) (00011011) (00010111) (00001111) */ */ */ */ */
/*************************************************/ /* RAM */ /*************************************************/ unsigned char g7seg_data[4]; /* 7-segment LED display data */ unsigned char gled_data; /* LED display data */ /*************************************************/ /* CODE */ /*************************************************/ /******************************************************************************/ /* Module name :p7seg_disp */ /******************************************************************************/ /* Function :7-segment LED display output (using 2-ms interrupt) */ /* Inputs :gled_data,g7seg_data */ /* Outputs :P8,PA */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void p7seg_disp(void){ static unsigned char ldisp_digit = 0; /*--- Turning display off ---*/ IO_P8 = 0xff; /*--- Display output ---*/ switch (ldisp_digit) { case 0: IO_PA = c7seg_digit_out0; IO_P8 = gled_data; break; case 1: IO_PA = c7seg_digit_out1; IO_P8 = g7seg_data[0]; break; case 2: IO_PA = c7seg_digit_out2; IO_P8 = g7seg_data[1]; break; case 3: IO_PA = c7seg_digit_out3; IO_P8 = g7seg_data[2]; break; case 4: IO_PA = c7seg_digit_out4; IO_P8 = g7seg_data[3]; break; } /*--- Digit count ---*/ ldisp_digit++; if (ldisp_digit > 4) ldisp_digit = 0; }
/* Digit output */ /* LED output */
/* Digit output */ /* 7-segment LED output */
/* Digit output */ /* 7-segment LED output */
/* Digit output */ /* 7-segment LED output */
/* Digit output */ /* 7-segment LED output */
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TX1940 Application Note Filename: led.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( LED HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*** 7-segment LED definitions ***/ #define c7seg_0 #define c7seg_1 #define c7seg_2 #define c7seg_3 #define c7seg_4 #define c7seg_5 #define c7seg_6 #define c7seg_7 #define c7seg_8 #define c7seg_9 #define c7seg_a #define c7seg_b #define c7seg_c #define c7seg_d #define c7seg_e #define c7seg_f #define c7seg_p #define c7seg_spc /*** LED definitions ***/ #define cled_all_on #define cled_all_off
0xc0 0xf9 0xa4 0xb0 0x99 0x92 0x82 0xd8 0x80 0x98 0x88 0x83 0xc6 0xa1 0x86 0x8e 0x8c 0xff
/* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /* /*
0 */ 1 */ 2 */ 3 */ 4 */ 5 */ 6 */ 7 */ 8 */ 9 */ A */ B */ C */ D */ E */ F */ P */ Blank */
0x00 0xff
/* Turn all LEDs ON */ /* Turn all LEDs OFF */
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TX1940 Application Note Filename: ascii.h
/* ************************************************** ** TOSHIBA CORPORATION ** ** ** ** ( ASCII HEADER ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** 1999/9/20 ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*** ASCII code definitions ***/ #define cascii_0 #define cascii_1 #define cascii_2 #define cascii_3 #define cascii_4 #define cascii_5 #define cascii_6 #define cascii_7 #define cascii_8 #define cascii_9 #define cascii_mul #define cascii_add #define cascii_sub #define cascii_div #define cascii_cr #define cascii_lf
0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x2a 0x2b 0x2d 0x2f 0x0d 0x0a
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TX1940 Application Note
3
3.6
Processing Analog Inputs
This feature allows the change of the microphone output voltage level and the photo-interrupter output voltage level to be displayed.
3.6.1
3.6.1.1
Functional specifications
How to use this feature
Connect a microphone to the MIC terminal of the TB1940 and talk into it. The volume level corresponding to the input voltage is displayed on the 7-segment LEDs as a series of 0s. The higher the level, the more zeroes are displayed. In the same way, the amount of light from the photo-interrupter on the TB1940 which impinges on the photodetector is displayed on the 7-segment LEDs as a series of 0s. Partially blocking the gap in the photo-interrupter causes the amount of light hitting the photodetector to decrease. This in turn causes some of the LEDs to turn off.
3.6.1.2 Basic specifications
Microphone * * A microphone is connected to the MIC terminal. The output level for the microphone is represented by the number of 0s displayed on the 7-segment LEDs. The correspondence between the microphone output level and the 7-segment LED display is shown in Table 3.6.1. The microphone output is amplified by the microphone amp IC on the TB1940 before being fed to the AN0 input on the TX1940. The AN0 input is converted into a digital signal by the AD converter. Photo-interrupter * Partially blocking the gap in the photo-interrupter reduces the amount of light propagating from the light-emitting part to the light-receiving part, thus reducing the photodetector's output level. The correspondence between the photo-interrupter's output voltage level and the number of LEDs which are lit is shown in Table 3.6.2. The photo-interrupter output is connected to the AN1 input on the TX1940. The AN1 input value is converted into a digital signal by the AD converter.
Table 3.6.1 7-segment LED display output
Vdd = 3.3 V
*
* *
Microphone Amp IC Output Voltage Range [V]
(5/10)Vdd < V (6/10)*Vdd (6/10)*Vdd < V (7/10)*Vdd (7/10)*Vdd < V (8/10)*Vdd (8/10)*Vdd < V (9/10)*Vdd (9/10)*Vdd < V Vdd V: Microphone amp IC output voltage. [ ]: No segments are turned on. [0]: Segments display 0.
7-Segment LED Display Output
[ ][ ][ ][ ] [0] [ ] [ ] [ ] [0] [0] [ ] [ ] [0] [0] [0] [ ] [0] [0] [0] [0]
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TX1940 Application Note
Table 3.6.2 LED turn-on conditions
Vdd = 3.3 V
Photo-interrupter Output Voltage Range [V]
0 V (1/9)*Vdd (1/9)*Vdd < V (2/9)*Vdd (2/9)*Vdd < V (3/9)*Vdd (3/9)*Vdd < V (4/9)*Vdd (4/9)*Vdd < V (5/9)*Vdd (5/9)*Vdd < V (6/9)*Vdd (6/9)*Vdd < V (7/9)*Vdd (7/9)*Vdd < V (8/9)*Vdd (8/9)*Vdd < V Vdd V : Photo-interrupter output voltage; q: LED turned on
LED State
q qq qqq qqqq qqqqq qqqqqq qqqqqqq qqqqqqqq
: LED turned off
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TX1940 Application Note 3.6.2 Functional block diagram The functional blocks used by this sample program are shown in Figure 3.6.1.
TX1940FDBF
P87-80 7SEG-LED
3.6.3 7-segment LED display output control LED PA4-PA0
AN0
MIC-AMP (TA2011S)
MIC input
3.6.4 Processing of microphone and photo-interrupter input data
AN1
Photosensor (TLP862)
8-Bit Timer TMRA2 16-Bit Timer TMRB2
3.6.5 Control of 1-ms Interval Timer <8-Bit Timer feature (TMRA)>
3.6.6 Control of 2-ms Interval Timer <16-Bit Timer feature (TMRB)>
Figure 3.6.1 Functional block diagram of analog input-processing section
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TX1940 Application Note 3.6.3
3.6.3.1
Control of 7-segment LED display output
Overview of 7-segment LED display
*
The display data is dynamically displayed on the 7-segment LEDs and updated every 2 ms.
LED Digit 0 (PA0) (Data 0)
(Data 4)
(Data 3)
(Data 2)
(Data 1)
7SEG-LED
Segments (P80~P87)
Digit 1 (PA1) Digit 2 (PA2) Digit 3 (PA3) Digit 4 (PA4)
Figure 3.6.2 Correspondence between digits and segments
*
Segments (P80~P87)
Figure 3.6.3 shows the timing for the digit and segment outputs.
Data 0
Data 1
Data 2
Data 3
Data 4
Digit 0 (PA0)
Digit 1 (PA1)
Digit 2 (PA2)
Digit 3 (PA3)
Digit 4 (PA4) 2 ms Note: The segment and digit outputs are all active-Low.
Figure 3.6.3 Timing of display digit update
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TX1940 Application Note * To light any given display segment, output a Low signal on the corresponding ports. The correspondence between display segments and port outputs is shown in Table 3.6.3.
A F G E D 7SEG-LED C Dp Dp G F E D LED C B A B
Table 3.6.3 Correspondence between display segments and port outputs
P87(Dp) 0 1 2 3 4 5 6 7 8 9 A B C D E F Blank * * * * * * * * * * * * * * * * 1 P86(G) 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 P85(F) 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 P84(E) 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 1 P83(D) 0 1 0 0 1 0 0 1 0 1 1 0 0 0 0 1 1 P82(C) 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1 P81(B) 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 1 P80(A) 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 1
Note 1: All segment outputs are active-Low. Note 2: Set port output * to 0 to display Dp and to 1 to turn Dp off.
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TX1940 Application Note
3.6.3.2 Control method for 7-segment LED display
Initial settings
P8 P8CR P8FC PA PACR PAFC 7 1 1 0 6 1 1 0 -5 1 1 0 4 1 1 0 1 1 0 3 1 1 0 1 1 0 2 1 1 0 1 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 Set P80~P87 output latches to 1. Set P80~P87 for output. Set P80~P87 to be port. Set PA0~PA4 output latches to 1. Set PA0~PA4 for output. Set PA0~PA4 to be port.
Note: X denotes Don't care; "-" denotes No change.
Processing of the display output Create the display data in the main routine and output display data for each digit to the ports within a 2-ms Interval Timer interrupt. For details of the 2-ms interval timer, please refer to Section 3.6.6. The brightness of the 7-segment and indicator LEDs can be adjusted by changing the time at which display data is output to the ports. The display output control flow is shown in Figure 3.6.4.
INTTB21 INTCLR 0x21
Clears INTC block interrupt requests.
Stop digit output for PA
Turns display off.
Output segment to P8
Output digit to PA
Turns display on.
Modify digit counter
End of interrupt
Figure 3.6.4 Display output control flow
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TX1940 Application Note 3.6.4
3.6.4.1
Processing of microphone and photo-interrupter input data
Overview of photo-interrupter and microphone output data display processing
* * *
The output stage of the microphone amp IC is connected to the AN0 terminal and the photo-interrupter output is connected to the AN1 terminal. AD conversion is performed in Channel Scan Single-Conversion Mode. AD conversion is performed every 1 ms. For details of the setting method of the 1-ms Interval Timer, please refer to Section 3.6.5.
3.6.4.2
Analog data control method
Initial settings
Settings made in the main routine 765432 ADCCLK XXXXXX ADMOD0 XX0000 ADMOD1 1 -XX00 IMC8L XX1101 0 1 0 1 1 Highorder X X X X X X X X Loworder 1 0 1 0 0
Set AD conversion time to 10.75 s (when fsys = 32 MHz). Select Channel Scan Mode. Apply Vref, disable external trigger, scan (AN0 AN1). Set for rising edge and set interrupt level to 5. Set the interrupt level to any desired value.
Note 1: X denotes Don't care. Note 2: The interrupt level can be set to any desired value. Settings made by 2-ms Interval interrupt 76543210 ADMOD0 X X 0 0 0 0 1 1 Note: X denotes Don't care.
Start conversion in Channel Scan Single-Conversion Mode.
Latching AD-converted data * * AD Conversion-Finished interrupt processing consists of writing data from the AD Conversion Result Register to memory. Figure 3.6.5 shows the flow of control for when AD-converted data is latched into memory.
INTAD INTCLR 0x3b Read ADREG04H and ADREG04L
Process microphone IC output value Body of the handler routine
Read ADREG15H and ADREG15L
Process photo-interrupter output value
End of interrupt
Figure 3.6.5 Flow of control for INTAD interrupt
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TX1940 Application Note Method for calculating the average of the AD-converted values * * INTAD interrupt processing consists of calculating the average of the AD conversion results in software. The maximum AD conversion value from the preceding 32 data entries is taken as the microphone amp IC output value and is displayed on the 7-segment LEDs.Figure 3.6.6 shows how the maximum value is derived. Figure 3.6.7 shows the flow of control. The average AD conversion value of the preceding eight entries of data is taken as the photo-interrupter output value and is displayed on the 7-segment LEDs. Figure 3.6.8 shows how the maximum value is derived. Figure 3.6.9 shows the flow of control. The microphone output is converted into one of five value levels which is then represented on the 7-segment LEDs using the corresponding number of 0s. (See Table 3.6.1 for 7-segment LED displays.) The photo-interrupter output is converted into one of nine value levels which is then represented on the 7-segment LEDs using the corresponding number of 0s. (See Figure 3.6.2 for 7-segment LED displays.)
* *
*
*
INTAD interrupt count AD-converted values
1st
2nd
3rd
31st
32nd
33rd
34th
35th
Interval A Interval B Interval C
Maximum value in interval A Maximum value in interval B Maximum value in interval C
Average of AD-converted values
1 ms : Undefined
Figure 3.6.6 Calculation method for maximum value of microphone IC output
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TX1940 Application Note
Microphone output level processing
buffer [index] AD-converted values
index++
Calculate maximum value in buffer Set Maximum Value flag
End
Figure 3.6.7 Flow of control for calculation of microphone IC output display value
INTAD interrupt count AD-converted values
1st
2nd
3rd
8th
9th
10th
11th
Interval A Interval B Interval C
Average value in interval A Average value in interval B Average value in interval C
Average of ADconverted values
1 ms : Undefined
Figure 3.6.8 Derivation method for average value of photo-interrupter output
Photo interrupter output level processing
buffer [index] AD-converted values Calculate an average buffer value
index++
Set Average Value Setup flag.
End
Figure 3.6.9 Photo-interrupter output value display processing
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TX1940 Application Note 3.6.5
3.6.5.1
Control of 1-ms Interval Timer <8-Bit Timer feature (TMRA)>
Overview of the 1-ms Interval Timer
* *
3.6.5.2
Using the 8-Bit Timer feature (TMRA), generate an interrupt every 1 ms. Set the time interval at which to generate INTTA2 in the timer register TA2REG.
Control method for the 1-ms Interval Timer
Initial settings
TA23RUN TA23MOD TA2REG INTCLR=22 IMC5H 76543210 -XXX- -X0 00XXXX11 125 Stop TMRA2 and clear it to 0. Select 8-Bit Timer and T16 (4.0 s). TA2RUN = 1000 / 4
TA2RUN
X X 1 1 0 1 1 0 High- Set for rising edge and set interrupt level to 6. order X X X X X X X X Loworder 00XX-1X1 Start TMRB0.
Note: The interrupt level can be set to any desired value.
Interrupt processing
INTTA1 INTCLR 0x16
Clear INTC Block interrupt requests.
Body of the handler routine
End
Figure 3.6.10 Flow of control for INTTA2 interrupt
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TX1940 Application Note 3.6.6
3.6.6.1
Control of 2-ms Interval Timer <16-Bit Timer feature (TMRB)>
Overview of the 2-ms Interval Timer
* *
Using the 16-Bit Timer feature (TMRB), generate an interrupt every 2 ms. Set the time interval at which to generate INTTB21 in the timer register TB2RG1. Timer Register calculation The prescaler output resolutions needed for calculation are shown in Table 3.6.4.
Table 3.6.4 Prescaler output clock resolution
@fc = 32 MHz
Peripheral Clock Selection
Clock Gear Value
Selection of Prescaler Clock 00 (fperiph/4)
3
Resolution of Prescaler Output Clock T1 fc/2 (0.25 s) fc/22 (0.125 s) fc/24 (0.5 s) fc/2 (0.25 s)
3 5
T4 fc/2 (1.0 s) fc/24 (0.5 s) fc/2 (0.25 s)
3
T16 fc/2 (4.0 s)
7
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/26 (2.0 s) fc/25 (1.0 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/210 (32 s) fc/29 (16 s) fc/28 (8.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s)
fc/26 (2.0 s) fc/2 (1.0 s)
5 4
01 (fc/2) 0 (gear) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/25 (1.0 s) fc/24 (0.5 s) fc/2 (2.0 s)
6
fc/2 (0.5 s) fc/27 (4.0 s) fc/26 (2.0 s) fc/25 (1.0 s) fc/2 (8.0 s)
8 7
11 (fc/8)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (1.0 s)
5
fc/2 (4.0 s) fc/26 (2.0 s) fc/2 (1.0 s)
5 4
fc/2 (0.25 s)
3
00 (fc)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.125 s)
2
fc/2 (0.5 s) fc/2 (0.25 s)
3
fc/23 (0.25 s)
fc/25 (1.0 s) fc/2 (0.5 s)
4
01 (fc/2) 1 (fc) 10 (fc/4)
01 (fperiph/2) 10 (fperiph) 00 (fperiph/4) 01 (fperiph/2) 10 (fperiph) 00 (fperiph/4)
fc/2 (0.25 s)
3
fc/25 (1.0 s) fc/24 (0.5 s) fc/2 (1.0 s)
5
11 (fc/8)
01 (fperiph/2) 10 (fperiph)

Note 1: Note 2: Note 3:
The prescaler's output clock Tn must be selected such that the relationship Tn < fsys/2 is satisfied (i.e. Tn must be slower than fsys/2). Do not change the clock gear value while the timer is operating. The dash character, --, in the table indicates a prohibited setting.
For T1 (fc/23) 2000 s / 0.25 s = 8000 (1F40H) Set TB2RG1L to 00H and TB2RG1H to 1FH. For T4 (fc/25) 2000 s / 1.0 s = 2000 (07D0H) Set TB2RG1L to D0H and TB2RG1H to 07H.
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TX1940 Application Note For T16 (fc/27) 2000 s / 4.0 s = 500 (01F4H) Set TB2RG1L to F4H and TB2RG1H to 01H.
3.6.6.2 Control method for the 2-ms Interval Timer
Initial settings
TB2RUN TB2FFCR TB2MOD TB2RG1L TB2RG1H IMC8L TB2RUN 765 00X 110 001 111 000 XXXX1 00X 4 X 0 0 1 0 1 X 3 0 0 0 0 0 0 0 2 0 0 1 1 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 0 1 1 1 Stop TMRB2. Disable trigger. Select prescaler output clock as input clock and disable capture function. Set interval time. Set TB2RG1 to 2000 s/ T16 = 500. L H Set INTTB21 for rising edge and to level 4. Start TMRB2.
Note 1: X denotes Don't care; "-" denotes No change. Note 2: The interrupt level can be set to any desired value.
Interrupt processing
INTTB21 INTCLR 0x21
Clear INTC Block interrupt requests.
Body of the handler routine
End
Figure 3.6.11 Flow of control for INTTB21 interrupt
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TX1940 Application Note 3.6.7
3.6.7.1
Sample programs
Generic flowchart
Main processing Disable interrupts Initialize SFR Enable interrupts
No
AN data changed? Yes Update 7-segment display data Process microphone data Update 7-segment display Process photo data Clear Data Update flag. Interrupt done INTAD
Figure 3.6.12 Main processing
Figure 3.6.13 INTAD interrupt processing
INTTA2 Start AD conversion Interrupt done
INTTB21 7-segment LED display Interrupt done
Figure 3.6.14 INTTA2 interrupt processing
Figure 3.6.15 INTTB21 interrupt processing
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TX1940 Application Note
3.6.7.2 File configuration
Table 3.6.5 lists the files used in the sample programs.
Table 3.6.5 File configuration Filename
Stc9i16_anlg.asm io1940.c analog_proc.c intrpt_analog.c func_analog.c io1940.h ram_analog.h Start-up routine Special function register definitions Main photo- and mike-processing section Interrupt-processing section Section for individual functions Special function register declarations External variable declarations
Contents
Page References
3-12 3-51 3-193 3-196 3-197 3-28 3-200
3.6.7.3
Vector table
The vector table used in the sample programs is shown below. Replace the vector table section in the start-up routine with the vector table given below. Interrupt vector table
_VecTable: dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw
_Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintta2 _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _minttb21 _Int_dummy _Int_dummy _Int_dummy _Int_dummy
;0 --;1 --;2 --;3 --;4 --;5 --;6 --;7 --;8 --;9 --;10--;11--;12--;13--;14--;15--;16--;17--;18--;19--;20--;21--;22--;23--;24--;25--;26--;27--;28--;29--;30--;31--;32--;33--;34--;35--;36--;37---
software set INT[0] INT[1] INT[2] INT[3] INT[4] * * * * INT[5] INT[6] INT[7] INT[8] INT[9] INT[A] * * * * INTTA0 : 8bit Timer 0 INTTA1 : 8bit Timer 1 INTTA2 : 8bit Timer 2 INTTA3 : 8bit Timer 3 * * * * INTTB00 :16bit Timer 0 INTTB01 :16bit Timer 0 INTTB10 :16bit Timer 1 INTTB11 :16bit Timer 1 INTTB20 :16bit Timer 2 INTTB21 :16bit Timer 2 INTTN30 :16bit Timer 3 INTTB31 :16bit Timer 3 * *
(TB0RG0) (TB0RG1) (TB1RG0) (TB1RG1) (TB2RG0) (TB2RG1) (TB3RG0) (TB3RG1)
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TX1940 Application Note
dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw dw _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _Int_dummy _mintad _Int_dummy _Int_dummy _Int_dummy _Int_dummy ;38--;39--;40--;41--;42--;43--;44--;45--;46--;47--;48--;49--;50--;51--;52--;53--;54--;55--;56--;57--;58--;59--;60--;61--;62--;63--* * INTTBOF0:16bit Timer 0 (OverFlow) INTTBOF1:16bit Timer 1 (OverFlow) INTTBOF2:16bit Timer 2 (OverFlow) INTTBOF3:16bit Timer 3 (OverFlow) * * * * INTRX0 :Serial receive (Channel 0) INTTX0 :Serial transmit (Channel 0) INTRX1 :Serial receive (Channel 1) INTTX1 :Serial transmit (Channel 1) INTS2 :Serial Channel 2 interrupt * INTRX3 :Serial receive (Channel 3) INTTX3 :Serial transmit (Channel 3) INTRX4 :Serial receive (Channel 4) INTTX4 :Serial transmit (Channel 4) INTRTC :Timer for RTC interrupt INTAD :AD conversion finished INTDMA0:DMA transfer finished (Channel INTDMA1:DMA transfer finished (Channel INTDMA2:DMA transfer finished (Channel INTDMA3:DMA transfer finished (Channel
0) 1) 2) 3)
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TX1940 Application Note
3.6.7.4 Source code
Filename: analog_proc.c
/* ************************************************** ** Application Note ** ** ** ** ( MAIN ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/
/*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" #include "ram_analog.h" #include
/******************************************************************************/ /* Module name : */ /******************************************************************************/ /* Function :Initializes photo-interrupter and microphone processing */ /* Inputs : */ /* Outputs : */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void manalog_init(void){ /*--- CG settings ---*/ IO_SYSCR0 = 0xf0; /* =1 =1 =1 =1 */ /* =0 =0 =00 */ IO_SYSCR1 = 0x10; /* =0 =1 =0 =0 */ IO_ADCCLK = 0x01; /* =01 */ /*--- I/O port settings ---*/ IO_P4 = 0x10; IO_P4CR = 0x1f; IO_P4FC = 0x0f; IO_P7 IO_P7CR IO_P7FC IO_P8 IO_P8CR IO_P8FC IO_P9CR = 0x6d; = 0x6f; = 0x00; = 0xff; = 0xff; = 0x00; = 0xc9;
/* Output High on P44 */ /* Set P44-P40 for output */ /* Set P43-P40 to be *CS */ /* Output High on P76,P75,P73,P72,P70 */ /* Set P76,P75,P74,P73,P72,P71,P70 for output and P77,P74 for input */ /* Set P77-P70 to be a port */ /* Output High on P87-P80 */ /* Set P87-P80 for output */ /* Set P87-P80 to be a port */ /* Set P97,P96,P93,P90 for output and P95,P94,P92,P91
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TX1940 Application Note
IO_P9FC = 0x09; for input */ /* Set P93 to be TXD1, P90 to be TXD0 and others to be ports */ /* Output High on PA4-PA0 */ /* Set PA5-PA0 for output and PA7-PA6 for input */ /* Set PA7-PA0 to be a port*/
IO_PA IO_PACR IO_PAFC
= 0x1f; = 0x3f; = 0x00;
/*--- AD conversion settings ---*/ IO_ADMOD0 = 0x02; IO_ADMOD1 = 0x81; IO_IMCEH = 0x3530;
/* =0 =0 =1 =0 */ /* =1 <12AD>=0 =0 =001 */ /* Rising edge, interrupt level 5 */
/*--- 1-ms Interval Timer settings ---*/ /* TMRA2 */ IO_TA23RUN = 0x00; /* =0 =0 =0 =0 =0 */ IO_TA23MOD = 0x03; /* =00 =00 =11 */ IO_TA2REG = 250; /* TA2REG = 1000/4 */ IO_IMC5H = 0x3036; /* Rising edge, interrupt level 6 */ /*--- 2-ms Interval Timer settings ---*/ /* TMRB2 */ IO_TB2RUN = 0x00; /* =0 =0 =0 =0 */ IO_TB2FFCR = 0xc3; /* =0 =0 =0 */ /* =0 =11 */ IO_TB2MOD = 0x27; /* =1 =00 =1 =11 */ /* T16=4.0usec*/ IO_TB2RG1L = 0xf4; /* TB2RG1 = 2000/4 */ IO_TB2RG1H = 0x01; /* */ IO_IMC8L = 0x3430; /* Rising edge, interrupt level 4 */ /*--- Timer start ---*/ IO_TA23RUN = 0x05; IO_TB2RUN } = 0x05;
/* =0 =0 =1 =0 =1 */ /* =0 =0 =1 =1 */
/******************************************************************************/ /* Module name :main */ /******************************************************************************/ /* Function :Main processing */ /* Inputs :fmic_disp,gmaxbuffer,fphoto_disp,gphoto_ave */ /* Outputs :fmic_disp,gphoto_level,gled_data,fphoto_disp */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void main(void){ __DI(); /*--- Initializing SFR ---*/ manalog_init(); __EI(); for(;;){ /*--- 7SEG-LED display data (microphone output level) change ---*/ switch(fan_data){ case 0: break; case 1: if(gmaxbuffer <= Vref && gmaxbuffer >= c90_per){ g7seg_data[3] = c7seg_0; g7seg_data[2] = c7seg_0;
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TX1940 Application Note
g7seg_data[1] = c7seg_0; g7seg_data[0] = c7seg_0; } else if(gmaxbuffer < c90_per && gmaxbuffer >= c80_per){ g7seg_data[3] = c7seg_0; g7seg_data[2] = c7seg_0; g7seg_data[1] = c7seg_0; g7seg_data[0] = c7seg_all_clear; } else if(gmaxbuffer < c80_per && gmaxbuffer >= c70_per){ g7seg_data[3] = c7seg_0; g7seg_data[2] = c7seg_0; g7seg_data[1] = c7seg_all_clear; g7seg_data[0] = c7seg_all_clear; } else if(gmaxbuffer < c70_per && gmaxbuffer >= c60_per){ g7seg_data[3] = c7seg_0; g7seg_data[2] = c7seg_all_clear; g7seg_data[1] = c7seg_all_clear; g7seg_data[0] = c7seg_all_clear; } else if(gmaxbuffer < c60_per && gmaxbuffer >= c50_per){ g7seg_data[3] = c7seg_all_clear; g7seg_data[2] = c7seg_all_clear; g7seg_data[1] = c7seg_all_clear; g7seg_data[0] = c7seg_all_clear; } /*--- 7SEG-LED display data (photo-interrupter output level) change ---*/ if(gphoto_ave<=1023 && gphoto_ave>= 911) gphoto_level=8; else if(gphoto_ave <= 910 && gphoto_ave >= 797) gphoto_level=7; else if(gphoto_ave <= 796 && gphoto_ave >= 683) gphoto_level=6; else if(gphoto_ave <= 682 && gphoto_ave >= 570) gphoto_level=5; else if(gphoto_ave <= 569 && gphoto_ave >= 456) gphoto_level=4; else if(gphoto_ave <= 455 && gphoto_ave >= 342) gphoto_level=3; else if(gphoto_ave <= 341 && gphoto_ave >= 279) gphoto_level=2; else if(gphoto_ave <= 278 && gphoto_ave >= 116) gphoto_level=1; else if(gphoto_ave <= 114 && gphoto_ave >= 000) gphoto_level=0; gled_data = tled_ch[gphoto_level]; /*--- Clear analog data change flag ---*/ fan_data = 0; break; } } }
3-195
TX1940 Application Note Filename: intrpt_analog.c
/* ************************************************** ** Application Note ** ** ** ** ( INTERRUPT ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/
/*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" #include "ram_analog.h"
/*************************************************/ /* External variable declarations */ /*************************************************/ unsigned short gad0_data,gad1_data; /* AD conversion result (Ch.0,Ch1) */ volatile unsigned char fan_data = 1; /* AN Data Change flag */ /******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/ /* Function :AD Conversion-Finished interrupt (interrupt) */ /* Inputs :ADREG04H,ADREG04L,ADREG15H,ADREG15L */ /* Outputs :INTCLR,gad0_data,gad1_data */ /******************************************************************************/ void __interrupt mintad(void){ IO_INTCLR = 0x3b; /* Clear interrupt latch */
/*--- AN0 (microphone IC output) processing ---*/ gad0_data = (IO_ADREG04H<<2)+(IO_ADREG04L>>6); mmic_proc(); /*--- AN1 (photo-interrupter output) processing ---*/ gad1_data = (IO_ADREG15H<<2)+(IO_ADREG15L>>6); mphoto_proc(); /*--- Set Analog Data Change flag ---*/ fan_data = 1; }
/******************************************************************************/ /* Module name :mintta2 */ /******************************************************************************/ /* Function :1-ms Interval Timer (interrupt) */ /* Inputs :None */ /* Outputs :INTCLR,ADMOD0 */
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TX1940 Application Note
/******************************************************************************/ void __interrupt mintta2(void){ IO_INTCLR = 0x16; IO_ADMOD0 = 0x03; } /******************************************************************************/ /* Module name :minttb21 */ /******************************************************************************/ /* Function :2-ms Interval Timer (interrupt) */ /* Inputs :None */ /* utputs :INTCLR */ /******************************************************************************/ void __interrupt minttb21(void){ IO_INTCLR = 0x21; p7seg_disp(); } /* Clear interrupt latch */ /* Clear interrupt latch */
Filename: func_analog.c
/* ************************************************** ** Application Note ** ** ** ** ( FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/ /*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" #include "ram_analog.h"
/*************************************************/ /* Constant definitions */ /*************************************************/ /*--- Definitions of port output (7SEG-LED digit) ---*/ #define c7seg_digit_out0 0x1e /* PA (00011110) */ #define c7seg_digit_out1 0x1d /* PA (00011101) */ #define c7seg_digit_out2 0x1b /* PA (00011011) */ #define c7seg_digit_out3 0x17 /* PA (00010111) */ #define c7seg_digit_out4 0x0f /* PA (00001111) */ /*--- Number of analog data storage buffers ---*/ #define LIMITM 32 /* Number of microphone output values stored */ #define LIMITP 8 /* photo-interrupter Number of photo interrupt output values stored */
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TX1940 Application Note
#define #define #define digit(pos) nextm(pos) nextp(pos) ((pos+1)%5) ((pos+1)%LIMITM) ((pos+1)%LIMITP)
/*************************************************/ /* External variable declarations */ /*************************************************/ unsigned char g7seg_data[4]; /* unsigned char gled_data; /* unsigned short gmaxbuffer = 0; /* unsigned short gphoto_ave; /* unsigned char gphoto_level; /*
7SEG-LED display data */ LED display data */ Maximum microphone output value */ photo-interrupter average data */ photo-interrupter display level data */
/******************************************************************************/ /* Module name :p7seg_disp */ /******************************************************************************/ /* Function :7-segment LED display output (using 2-ms Interval Timer interrupt)*/ /* Inputs :gled_data,g7seg_data */ /* Outputs :P8,PA */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void p7seg_disp(void){ static unsigned char ldisp_digit = 0; /*** Turning display off ***/ IO_P8 = 0xff; /*** Display output ***/ switch (ldisp_digit) { case 0: IO_PA = c7seg_digit_out0; IO_P8 = gled_data; break; case 1: IO_PA = c7seg_digit_out1; IO_P8 = g7seg_data[0]; break; case 2: IO_PA = c7seg_digit_out2; IO_P8 = g7seg_data[1]; break; case 3: IO_PA = c7seg_digit_out3; IO_P8 = g7seg_data[2]; break; case 4: IO_PA = c7seg_digit_out4; IO_P8 = g7seg_data[3]; break; } /*** Counting digits ***/ ldisp_digit = digit(ldisp_digit); } /************************************************/ /* Display data table */ /************************************************/ const unsigned char tled_ch[] = { 0xff,0x7f,0x3f,0x1f,0x0f,0x07,0x03,0x01,0x00 };
/* Update digits */ /* Output on 7-segment display */
/* Update digits */ /* Output on 7-segment display */
/* Update digits */ /* Output on 7-segment display */
/* Update digits */ /* Output on 7-segment display */
/* Update digits */ /* Output on 7-segment display */
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TX1940 Application Note
/******************************************************************************/ /* Module name :mmic_proc */ /******************************************************************************/ /* Function :Processes microphone output signal */ /* Inputs :gad0_data */ /* Outputs :gmaxbuffer,fmic_disp */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mmic_proc(void){ static unsigned char static unsigned short index = 0,i = 0; buffer[LIMITM];
/*--- Allocating area for microphone output data in buffer ---*/ buffer[index] = gad0_data; index = nextm(index); /* Increment array index */ /*--- Allocating area for maximum value in buffer ---*/ gmaxbuffer = 0; for(i=0;i/******************************************************************************/ /* Module name :mphoto_proc */ /******************************************************************************/ /* Function :Processes photo-interrupter output signal */ /* Inputs :gad1_data */ /* Outputs :gphoto_ave,fphoto_disp */ /* Parameters :None */ /* Return value :None */ /******************************************************************************/ void mphoto_proc(void){ static unsigned int static unsigned char static unsigned short sum = 0; index = 0; buffer[LIMITP];
/*--- Allocating area for photo-interrupter output data in buffer ---*/ sum -= buffer[index]; buffer[index] = gad1_data; /* Allocate area for current microphone output value */ sum += buffer[index]; /*--- Storing average ---*/ gphoto_ave = sum>>3; /*--- Increment array index ---*/ index = nextp(index); }
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TX1940 Application Note Filename: ram_analog.h
/*--- Declarations of external variables ---*/ extern unsigned char g7seg_data[4]; extern unsigned char gled_data; extern unsigned short gad0_data; volatile extern unsigned char fan_data; extern unsigned short gad1_data; extern unsigned short gmaxbuffer; extern unsigned short gphoto_ave; extern unsigned char gphoto_level;
/*--- Constant definitions ---*/ /* Microphone output ranges */ #define Vref #define c50_per #define c60_per #define c70_per #define c80_per #define c90_per /* 7SEG-LED data table */ #define c7seg_0 #define c7seg_all_clear /*--- CONST constant ---*/ extern const unsigned char
1023 5*Vref/10 6*Vref/10 7*Vref/10 8*Vref/10 9*Vref/10 0xc0 0xff
tled_ch[];
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TX1940 Application Note
3
3.7
3.7.1
3.7.1.1
Other Facilities
Watchdog Timer feature
Overview of the Watchdog Timer
The Watchdog Timer is used for detecting CPU runaway. If the CPU starts operating erratically for some reason, e.g. because of noise, the Watchdog Timer detects the erroneous condition and generates a non-maskable interrupt, notifying the CPU of the runaway condition and instructing it to return to its normal state. The Watchdog Timer can also be connected to the chip's internal reset input, enabling the processor to be reset automatically when runaway occurs. Setting the Watchdog Timer detection time
Table 3.7.1 Watchdog Timer detection time
System Clock Selection 1 (fs) SYSCR1 Clock Gear Value xxx 00 (fc) 0 (gear) 01 (fc/2) 10 (fc/4) 11 (fc/8) @ fc = 32 MHz, fs = 32.768 kHz Watchdog Timer Detection Time 00 216/fSYS 2.0 s 2.048 ms 4.096 ms 8.192 ms 16.384 ms WDMOD 01 10 218/fSYS 220/fSYS 8.0 s 8.192 ms 16.384 ms 32.768 ms 65.536 ms 32.0 s 32.768 ms 65.536 ms 131.072 ms 262.144 ms 11 222/fSYS 128.0 s 131.072 ms 262.144 ms 524.288 ms 1048.576 ms
In the sample program 222/fsys (WDTP = `11') is used and a runaway condition is detected in 131.072 ms. Clearing the binary counter Ordinarily the binary counter should be cleared at several points within the main processing routine, not just at a single point. The binary counter is not normally cleared during interrupt processing. WDCR 4Eh Interrupt processing When an INTWD occurs, the interrupt handler should branch to a non-maskable exception. This should transfer control to a runaway correction program which will restore normal conditions. The details of the runaway correction program are not covered here. Clear code is written.
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TX1940 Application Note
3.7.1.2 Watchdog Timer control method
Figure 3.7.1 illustrates the flow of control for the Watchdog Timer.
Main
Disable interrupts
Initialization section
WDCR 0x4e WDMOD 0xe0
Clear binary counter and, after setting detection time, start WDT.
Enable interrupts
Clear binary counter.
WDCR 0x4e
WDCR 0x4e
Main processing section
WDCR 0x4e
Figure 3.7.1 Flow of control for Watchdog Timer
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TX1940 Application Note 3.7.2 Example of how to use the DMA controller This section presents an example of how to set the parameters for DMA transfer in Internal Transfer Request Mode. In this example the source and destination memory addresses for the transfer are specified.
3.7.2.1 Set-up parameters for sample program
The following settings are the main parameters used for performing DMA transfer in this program. Other settings vary according to the functions which are used. Please refer to the relevant section for further details (in most cases the CCRn registers are used to make these other settings).
Table 3.7.2 Settings for DMA transfer Parameter
DMA channel used Transfer request mode Snoop function Source device for transfer Destination device for transfer Address mode Normal termination Abnormal termination Channel 0 Internal Transfer Request Mode Used Memory (internal RAM) Memory (internal RAM) Dual-Address Mode (this mode is only available on the TX1940FDBF) Interrupts not used Interrupts not used
Setting
3.7.2.2
Generating physical addresses
Generation of physical addresses SAR0 and DAR0 must be set to hold physical addresses. Virtual addresses must be converted to physical addresses in software. Figure 3.7.2 shows the address map for the TX19L. Figure 3.7.3 shows the memory map for the TX1940FDBF. Based on these maps Table 3.7.3 shows the correspondence between the virtual addresses and the physical addresses.
Virtual address space 0xFFFF FFFF 16 Mbytes, reserved Uncacheable Kseg2 Cacheable 0xC000 0000 0xA000 0000 0x8000 0000 Uncacheable Kseg1 Cacheable Kseg0 Cacheable 16 Mbytes, reserved 2 Gbyte 16 Mbytes, reserved 1 Gbyte 0xC000 0000 16 Mbytes, reserved Physical address space 0xFFFF FFFF
Kuseg Cacheable Cannot be accessed
0x4000 0000 0x2000 0000 512 Mbytes
0x0000 0000
0x0000 0000
Figure 3.7.2 Memory map of TX19L
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TX1940 Application Note
Normal Mode
Internal I/O (Reserved) 0xFFFF_FFFF 0xFFFF_E000
Boot Mode
Internal I/O (Reserved) 0xFFFF_FFFF 0xFFFF_E000
Programmer Mode
Not accessible 0xFFFF_FFFF
Internal RAM (16 KB) 0xFFFF_BFFF Internal RAM (16 KB) 0xFFFF_BFFF 0xFFFF_8000 0xFFFF_8000 (Reserved) (Reserved) Used for debugging (reserved) 0xFF20_0000 (Reserved) 0xFF00_0000 0xC000_0000 (Reserved) 0xBF00_0000 Internal ROM shadowed here 0x4000_0000 Not accessible (512 MB) 0x2000_0000 Not accessible (512 MB) 0x2000_0000 Not accessible User program area Maskable interrupt area Exception vector area 0x1FC0_0000 0x0000_0000 0x1FC7_FFFF 0x1FC0_0400 0x1FC0_17FF 0x0007_FFFF 0x1FC0_0000 0x0000_0000 Internal flash ROM 0x0000_0000 0x4007_FFFF Internal flash ROM 0x4000_0000 Not accessible (512 MB) 0x2000_0000 0x4000_0000 (Reserved) 0xBF00_0000 0x4007_FFFF (Reserved) 0xFF00_0000 0xC000_0000 Not accessible 0xC000_0000 0xFF3F_FFFF Used for debugging (reserved) 0xFF20_0000 0xFF3F_FFFF
Boot ROM (6 KB)
Note 1: The addresses shown above are physical addresses.
Figure 3.7.3 TX1940FDBF memory map for each mode Table 3.7.3 Correspondence between virtual addresses and physical addresses Virtual Addresses
0x0000_0000 0x7FFF_FFFF 0x8000_0000 0x9FFF_FFFF 0xA000_0000 0xBFFF_FFFF 0xC000_0000 0xFFFF_FFFF
Physical Addresses
0x4000_0000 0xBFFF_FFFF 0x0000_0000 0x1FFF_FFFF 0x0000_0000 0x1FFF_FFFF 0xc000_0000 0xFFFF_FFFF
As illustrated by Table 3.7.3, in the application shown here the conversion of a virtual address to a physical address involves changing only the three high-order bits. This is shown in Figure 3.7.4.
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TX1940 Application Note Address conversion
31 30 29
Virtual address The three high-order bits are looked up in the conversion table.
Virtual Address
<3 high-order bits>
Physical Address
<3 high-order bits>
Virtual Address
<3 high-order bits>
Physical Address
<3 high-order bits> 31 30 29
0000_0000 1FFF_FFFF 2000_0000 3FFF_FFFF 4000_0000 5FFF_FFFF 6000_0000 7FFF_FFFF
31 30 29 31 30 29 31 30 29 31 30 29
8000_0000
000
010
9FFF_FFFF A000_0000 BFFF_FFFF C000_0000 DFFF_FFFF E000_0000 FFFF_FFFF
31 30 29
100
31 30 29
000
31 30 29
001
31 30 29
011
31 30 29
101
31 30 29
001
31 30 29
010
31 30 29
100
31 30 29
110
31 30 29
110
31 30 29
011
101
111
111
Figure 3.7.4 Address conversion
* * *
Conversion of virtual addresses to physical addresses involves changing only the three high-order bits. In the sample program the virtual addresses are divided into eight discrete areas as shown in Figure 3.7.4. The data that should be converted the address can be found in the table. The sample program uses the conversion table VtoP_Table[ ] and the virtual-to-physical address conversion function mVtoP( ).
3.7.2.3
Functional description
mFillArray This function transfers data from a fixed address to a dynamic address one byte at a time. The first parameter indicates the destination address of the transfer, the second parameter indicates the source address of the transfer and the third parameter indicates the number of bytes to be transferred. The source of the data transfer is gFillData (1 byte) and the destination is ucArray_A[ ] or ucArray_B[ ] (1 byte x 256). Since the data size for the transfer source is 1 byte, the device port size and the unit of transfer are both set to 1 byte.
Table 3.7.4 Set-up of mFillArray Set-up Parameter
Source address count Destination address count Unit of transfer Device port size Destination address counter Source address counter
Settings
Address fixed Address incremented 1 byte 1 byte From bit 0 From bit 0
3-205
TX1940 Application Note mCopyArray This function transfers data from a dynamic address to a dynamic address four bytes at a time. The arrays ucArray_A[ ] and ucArray_B[ ] can both be specified as either the source or the destination of the data transfer. The first parameter indicates the destination address of the transfer, the second parameter indicates the source address of the transfer and the third parameter indicates the number of bytes to be transferred. Since the transfer size and device port size are both 4 bytes, the Byte Count Register and the number of array elements must both be multiples of 4.
Table 3.7.5 Set-up of mCopyArray Set-up Parameter
Source address count Destination address count Unit of transfer Device port size Destination address counter Source address counter
Settings
Address incremented Address incremented 4 bytes 4 bytes From bit 0 From bit 0
3-206
TX1940 Application Note
3.7.2.4 3.7.2.4.1 Sample program Generic flowchart
Main processing
mFillArray
Reset DMAC
CSR0 ! = 0 ? Yes Set SFRs
No
Enable interrupts
mFillArray ( ); Start DMA Error ? No mFillArray ( ); End Error ? No Initialize ucArray_A[]. mCopyArray ( ); mCopyArray Yes Reset DMAC Yes Reset DMAC Error? No Yes
Figure 3.7.5 Function processing
Error ? No mCopyArray ( );
Yes
Reset DMAC
CSR0 ! = 0 ? No Yes Set SFRs
Error ? No
Yes
Start DMA Reset DMAC Error ? No Yes
Figure 3.7.6 Main processing
End
mVtoP
Extract 3 high-order bits of virtual address
Refer to conversion table
Generate physical address
End
Figure 3.7.7 Function processing Figure 3.7.8 Address conversion
3-207
TX1940 Application Note
3.7.2.4.2 File configuration
Table 3.7.6 list the files used in the sample program.
Table 3.7.6 File configuration Filename
Stc9i16.asm io1940.c Dma_src.c io1940.h Start-up routine Special function register declarations DMAC program Special function register definitions
Contents
Page References
3-12 3-51 3-208 3-28
3.7.2.4.3
Source code
Filename: DMA_src.c
/* ************************************************** ** Application Note ** ** ** ** ( FUNCTION ROUTINE ) ** ** ** ** MCU ** ** TX1940 ** ** ** ** fc = 32MHz ** ** fsys = 32MHz ** ** fperiph = 32MHz ** ** ** ** ** ************************************************** ************************************************** * COPYRIGHT(C) 1999 TOSHIBA CORPORATION * * ALL RIGHTS RESERVED * **************************************************/
/*************************************************/ /* Loading header files */ /*************************************************/ #include "io1940.h" #include
/*************************************************/ /* Constant definitions */ /*************************************************/ #define NUM 256 #define FALSE (0==1) #define TRUE (0==0) /*************************************************/ /* Type definitions */ /*************************************************/ typedef int Boolean;
/*************************************************/ /* External variable definitions */ /*************************************************/ /* Position arrays in global memory */ unsigned char __tiny ucArray_A[NUM], __tiny ucArray_B[NUM],
3-208
TX1940 Application Note
__tiny gFillData;
/* **************************************************************************** /* Module name : mVtoP /* **************************************************************************** /* Function : Converts virtual addresses to physical addresses /* Inputs : None /* Outputs : None /* Parameter : Address /* Return value : physical address /* **************************************************************************** /**/ const unsigned char VtoP_Table[8] = {2,3,4,5,0,0,6,7}; unsigned long mVtoP( unsigned long Address){ unsigned long work1, work2; work1 = Address & 0x1fffffff; work2 = (Address >> 29); return( ( VtoP_Table[ work2 ]<<29 ) + work1 ); }
*/ */ */ */ */ */ */ */ */
/* ***************************************************************************** */ /* Module name : mFillArray */ /* ***************************************************************************** */ /* Function : Transfers data from fixed address to dynamic address using DMA */ /* Inputs : CSR0 */ /* Outputs : SAR0,DAR0,BCR0,CCR0,CSR0 */ /* Parameters : *Array,iCount,ucData */ /* Return value : Boolean */ /* ***************************************************************************** */ /**/ Boolean mFillArray( unsigned char *Array, unsigned char ucData, unsigned int iCount ){ unsigned int dma_status; dma_status = IO_CSR0; if ((dma_status & 0x80000000) != 0x0){ /* The value of this bit is 1 after DMA has been set up but before transfer. */ /* Hence, the value is 0 before DMA has been set up */ return FALSE; } gFillData = ucData; IO_DTCR0 = 0; IO_SAR0 = mVtoP((unsigned long)&gFillData);/* Set source address */ IO_DAR0 = mVtoP((unsigned long)Array); /* Set destination address */ IO_BCR0 = iCount; /* Set number of bytes to be transferred */ IO_CCR0 = 0x8000090F; /* =1 =0 =0 =0 */ /* =0 =0(Ignored) =0(Ignored) */ /* =1 =0(Ignored) =0 */ /* =10 =0 =00 =11 */ /* =11 */ while( (IO_CSR0 & 0x80000000) != 0x00 ){ } dma_status = IO_CSR0; IO_CSR0 = 0; if ((dma_status & 0x005C0000) != 0){ /* */ return FALSE; /* Error if any field is 1 */ } return TRUE; }
/* **************************************************************************** */ /* Module name : mCopyArray */
3-209
TX1940 Application Note
/* ****************************************************************************** */ /* Function : Transfer data from dynamic address to dynamic address using DMA */ /* Inputs : CSR0 */ /* Outputs : SAR0,DAR0,BCR0,CCR0,CSR0 */ /* Parameters : *SrcArray,*DstArray,iCount */ /* Return value : Boolean */ /* ****************************************************************************** */ /**/ Boolean mCopyArray( unsigned char *DstArray,unsigned char *SrcArray, unsigned int iCount ){ unsigned int dma_status,dummy; dma_status = IO_CSR0; if ((dma_status & 0x80000000) != 0x0){ return FALSE; } IO_DTCR0 = 0; IO_SAR0 = mVtoP((unsigned long)SrcArray); /* Set source address */ IO_DAR0 = mVtoP((unsigned long)DstArray); /* Set destination address */ IO_BCR0 = iCount; /* Set number of bytes to be transferred */ IO_CCR0 = 0x80000800; /* =1 =0 =0 =0 */ /* =0 =0(Ignored) =0(Ignored) */ /* =1 =0(Ignored) =0 */ /* =00 = =00 =11 */ /* =11 */ while( (CSR0 & 0x80000000) == 0x00 ){ } IO_dma_status = IO_CSR0; IO_CSR0 = 0; if ( (dma_status & 0x005C0000) != 0){ /* */ return FALSE; /* Error if any field is 1 */ } return TRUE; }
/* **************************************************************************** /* Module name : main /* **************************************************************************** /* Function : Main processing /* Inputs : mFillArray,mCopyArray /* Outputs : DCR /* Parameters : None /* Return value : None /* **************************************************************************** /**/ void main(void){ Boolean status; int i; /*--- Software reset --- */ IO_DCR = 0x80000000; __EI(); for(;;){ status = mFillArray( ucArray_A,0x33,NUM ); if (status == FALSE){ /*--- Software reset ---*/ IO_DCR = 0x80000000; /* =1 */ } status = mFillArray( ucArray_B,0x55,NUM ); if (status == FALSE){ /*--- Software reset ---*/ IO_DCR = 0x80000000; /* =1 */ }
*/ */ */ */ */ */ */ */ */
/* =0 */
3-210
TX1940 Application Note
for(i=0;i=1 */ } for(i=0;i=1 */ } } }
3-211
TX1940 Application Note
3
3.8
List of special function registers used
A list of the special function registers used in the sample programs is shown below. For information regarding any other special function registers, please refer to the "32-Bit TX System RISC TX19 Family TX1940." (1) Input/Output Port Register (2) Input/Output Port Control Register (3) Interrupt Register (4) Clock Generator Register (5) DMA Controller Register (6) 8-Bit Timer Register (7) 16-Bit Timer Register (8) UART/Serial Channel Register (9) I2C Bus / Serial Channel Register (10) AD Converter Register (11) Watchdog Timer Register (12) Real-Time Counter Register
Table structure Symbol Name Address 7 6 1 0 Bit Symbol Read/Write Initial value after reset Remarks
Symbol meanings R/W: Registers can be both read from and written to. R: W: Registers can only be read from. Registers can only be written to.
W*: Registers can be both read from and written to. (However, the register is always read as 1.)
3-212
TX1940 Application Note (1) Input/Output ports
Symbol Name Address
FFFF F000H P17 P16 P15
7
P07
6
P06
5
P05
4
P04 R/W Undefined Input Mode P14 R/W Input Mode
3
P03
2
P02
1
P01
0
P00
P0
PORT0
P1
PORT1
FFFF F001H
P13
P12
P11
P10
P27 P2 PORT2 FFFF F012H 1 P37 P3 PORT3 FFFF F018H 1
P26 1 P36 1
P25 1 P35 1
P24 R/W 1
P23 1
P22 1 P32 1 P42 R/W 1 Input Mode P52
P21 1 P31 1 P41 1 P51
P20 1 P30 1 P40 1 P50
Input Mode P34 R/W 1 Input Mode P44 P4 PORT4 FFFF F01EH P57 P56 P55 1 P54 R Input Mode P77 P7 PORT7 FFFF F02BH 1 P87 P8 PORT8 FFFF F030H 1 P97 P9 PORT9 FFFF F031H 1 PA7 PA PORTA FFFF F036H 1 P76 1 P86 1 P96 1 PA6 1 P75 1 P85 1 P95 1 PA5 1 P74 R/W 1 Input Mode P84 R/W 1 Input Mode P94 R/W 1 PA4 R/W 1 Input Mode 1 1 1 1 1 Input Mode PA3 PA2 PA1 PA0 1 1 1 Output Mode P93 P92 P91 P90 1 1 1 1 P83 P82 P81 P80 1 1 1 1 P73 P72 P71 P70 P43 1 P53 1 Output Mode P33
P5
PORT5
FFFF F025H
3-213
TX1940 Application Note (2) Input/Output control (1/2)
Symbol Name
PORT0 Control
Address
FFFF F002H
7
P07C
6
P06C 0 P16C
5
P05C 0 P15C
4
P04C W 0 P14C W
3
P03C 0 P13C
2
P02C 0 P12C
1
P01C 0 P11C
0
P00C 0 P10C
P0CR
0 P17C
0: IN, 1: OUT PORT1 Control FFFF F004H P17F P1FC PORT1 Function FFFF F005H 0 P27C P2CR PORT2 Control FFFF F014H 0 P27F P2FC PORT2 Function FFFF F015H 0 P37C P3CR PORT3 Control FFFF F01AH 0 P16F 0 P26C 0 P26F 0 P36C 0 P36F PORT3 Function FFFF F01BH 0 0: PORT 1: R/ W output PORT4 Control FFFF F020H P15F 0 P25C 0 P25F 0 P35C W 0 P35F W P3FC 0 0: PORT 1: BUSAK output 0 0: PORT 1: BUSRQ input P44C P4CR 0 P44F PORT4 Function FFFF F021H 0 0: PORT 1: SCOUT output P77C P7CR PORT7 Control FFFF F02EH 0 P76C 0 P75C 0 P74C W 0 0: IN 1: OUT P77F 0 P7FC PORT7 Function FFFF F02FH 0: PORT 1: INT0 exit input P76F 0 0: PORT 1: TB0OUT output P75F 0 0: PORT 1: TB0IN1 input P74F 0 0: PORT 1: TB0IN0 input P73F 0 0: PORT 1: TA3OUT output RXD4 input P72F 0 0: PORT 1: TA2IN input TXD4 output P71F 0 0: PORT 1: TA1OUT output RXD3 input P70F 0 0: PORT 1: TA0IN input TXD3 output 0 0 0 0 P43C 0 P43F 0 0: PORT 1: CS3 output P73C 0 0: PORT 1: HWR output P42C W 0 0: IN, 1: OUT P42F W P4FC 0 0: PORT 1: CS2 output P72C 0 0: PORT 1: CS1 output P71C 0 0: PORT 1: CS0 output P70C P41F P40F 0 0 0 P34F 0 0 P32F P31F W 0 0: PORT 1: WR output P41C 0 0: PORT 1: RD output P40C P30F 0: IN, 1: OUT
P1CR
(See P1FC column) P14F W 0 P24C W 0 P24F W 0 P34C 0 P33C 0 P32C 0 0 P2FC/P2CR = 00: IN, 01: OUT, 10: A0A7, 11: A23A16 0 P23F 0 P22F 0 P21F 0 P20F (See P2FC column) 0 P23C 0 P22C 0 P21C 0 P20C P1FC/P1CR = 00: IN, 01: OUT, 10: AD15AD8, 11: A158 P13F P12F P11F P10F
Note:
P77F must be set to 1 when INT0 is used as an input to cause the device to exit from STOP Mode (when SYSCR2 = 0).
3-214
TX1940 Application Note Input/Output control (2/2)
Symbol Name
PORT8 Control
Address
FFFF F032H
7
P87C
6
P86C 0 P86F 0 0: PORT 1: TB3OUT output P96C 0
5
P85C 0 P85F 0 0: PORT 1: TB2OUT output P95C 0 P95F W 0
4
P84C W 0 P84F W 0 0: PORT 1: TB2IN1 input P94C W 0
3
P83C 0 P83F 0 0: PORT 1: TB2IN0 input P93C 0 P93F W 0 0: PORT 1: TXD1 output
2
P82C 0 P82F 0 0: PORT 1: TB1OUT output P92C 0 P92F 0 0: PORT 1: SCLK0 output CTS0 / SCLK0 input
1
P81C 0 P81F 0 0: PORT 1: TB1IN1 input P91C 0
0
P80C 0 P80F 0 0: PORT 1: TB1IN0 input P90C 0 P90F W 0 0: PORT 1: TXD0 output
P8CR
0
0: IN, 1: OUT
P8FC
PORT8 Function
FFFF F033H
0 Must always be set to 0 P97C
P9CR
PORT9 Control
FFFF F034H
0
0: IN, 1: OUT
P9FC
PORT9 Function
FFFF F035H
0: PORT 1: SCLK1 output CTS1 / SCLK1 input PA7C PA6C 0 PA6F 0 0: PORT 1: SDA/SO output PA5C 0 PA5F 0 0: PORT SCK output PA4C
PA3C W 0 PA3F W 0 0: PORT 1: INT4 exit input
PA2C 0 PA2F 0 0: PORT 1: INT3 exit input
PA1C 0 PA1F 0 0: PORT 1: INT2 exit input
PA0C 0 PA0F 0 0: PORT 1: INT1 exit input
PACR
PORTA Control
FFFF F038H
0 PA7F
0 0 Must always be set to 0
0: IN, 1: OUT
PAFC
PORTA Function
FFFF F039H
0 0: PORT SCL output
Note:
PA0F~PA3F must be set to 1 when INT1~INT4 are used as an input to cause the device to exit from STOP Mode (when SYSCR2 = 0).
3-215
TX1940 Application Note (3) Interrupt control (1/12)
Symbol Name Address 7 6 5
EIM01 0
4
EIM00 0
3
DM0 R/W 0
2
IL02 0
1
IL01 0
0
IL00 0
00: Low Must always be set to "Low".
Sets DMAC trigger 0: Not set 1: Sets
interrupt
If DM0 = 0, interrupt level for Interrupt 0 (software) is set 000: Disables interrupt 001111: Sets levels 1~7 If DM0 = 1, DMAC channel is
selected
IMC0L
Interrupt Mask control Register 0L
FFFF
E000H 15 14 13 EIM11 0 12 EIM10 0
to be DMAC trigger
11 DM1
000011: Selects Channels 0~3 100111: Invalid setting
10 IL12 R/W 0 9 IL11 0 8 IL10 0
0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DM1 = 0, interrupt level for interrupt 1 (INT0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM1 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM2 R/W 0 18 IL22 0 17 IL21 0 16 IL20 0
23
22
21 EIM21 0
20 EIM20 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Interrupt
IMC0H Mask FFFF
Sets DMAC IF DM2 = 0, interrupt level for interrupt 2 (INT1) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM2 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Setting inhibited DMAC trigger 27 DM3 R/W 0 26 IL32 0 25 IL31 0 24 IL30 0
controlRegi ster 0H
E002H
31
30
29 EIM31 0
28 EIM30 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DM3 = 0, interrupt level for interrupt 3 (INT2) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
Note:
When using INT0~INT4 as an input to cause the device to exit from SLEEP/STOP Mode, set the active state using the IMCGxx register in the CG block and set of the IMCxx register to 01 (High level) in the INTC block.
3-216
TX1940 Application Note Interrupt control (2/12)
Symbol Name Address 7 6 5
EIM41 0
4
EIM40 0
3
DM4 R/W 0
2
IL42 0
1
IL41 0
0
IL40 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge Interrupt Mask controlRegis ter 1L
IMC1L
FFFF E004H
Sets DMAC If DM4 = 0, interrupt level for interrupt 4 (INT3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM4 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM5 R/W 0 10 IL52 0 9 IL51 0 8 IL50 0
15
14
13 EIM51 0
12 EIM50 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DM5 = 0, interrupt level for interrupt 5 (INT4) is set. trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM5 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DMA R/W 0 18 ILA2 0 17 ILA1 0 16 ILA0 0
23
22
21 EIMA1 0
20 EIMA0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge Interrupt Mask control Register 2H FFFF E00AH
IMC2H
Sets DMAC If DMA = 0, interrupt level for interrupt 10 (INT5) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DMA = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DMB R/W 0 26 ILB2 0 25 ILB1 0 24 ILB0 0
31
30
29 EIMB1 0
28 EIMB0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DMB = 0, interrupt level for interrupt 11 (INT6) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DMB = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-217
TX1940 Application Note Interrupt control (3/12)
Symbol Name Address 7 6 5
EIMC1 0
4
EIMC0 0
3
DMC R/W 0
2
ILC2 0
1
ILC1 0
0
ILC0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge Interrupt Mask control Register 3L
IMC3L
FFFF E00CH
Sets DMAC If DMC = 0, interrupt level for interrupt 12 (INT7) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DMC = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DMD R/W 0 10 ILD2 0 9 ILD1 0 8 ILD0 0
15
14
13 EIMD1 0
12 EIMD0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DMD = 0, interrupt level for interrupt 13 (INT8) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DMD = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DME R/W 0 18 ILE2 0 17 ILE1 0 16 ILE0 0
23
22
21 EIME1 1
20 EIME0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge Interrupt Mask control Register 3H FFFF E00EH
IMC3H
Sets DMAC If DME = 0, interrupt level for interrupt 14 (INT9) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DME = 1, DMAC channel is selected 000011: Selects Channels 03 to be 100111: Invalid setting DMAC trigger 27 DMF R/W 0 26 ILF2 0 25 ILF1 0 24 ILF0 0
31
30
29 EIMF1 0
28 EIMF0 0
Sets active state for interrupt request 00: Low 01: High 10: Falling edge 11: Rising edge
Sets DMAC If DMF = 0, interrupt level for interrupt 15 (INTA) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DMF = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-218
TX1940 Application Note Interrupt control (4/12)
Symbol Name Address 7 6 5
EIM141 0
4
EIM140 0
3
DM14 R/W 0
2
IL142 0
1
IL141 0
0
IL140 0
Must always be set to 11.
IMC5L
Interrupt Mask control Register 5L
FFFF E014H
Sets DMAC If DM14 = 0, interrupt level for interrupt 20 (INTTA0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM14 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM15 R/W 0 10 IL152 0 9 IL151 0 8 IL150 0
15
14
13 EIM151 0
12 EIM150 0
Must always be set to 11.
Sets DMAC If DM15 = 0, interrupt level for interrupt 21 (INTTA1) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM15 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM16 R/W 0 18 IL162 0 17 IL161 0 16 IL160 0
23
22
21 EIM161 0
20 EIM160 0
Must always be set to 11.
IMC5H
Interrupt Mask control Register 5H
FFFF E016H
Sets DMAC If DM16 = 0, interrupt level for interrupt 22 (INTTA2) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM16 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM17 R/W 0 26 IL172 0 25 IL171 0 24 IL170 0
31
30
29 EIM171 0
28 EIM170 0
Must always be set to 11.
Sets DMAC If DM17 = 0, interrupt level for interrupt 23 (INTTA3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM17 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-219
TX1940 Application Note Interrupt control (5/12)
Symbol Name Address 7 6 5
EIM1C1 0
4
EIM1C0 0
3
DM1C R/W 0
2
IL1C2 0
1
IL1C1 0
0
IL1C0 0
Must always be set to 11.
IMC7L
Interrupt Mask control Register 7L
FFFF E01CH
Sets DMAC If DM1C = 0, interrupt level for interrupt 28 (INTTB00) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM1C = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM1D R/W 0 10 IL1D2 0 9 IL1D1 0 8 IL1D0 0
15
14
13 EIM1D1 0
12 EIM1D0 0
Must always be set to 11.
Sets DMAC If DM1D = 0, interrupt level for interrupt 29 (INTTB01) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM1D = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM1E R/W 0 18 IL1E2 0 17 IL1E1 0 16 IL1E0 0
23
22
21 EIM1E1 0
20 EIM1E0 0
Must always be set to 11.
IMC7H
Interrupt Mask control Register 7H
FFFF E01EH
Sets DMAC If DM1E = 0, interrupt level for interrupt 30 (INTTB10) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM1E = 1, DMAC channel is selected 000011: Selects channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM1F R/W 0 26 IL1F2 0 25 IL1F1 0 24 IL1F0 0
31
30
29 EIM1F1 0
28 EIM1F0 0
Must always be set to 11.
Sets DMAC If DM1F = 0, interrupt level for interrupt 31 (INTTB11) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM1F = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-220
TX1940 Application Note Interrupt control (6/12)
Symbol Name Address 7 6 5
EIM201 0
4
EIM200 0
3
DM20 R/W 0
2
IL202 0
1
IL201 0
0
IL200 0
Must always be set to 11.
IMC8L
Interrupt Mask control Register 8L
FFFF E020H
Sets DMAC If DM20 = 0, interrupt level for interrupt 32 (INTTB20) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM20 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM21 R/W 0 10 IL212 0 9 IL211 0 8 IL210 0
15
14
13 EIM211 0
12 EIM210 0
Must always be set to 11.
Sets DMAC If DM21 = 0, interrupt level for interrupt 33 (INTTB21) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM21 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM22 R/W 0 Sets DMAC trigger 0: Not set 1: Sets interrupt to be DMAC trigger 27 DM23 R/W 0 18 IL222 0 17 IL221 0 16 IL220 0
23
22
21 EIM221 0
20 EIM220 0
Must always be set to 11.
IMC8H
Interrupt Mask control Register 8H
FFFF E022H
If DM22 = 0, interrupt level for interrupt 34 (INTTB30) is set 000: Disables interrupt 001111: Sets levels 1~7 If DM22 = 1, DMAC channel is selected 000011: Selects Channels 0~3 100111: Invalid setting 26 IL232 0 25 IL231 0 24 IL230 0
31
30
29 EIM231 0
28 EIM230 0
Must always be set to 11.
Sets DMAC If DM23 = 0, interrupt level for interrupt 35 (INTTB31) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM23 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-221
TX1940 Application Note Interrupt control (7/12)
Symbol Name Address 7 6 5
EIM281 0
4
EIM280 0
3
DM28 R/W 0
2
IL282 0
1
IL281 0
0
IL280 0
Must always be set to 11.
IMCAL
Interrupt Mask control Register AL
FFFF E028H
Sets DMAC If DM28 = 0, interrupt level for interrupt 40 (INTTBOF0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM28 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM29 R/W 0 10 IL292 0 9 IL291 0 8 IL290 0
15
14
13 EIM291 0
12 EIM290 0
Must always be set to 11.
Sets DMAC If DM29 = 0, interrupt level for interrupt 41 (INTTBOF1) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM29 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM2A R/W 0 18 IL2A2 0 17 IL2A1 0 16 IL2A0 0
23
22
21 EIM2A1 0
20 EIM2A0 0
Must always be set to 11.
IMCAH
Interrupt Mask control Register AH
FFFF E02AH
Sets DMAC If DM2A = 0, interrupt level for interrupt 42 (INTTBOF2) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM2A = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM2B R/W 0 26 IL2B2 0 25 IL2B1 0 24 IL2B0 0
31
30
29 EIM2B1 0
28 EIM2B0 0
Must always be set to 11.
Sets DMAC If DM2B = 0, interrupt level for interrupt 43 (INTTBOF3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM2B = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-222
TX1940 Application Note Interrupt control (8/12)
Symbol Name Address 7 6 5
EIM301 0
4
EIM300 0
3
DM30 R/W 0
2
IL302 0
1
IL301 0
0
IL300 0
Must always be set to 11.
IMCCL
Interrupt Mask control Register CL
FFFF E030H
Sets DMAC If DM30 = 0, interrupt level for interrupt 48 (INTRX0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Uses interrupt If DM30 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM31 R/W 0 10 IL312 0 9 IL311 0 8 IL310 0
15
14
13 EIM311 0
12 EIM310 0
Must always be set to 11.
Sets DMAC If DM31 = 0, interrupt level for interrupt 49 (INTTX0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM31 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM32 R/W 0 18 IL322 0 17 IL321 0 16 IL320 0
23
22
21 EIM321 0
20 EIM320 0
Must always be set to 11
IMCCH
Interrupt Mask control Register CH
FFFF E032H
Sets DMAC If DM32 = 0, interrupt level for interrupt 50 (INTRX1) is set trigge 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM32 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM33 R/W 0 26 IL332 0 25 IL331 0 24 IL330 0
31
30
29 EIM331 0
28 EIM330 0
Must always be set to 11.
Sets DMAC If DM33 = 0, interrupt level for interrupt 51 (INTTX1) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM33 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-223
TX1940 Application Note Interrupt control (9/12)
Symbol Name Address 7 6 5
EIM341 0 Interrupt Mask control Register DL
4
EIM340 0
3
DM34 R/W 0
2
IL342 0
1
IL341 0
0
IL340 0
Must always be set to 11. IMCDL FFFF E034H
Sets DMAC If DM34 = 0, interrupt level for interrupt 52 (INTS2) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM34 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM36 R/W 0 18 IL362 0 17 IL361 0 16 IL360 0
23
22
21 EIM361 0
20 EIM360 0
Must always be set to 11.
IMCDH
Interrupt Mask control Register D
FFFF E036H
Sets DMAC If DM36 = 0, interrupt level for interrupt 54 (INTRX3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM36 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM37 R/W 0 26 IL372 0 25 IL371 0 24 IL370 0
31
30
29 EIM371 0
28 EIM370 0
Must always be set to 11.
Sets DMAC If DM37 = 0, interrupt level for interrupt 55 (INTTX3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM37 = 1, selects DMAC channel 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-224
TX1940 Application Note Interrupt control (10/12)
Symbol Name Address 7 6 5
EIM381 0
4
EIM380 0
3
DM38 R/W 0
2
IL382 0
1
IL381 0
0
IL380 0
Must always be set to 11.
IMCEL
Interrupt Mask control Register EL
FFFF E038H
Sets DMAC If DM38 = 0, interrupt level for interrupt 56 (INTRX4) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 17 1: Sets interrupt If DM38 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM39 R/W 0 10 IL392 0 9 IL391 0 8 IL390 0
15
14
13 EIM391 0
12 EIM390 0
Must always be set to 11.
Sets DMAC If DM39 = 0, interrupt level for interrupt 57 (INTTX4) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM39 = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM3A R/W 0 18 IL3A2 0 17 IL3A1 0 16 IL3A0 0
23
22
21 EIM3A1 0
20 EIM3A0 0
Must always be set to 01.
IMCEH
Interrupt Mask control Register EH
FFFF E03AH
Sets DMAC If DM3A = 0, interrupt level for interrupt 58 (INTRTC) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3A = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM3B R/W 0 26 IL3B2 0 25 IL3B1 0 24 IL3B0 0
31
30
29 EIM3B1 0
28 EIM3B0 0
Must always be set to 11.
Sets DMAC If DM3B = 0, interrupt level for interrupt 59 (INTAD) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3B = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-225
TX1940 Application Note Interrupt control (11/12)
Symbol Name Address 7 6 5
EIM3C1 0
4
EIM3C0 0
3
DM3C R/W 0
2
IL3C2 0
1
IL3C1 0
0
IL3C0 0
Must always be set to 10.
IMCFL
Interrupt Mask control Register FL
FFFF E03CH
Sets DMAC If DM3C = 0, interrupt level for interrupt 60 (INTDMA0) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3C = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 11 DM3D R/W 0 10 IL3D2 0 9 IL3D1 0 8 IL3D0 0
15
14
13 EIM3D1 0
12 EIM3D0 0
Must always be set to 10.
Sets DMAC If DM3D = 0, interrupt level for interrupt 61 (INTDMA1) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3D = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 19 DM3E R/W 0 18 IL3E2 0 17 IL3E1 0 16 IL3E0 0
23
22
21 EIM3E1 0
20 EIM3E0 0
Must always be set to 10.
IMCFH
Interrupt Mask control Register FH
FFFF E03EH
Sets DMAC If DM3E = 0, interrupt level for interrupt 62 (INTDMA2) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3E = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger 27 DM3F R/W 0 26 IL3F2 0 25 IL3F1 0 24 IL3F0 0
31
30
29 EIM3F1 0
28 EIM3F0 0
Must always be set to 10.
Sets DMAC If DM3F = 0, interrupt level for interrupt 63 (INTDMA3) is set trigger 000: Disables interrupt 0: Not set 001111: Sets levels 1~7 1: Sets interrupt If DM3F = 1, DMAC channel is selected 000011: Selects Channels 0~3 to be 100111: Invalid setting DMAC trigger
3-226
TX1940 Application Note Interrupt Control (12/12)
Symbol Name Address 7 6
IVRL R 0 15 0 14 0 13 IVRH R/W Interrupt Vector address register 0 FFFF E040H 0 0 0 0 0 0 0 12 0 11 0 10 0 9 IVRL R 0 Bits 9~4 hold the vector for the interrupt generated. 0 8 Bits 9~4 hold the vector for the interrupt generated.
5
4
3
2
1
0
IVR
23
22
21
20
IVRH R/W
19
18
17
16
0
0
0
0
0
0
0
0
31
30
29
28
IVRH R/W
27
26
25
24
0 Interrupt request clear Register
0
0
0
0
0
0
0
7
FFFF E060H
6
5
EICLR5
4
EICLR4
3
EICLR3 W
2
EICLR2
1
EICLR1
0
EICLR0
INTCLR
Sets IVR<9:4> value that corresponds to the interrupt whose request is to be cleared.
3-227
TX1940 Application Note (4) Chip Select/Wait controller (1/4)
Symbol
BMA0
Name
Base/Mask Address Register
Address
FFFF E400H
7
6
5
4
MA0 R/W
3
2
1
0
1
1
1
1
1
1
1
1
Bits 9~0 specify the address bits (A23~A14) which are to be masked. 0: Not masked 1: Masked
15
14
13
12
MA0 R/W
11
10
9
8
0 Write 0 to this bit.
0
0
0
0
0
0
0
Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Mask address this bit. this bit. this bit. this bit. this bit. 0: Not masked 1: Masked
23
22
21
20
BA0 R/W
19
18
17
16
0
0
0
0
0
0
0
0
Specifies base address of CS0 space (bits 31~16 correspond to A31~A16 respectively.)
31
30
29
28
BA0 R/W
27
26
25
24
0
0
0
0
0
0
0
0
Specifies base address of CS0 space (bits 31~16 correspond to A31~A16 respectively.)
7
BMA1 Base/Mask Address Register FFFF E404H 1
6
5
4
MA1 R/W
3
2
1
0
1
1
1
1
1
1
1
Bits 9~0 specify the address bits (A23~A14) which are to be masked. 0: Not masked 1: Masked
15
14
13
12
MA1 R/W
11
10
9
8
0
0
0
0
0
0
0
0
Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Mask address this bit. this bit. this bit. this bit. this bit. this bit. 0: Not masked 1: Masked
23
22
21
20
BA1 R/W
19
18
17
16
0
0
0
0
0
0
0
0
Specifies base address of CS1 space (bits 31~16 correspond to A31~A16 respectively.)
31
30
29
28
BA1 R/W
27
26
25
24
0
0
0
0
0
0
0
0
Specifies base address of CS1 space (bits 31~16 correspond to A31~A16 respectively.)
3-228
TX1940 Application Note Chip Select/Wait controller (2/4)
Symbol
BMA2
Name
Base/Mask Address Register
Address
FFFF E408H
7
6
5
4
MA2 R/W
3
2
1
0
1
1
1
1
1
1
1
1
Bits 8~0 specify the address bits (A23~A15) which are to be masked 0: Not masked 1: Masked
15
14
13
12
MA2 R/W
11
10
9
8
0
0
0
0
0
0
0
0
Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Mask address this bit. this bit. this bit. this bit. this bit. this bit. this bit. 0: Not masked 1: Masked
23
22
21
20
BA2 R/W
19
18
17
16
0
0
0
0
0
0
0
0
Specifies base address of CS0 space (bits 31~16 correspond to A31~A16 respectively.)
31
30
29
28
BA2 R/W
27
26
25
24
0
0
0
0
0
0
0
0
Specifies base address of CS0 space (bits 31~16 correspond to A31~A16 respectively.)
7
BMA3 Base/Mask Address Register FFFF E40CH 1
6
5
4
MA3 R/W
3
2
1
0
1
1
1
1
1
1
1
Bits 8~0 specify the address bits (A23~A15) which are to be masked 0: Not masked 1: Masked
15
14
13
12
MA3 R/W
11
10
9
8
0
0
0
0
0
0
0
0
Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Write 0 to Mask this bit. this bit. this bit. this bit. this bit. this bit. this bit. address 0: Not masked 1: Masked
23
22
21
20
BA3 R/W
19
18
17
16
0
0
0
0
0
0
0
0
Specifies base address of CS1 space (bits 31~16 correspond to A31~A16 respectively.)
31
30
29
28
BA3 R/W
27
26
25
24
0
0
0
0
0
0
0
0
Specifies base address of CS1 space (bits 31~16 correspond to A31~A16 respectively.)
3-229
TX1940 Application Note Chip Select/Wait controller (3/4)
Symbol
B01CS
Name
Chipselect /wait control Register
Address
FFFF E480H
7
B0OM W
6
5
4
B0BUS 0 Specifies data bus width 0: 16 bit 1: 8 bit
3
2
B0W
1
0
0 0 Specifies chip select output waveform 00: Used for ROM/SRAM Other: Invalid setting
W 0 1 0 1 Specifies number of wait states 0000: 0 wait states; 0001: 1 wait state 0010: 2 wait states; 0011: 3 wait states 0100: 4 wait states; 0101: 5 wait states 0110: 6 wait states; 0111: 7 wait states 1111: (1+N) wait states; Other: Invalid setting
15
14
13
12
11
B0E W 0 CS enable 0: Disabled 1: Enabled
10
9
B0RCV W
8
0 0 Specifies the number of dummy cycles to be inserted 00: 2 cycles 01: 1 cycle 10: None 11: Invalid setting
23
B1OM W
22
21
20
B1BUS 0 Specifies data bus width 0: 16 bit 1: 8 bit
19
18
B1W
17
16
0 0 Specifies chip select output waveform 00: Used for ROM/SRAM Other: Invalid setting
W 0 1 0 1 Specifies number of wait states 0000: 0 wait states; 0001: 1 wait state 0010: 2 wait states; 0011: 3 wait states 0100: 4 wait states; 0101: 5 wait states 0110: 6 wait states; 0111: 7 wait states 1111: (1 + N) wait states; Other: Invalid setting
31
30
29
28
27
B1E W 0 CS enable 0: Disabled 1: Enabled
26
25
B1RCV W
24
0 0 Specifies the number of dummy cycles to be inserted 00: 2 cycles 01: 1 cycle 10: None 11: Invalid setting
3-230
TX1940 Application Note Chip Select/Wait controller (4/4)
Symbol
B23CS
Name
Chipselect /wait control Register
Address
FFFF E484H
7
B2OM W
6
5
4
B2BUS 0 Specifies data bus width 0: 16 bit 1: 8 bit
3
2
B2W
1
0
0 0 Specifies chip select output waveform 00: Used for ROM/SRAM Other: Invalid setting
W 0 1 0 1 Specifies number of wait states 0000: 0 wait states; 0001: 1 wait state 0010: 2 wait states; 0011: 3 wait states 0100: 4 wait states; 0101: 5 wait states 0110: 6 wait states; 0111: 7 wait states 1111: (1 + N) wait states; Other: Invalid setting
15
14
13
12
11
10
9
B2RCV W
8
B2E B2M W W 1 0 CS enable Specifies 0: Disabled CS2 space 1: Enabled 0: 4-Gbyte space 1: CS space
0 0 Specifies the number of dummy cycles to be inserted 00: 2 cycles 01: 1 cycle 10: None 11: Invalid setting
23
22
21
20
B3BUS 0 Specifies data bus width 0: 16 bit 1: 8 bit
19
18
B3W
17
16
B3OM W 0 0 Specifies chip select output waveform 00: Used for ROM/SRAM Other: Invalid setting
W 0 1 0 1 Specifies number of wait states 0000: 0 wait states; 0001: 1 wait state 0010: 2 wait states; 0011: 3 wait states 0100: 4 wait states; 0101: 5 wait states 0110: 6 wait states; 0111: 7 wait states 1111: (1 + N) wait states; Other: Invalid setting
31
30
29
28
27
B3E W 0 CS enable 0: Disabled 1: Enabled
26
25
B3RCV W
24
0 0 Specifies the number of dummy cycles to be inserted 00: 2 cycles 01: 1 cycle 10: None 11: Invalid setting
7
BEXCS Chipselect /wait control Register FFFF E488H 0 BEXOM W
6
5
4
BEXBUS
3
2
BEXW W
1
0
0
0 Specifies data bus width 0: 16 bit 1: 8 bit
0
1
0
1
Specifies chip select output waveform 00: Used for ROM/SRAM Other: Invalid setting
Specifies number of wait states 0000: 0 wait states; 0001: 1 wait state 0010: 2 wait states; 0011: 2 wait states 0100: 4 wait states; 0101: 5 wait states 0110: 6 wait states; 0111: 7 wait states 1111: (1 + N) wait states; Other: Invalid setting
15
14
13
12
11
10
9
BEXRCV W 0
8
0
Specifies the number of dummy cycles to be inserted 00: 2 cycles 01: 1 cycle 10: None 11: Invalid setting
3-231
TX1940 Application Note (5) Clock control (1/2)
Symbol
SYSCR0
Name
System Clock Control Register 0
Address
FFFF EE00H
7
XEN 1 High-speed oscillator 0: Stopped 1: Oscillates
6
XTEN 0 Low-speed oscillator 0: Stopped 1: Oscillates
5
RXEN 1 High-speed oscillator after device has exited STOP Mode 0: Stopped 1: Oscillates
4
RXTEN R/W 0 Low-speed oscillator after device has exitied STOP Mode 0: Stopped 1: Oscillates
3
RSYSCK 0 Clock to be used after device has exited STOP Mode 0: Highspeed 1: Lowspeed
2
WUEF 0 Warm-up (WUP) Writing 0: Don't care Writing 1: Starts timer Read as 0: WUP finished Read as 1: WUP in progress
1
PRCK1
0
PRCK0
0 0 Specifies prescaler clock frequency 00: fperiph/4 01: fperiph/2 10: fperiph 11: Reserved Note: Do not set a clock frequency greater than 12.5 MHz.
SYSCK SYSCR1 System Clock Control Register 1 FFFF EE01H 0 Specifies system clock frequency 0: Highspeed (fc) 1: Lowspeed (fs) DRVOSCH SYSCR2 System Clock Control Register 2 FFFF EE02H R/W 0 High-speed oscillator driving capability control 0: Normal 1: Weak DRVOSCL R/W 0 Low-speed oscillator driving capability control 0: Normal 1: Weak SCOSEL SYSCR3 System Clock Control Register 3 FFFF EE03H R/W 0 SCOUT output 0: fs 1: fsys WUPT1 R/W
FPSEL R/W 0 Specifies fperiph clock frequency 0: fgear 1: fc
DFOSC 0 Specifies high-speed oscillator divisor 0: 2 1: 1 STBY1 R/W STBY0 R/W
GEAR1 R/W
GEAR0
1 1 Specifies high-speed clock gear 00: fc 01: fc /2 10: fc /4 11: fc /8 DRVE R/W 0 1: Pins also driven in STOP Mode
WUPT0 R/W
1 0 Specifies oscillator WUP time 00: Reserved 01: 28/ input frequency 10: 214 11: 216 ALESEL R/W 1 Specifies ALE output pulse width 0: fsys x 0.5 1: fsys x 1.5
1 1 00: Reserved 01: STOP Mode 10: SLEEP Mode 11: IDLE Mode
LUPFG R/W 0 Lock-up (LUP) flag 0: LUP finished 1: LUP in progress ADCCK1 R/W
LUPTM 0 Specifies lock-up time 0: 216/ input frequency 1: 212/ input frequency ADCCK0 R/W
ADCCLK
ADC conversion clock register
FFFF EE04H
EMCG01 IMCGA0 Interrupt mask conntrol Register A0 FFFF EE10H R/W
EMCG00
IMCGA1
Interrupt mask conntrol Register A1
FFFF EE11H
1 0 Specifies active state for INT0 standby exit request 00: Low 01: High 10: Falling edge 11: Rising edge EMCG11 EMCG10 R/W 1 0 Specifies active state for INT1 standby exit request 00: Low 01: High 10: Falling edge 11: Rising edge
0 0 Specifies ADC conversion clock frequency 00: fsys/2 01: fsys/4 10: fsys/8 11 Reserved INT0EN R/W 0 INT0 exit input 0: Disabled 1: Enabled
INT1EN R/W 0 INT1 exit input 0: Disabled 1: Enabled
3-232
TX1940 Application Note Clock control (2/2)
Symbol
IMCGA2
Name
Interrupt mask conntrol Register A2
Address
FFFF EE12H
7
6
5
4
3
2
1
0
INT2EN R/W 0 INT2 exit input 0: Disabled 1: Enabled
EMCG201 EMCG20 R/W 1 0 Specifies active state for INT2 standby exit request 00: Low 01: High 10: Falling edge 11: Rising edge
IMCGB1
Interrupt mask conntrol Register B1
FFFF EE15
1
0
0 These bits should always be set to 0.
These bits should always be set to 10.
IMCGB2
Interrupt mask conntrol Register B2
FFFF EE16
1
0
0 These bits should always be set to 0. INT3EN R/W 0 INT3 exit input 0: Disabled 1: Enabled
These bits should always be set to 10.
EMCG31 IMCGA3 Interrupt mask conntrol Register A3 FFFF EE13H R/W
EMCG30
IMCGB0
Interrupt mask conntrol Register B0
FFFF EE14H
1 0 Specifies active state for INT3 standby exit request 00: Low 01: High 10: Falling edge 11: Rising edge EMCG41 EMCG40 R/W 1 0 Specifies active state for INT4 standby exit request 00: Low 01: High 10: Falling edge 11: Rising edge
INT4EN R/W 0 INT4 exit input 0: Disabled 1: Enabled
IMCGB1
Interrupt mask conntrol Register B1
FFFF EE15
1
0
0 Must always be set to 0.
Must always be set to 10.
IMCGB2
Interrupt mask conntrol Register B2
FFFF EE16
1
0
0 Must always be set to 0.
INTRTCEN
Must always be set to 11. EMCG71 EMCG72 R/W 1 0 Must always be set to 11.
IMCGB3
Interrupt mask control Register B3
FFFF EE17H
EICRCG
Interrupt request clear Register
FFFF EE20H
ICRCG1 W 0 0 0 Clears interrupt request (Effective only when exit input is enabled) 000: INT0 101: reserved 001: INT1 110: reserved 010: INT2 111: INTRTC 011: INT3 100: INT4
ICRCG2
R/W 0 INTRTC exit input 0: Disabled 1: Enabled ICRCG0
3-233
TX1940 Application Note (6) DMA control (1/13)
Symbol
CCR0
Name
DMA channel Control Register 0
Address
FFFF E200H
7
SAC0 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
6
DIO 0 Specifies destination device 0: Memory 1: I/O
5
DAC1
4
DAC0
3
TrSiz1
2 TrSiz0
1 DPS1 0
0 DPS0 0
R/W 0 0 0 0 Specifies how destination Specifies amount of data address will be changed to be transferred in a 00: Incremented single operation 01: Decremented 0x: 32 bits 1x: Fixed 10: 16 bits 11: 8 bits
Specifies I/O device bus width 0x: 32 bits 10: 16 bits 11: 8 bits
15
0 Write 0 to this bit.
14
ExR
13
PosE
12
Lev R/W 0 Write 1 to this bit.
11
SReq 0 Enables Snoop function 0: Disabled 1: Enabled
10
RelEn 0 Enables request for surrender of bus control 0: Disabled 1: Enabled
9
SIO 0 Specifies source device 0: Memory 1: I/O
8
SAC1 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
0 0 Specifies Write 0 to transfer this bit. request mode 1: Initiated by interrupt request 0: Internal request
23
NIEn 1 Enables interrupt on normal termination 0: Disabled 1: Enabled
22
AbIEn
21
20
R/W 0 Write 0 to this bit.
19
0 Write 0 to this bit.
18
0 Write 0 to this bit.
17
Big 1 Write 0 to this bit.
16
0 Write 0 to this bit.
1 1 Enables Write 0 to interrupt on this bit. abnormal termination 0: Disabled 1: Enabled
31
Str W 0 1: Starts DMA Channel 0
30
29
28
27
26
25
24
W 0 Write 0 to this bit.
0
0
0
0
0
0
7 CSR0 DMA Channel status Register 0
FFFF E204H
6
5
4
3
2 0
Write 0 to this bit.
0
0
0
0
0
1 R/W 0
Write 0 to this bit.
0 0
Write 0 to this bit.
15
14
13
12
11
10
9
8
0 23 NC 0
1: Normal Termination Status flag
0 22 AbC R/W 0
1: Abnormal Termination Status flag
0 21 0
Write 0 to this bit.
0 20 BES 0
1: Bus error in source address
0 19 BED R 0
0 18 Conf 0
0 17
0 16
0
0
1: Bus error 1: Configuin destiration nation error address
31 Act R 0
1: DMA Channel 0 in standby state
30
29
28
27
26
25
24
0
0
0
0
0
0
0
3-234
TX1940 Application Note DMA control (2/13)
Symbol
SAR0
Name
DMA Source address Register 0
Address
FFFF E208H
7
SAddr7
6
SAddr6
5
SAddr5
4
SAddr4 R/W Undefined
3
SAddr3
2
SAddr2
1
SAddr1
0
SAddr0
15
SAddr15
14
SAddr14
13
SAddr13
12
SAddr12 R/W Undefined
11
SAddr11
10
SAddr10
9
SAddr9
8
SAddr8
23
SAddr23
22
SAddr22
21
SAddr21
20
SAddr20 R/W Undefined
19
SAddr19
18
SAddr18
17
SAddr17
16
SAddr16
31
SAddr31
30
SAddr30
29
SAddr29
28
SAddr28 R/W Undefined
27
SAddr27
26
SAddr26
25
SAddr25
24
SAddr24
7
DAR0 DMA Destination address Register 0 FFFF E20CH DAddr7
6
DAddr6
5
DAddr5
4
DAddr4 R/W Undefined
3
DAddr3
2
DAddr2
1
DAddr1
0
DAddr0
15
DAddr15
14
DAddr14
13
DAddr13
12
DAddr12 R/W Undefined
11
DAddr11
10
DAddr10
9
DAddr9
8
DAddr8
23
DAddr23
22
DAddr22
21
DAddr21
20
DAddr20 R/W Undefined
19
DAddr19
18
DAddr18
17
DAddr17
16
DAddr16
31
DAddr31
30
DAddr30
29
DAddr29
28
DAddr28 R/W Undefined
27
DAddr27
26
DAddr26
25
DAddr25
24
DAddr24
7
BCR0 DMA Byte Count Register 0 FFFF E210H BC7
6
BC6
5
BC5
4
BC4 R/W Undefined
3
BC3
2
BC2
1
BC1
0
BC0
15
BC15
14
BC14
13
BC13
12
BC12 R/W Undefined
11
BC11
10
BC10
9
BC9
8
BC8
23
BC23
22
BC22
21
BC21
20
BC20 R/W Undefined
19
BC19
18
BC18
17
BC17
16
BC16
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-235
TX1940 Application Note DMA control (3/13)
Symbol
DTCR0
Name
DMA Transfer control Register 0
Address
FFFF E218H
7
6
5
DACM2
4
DACM1 0
3
DACM0 R/W 0
2
SACM2 0
1
SACM1 0
0
SACM0 0
0
0
0
Bit position at which destination address starts 000: Bit 0 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
Bit position at which source address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-236
TX1940 Application Note DMA control (4/13)
Symbol
CCR1
Name
DMA channel Control Register 1
Address
FFFF E220H
7
SAC0 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
6
DIO 0 Specifies destination device 0: Memory 1: I/O
5
DAC1
4
DAC0
3
TrSiz1
2
TrSiz0
1
DPS1
0
DPS0
R/W 0 0 0 0 Specifies how destination Specifies amount of data address will be changed to be transferred in a 00: Incremented single operation 01: Decremented 0x: 32 bits 1x: Fixed 10: 16 bits 11: 8 bits
0 0 Specifies I/O device bus width 0x: 32 bits 10: 16 bits 11: 8 bits
15
0 Write 0 to this bit.
14
ExR 0 Specifies transfer request method 1: Initiated by interrupt request 0: Internal request
13
PosE 0 Write 0 to this bit.
12
Lev R/W 0 Write 1 to this bit.
11
SReq 0 Selects Snoop function 0: Disabled 1: Enabled
10
RelEn 0 Enables request for surrender of bus control 0: Disabled 1: Enabled
9
SIO 0 Specifies source device 0: Memory 1: I/O
8
SAC1 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
23
NIEn 1 Enables interrupt on normal termination 0: Disabled 1: Enabled
22
AbIEn 1 Enables interrupt on abnormal termination 0: Disabled 1: Enabled
21
1 Write 0 to this bit.
20
R/W 0 Write 0 to this bit.
19
0 Write 0 to this bit.
18
0 Write 0 to this bit.
17
Big 1 Write 0 to this bit.
16
0 Write 0 to this bit.
31
Str W 0 1: Starts DMA Channel 1 CSR1 DMA Channel status Register 1 FFFF E224H
30
29
28
27
26
25
24
W 0 Write 0 to this bit.
0
0
0
0
0
0
7
6
5
4
3
2
1
R/W 0 Write 0 to this bit.
0
0 Write 0 to this bit.
0
0
0
0
0
0 Write 0 to this bit.
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
NC
22
21
20
BES
19
18
17
16
AbC R/W 0 0 0 1: Normal 1: Abnormal Write 0 to Termination Termination this bit. Status flag Status flag
BED Conf R 0 0 0 1: Bus error 1: Bus error 1: Configuin source in destiration address nation error address
0
0
31
Act R 0 1: DMA Channel 1 in standby state
30
29
28
27
26
25
24
0
0
0
0
0
0
0
3-237
TX1940 Application Note DMA control (5/13)
Symbol
SAR1
Name
DMA Source address Register 1
Address
FFFF E228H
7
SAddr7
6
SAddr6
5
SAddr5
4
SAddr4 R/W Undefined
3
SAddr3
2
SAddr2
1
SAddr1
0
SAddr0
15
SAddr15
14
SAddr14
13
SAddr13
12
SAddr12 R/W Undefined
11
SAddr11
10
SAddr10
9
SAddr9
8
SAddr8
23
SAddr23
22
SAddr22
21
SAddr21
20
SAddr20 R/W Undefined
19
SAddr19
18
SAddr18
17
SAddr17
16
SAddr16
31
SAddr31
30
SAddr30
29
SAddr29
28
SAddr28 R/W Undefined
27
SAddr27
26
SAddr26
25
SAddr25
24
SAddr24
7
DAR1 DMA Destination address Register 1 FFFF E22CH DAddr7
6
DAddr6
5
DAddr5
4
DAddr4 R/W Undefined
3
DAddr3
2
DAddr2
1
DAddr1
0
DAddr0
15
DAddr15
14
DAddr14
13
DAddr13
12
DAddr12 R/W Undefined
11
DAddr11
10
DAddr10
9
DAddr9
8
DAddr8
23
DAddr23
22
DAddr22
21
DAddr21
20
DAddr20 R/W Undefined
19
DAddr19
18
DAddr18
17
DAddr17
16
DAddr16
31
DAddr31
30
DAddr30
29
DAddr29
28
DAddr28 R/W Undefined
27
DAddr27
26
DAddr26
25
DAddr25
24
DAddr24
7
BCR1 DMA Byte Count Register 1 FFFF E230H BC7
6
BC6
5
BC5
4
BC4 R/W Undefined
3
BC3
2
BC2
1
BC1
0
BC0
15
BC15
14
BC14
13
BC13
12
BC12 R/W Undefined
11
BC11
10
BC10
9
BC9
8
BC8
23
BC23
22
BC22
21
BC21
20
BC20 R/W Undefined
19
BC19
18
BC18
17
BC17
16
BC16
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-238
TX1940 Application Note DMA control (6/13)
Symbol
DTCR1
Name
DMA Transfer control Register 1
Address
FFFF E238H
7
6
5
DACM2
4
DACM1 0
3
DACM0 R/W 0
2
SACM2 0
1
SACM1 0
0
SACM0 0
0
0
0
Bit position at which destination address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
Bit position at which source address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-239
TX1940 Application Note DMA control (7/13)
Symbol
CCR2
Name
DMA channel Control Register 2
Address
FFFF E240H
7
SAC0 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
6
DIO 0 Specifies destination device 0: Memory 1: I/O
5
DAC1
4
DAC0
3
TrSiz1
2
TrSiz0
1
DPS1
0
DPS0
R/W 0 0 0 0 Specifies how destination Specifies amount of data address will be changed to be transferred in a 00: Incremented single operation 01: Decremented 0x: 32 bits 1x: Fixed 10: 16 bits 11: 8 bits
0 0 Specifies I/O device bus width 0x: 32 bits 10: 16 bits 11: 8 bits
15
0 Write 0 to this bit
14
ExR 0 Specifies transfer request method 1: Initiated by interrupt request 0: Internal request
13
PosE 0 Write 0 to this bit.
12
Lev R/W 0 Write 1 to this bit.
11
SReq 0 Selects Snoop function 0: Disabled 1: Enabled
10
RelEn 0 Enables request for surrender of bus control 0: Disabled 1: Enabled
9
SIO 0 Specifies source device 0: Memory 1: I/O
8
SAC1 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
23
NIEn 1 Enables interrupt on normal termination 0: Disabled 1: Enabled
22
AbIEn 1 Enables interrupt on abnormal termination 0: Disabled 1: Enabled
21
1 Write 0 to this bit.
20
R/W 0 Write 0 to this bit.
19
0 Write 0 to this bit.
18
0 Write 0 to this bit.
17
Big 1 Write 0 to this bit.
16
0 Write 0 to this bit.
31
Str W 0 1: Starts DMA Channel 2
30
29
28
27
26
25
24
W 0 Write 0 to this bit.
0
0
0
0
0
0
7
CSR2 DMA Channel status Register 2 FFFF E244H 0
6
5
4
3
2
1
R/W 0 Write 0 to this bit.
0
0 Write 0 to this bit.
0
0
0
0
0 Write 0 to this bit.
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
NC 0 1: Normal Termination Status flag
22
AbC R/W 0 1: Abnormal Termination Status flag
21
0 Write 0 to this bit
20
BES
19
18
17
16
BED Conf R 0 0 0 1: Bus error 1: Bus error 1: Configuin source in destiration address nation error address
0
0
31
Act R 0 1: DMA Channel 2 in standby state
30
29
28
27
26
25
24
0
0
0
0
0
0
0
3-240
TX1940 Application Note DMA control (8/13)
Symbol
SAR2
Name
DMA Source address Register 2
Address
FFFF E248H
7
SAddr7
6
SAddr6
5
SAddr5
4
SAddr4 R/W Undefined
3
SAddr3
2
SAddr2
1
SAddr1
0
SAddr0
15
SAddr15
14
SAddr14
13
SAddr13
12
SAddr12 R/W Undefined
11
SAddr11
10
SAddr10
9
SAddr9
8
SAddr8
23
SAddr23
22
SAddr22
21
SAddr21
20
SAddr20 R/W Undefined
19
SAddr19
18
SAddr18
17
SAddr17
16
SAddr16
31
SAddr31
30
SAddr30
29
SAddr29
28
SAddr28 R/W Undefined
27
SAddr27
26
SAddr26
25
SAddr25
24
SAddr24
7
DAR2 DMA Destination address Register 2 FFFF E24CH DAddr7
6
DAddr6
5
DAddr5
4
DAddr4 R/W Undefined
3
DAddr3
2
DAddr2
1
DAddr1
0
DAddr0
15
DAddr15
14
DAddr14
13
DAddr13
12
DAddr12 R/W Undefined
11
DAddr11
10
DAddr10
9
DAddr9
8
DAddr8
23
DAddr23
22
DAddr22
21
DAddr21
20
DAddr20 R/W Undefined
19
DAddr19
18
DAddr18
17
DAddr17
16
DAddr16
31
DAddr31
30
DAddr30
29
DAddr29
28
DAddr28 R/W Undefined
27
DAddr27
26
DAddr26
25
DAddr25
24
DAddr24
7
BCR2 DMA Byte Count Register 2 FFFF E250H BC7
6
BC6
5
BC5
4
BC4 R/W Undefined
3
BC3
2
BC2
1
BC1
0
BC0
15
BC15
14
BC14
13
BC13
12
BC12 R/W Undefined
11
BC11
10
BC10
9
BC9
8
BC8
23
BC23
22
BC22
21
BC21
20
BC20 R/W Undefined
19
BC19
18
BC18
17
BC17
16
BC16
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-241
TX1940 Application Note DMA control (9/13)
Symbol
DTCR2
Name
DMA Transfer control Register 2
Address
FFFF E258H
7
6
5
DACM2
4
DACM1 0
3
DACM0 R/W 0
2
SACM2 0
1
SACM1 0
0
SACM0 0
0
0
0
Bit position at which destination address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
Bit position at which source address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-242
TX1940 Application Note DMA control (10/13)
Symbol
CCR3
Name
DMA channel Control Register 3
Address
FFFF E260H
7
SAC0 0 Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
6
DIO 0 Specifies destination device 0: Memory 1: I/O
5
DAC1
4
DAC0
3
TrSiz1
2
TrSiz0
1
DPS1
0
DPS0
R/W 0 0 0 0 Specifies how destination Specifies amount of data address will be changed to be transferred in a 00: Incremented single operation 01: Decremented 0x: 32 bits 1x: Fixed 10: 16 bits 11: 8 bits
0 0 Specifies I/O device bus width 0x: 32 bits 10: 16 bits 11: 8 bits
15 0
Write 0 to this bit.
14 ExR 0
Specifies transfer request method 1: Initiated by interrupt request 0: Internal request
13 PosE 0
Write 0 to this bit.
12 Lev R/W 0
Write 1 to this bit.
11 SReq 0
Selects Snoop function 0: Disabled 1: Enabled
10 RelEn 0
Enables request for surrender of bus control 0: Disabled 1: Enabled
9 SIO 0
Specifies source device 0: Memory 1: I/O
8 SAC1 0
Bits 8 and 7 specify how source address will be changed 00: Incremented 01: Decremented 1x: Fixed
23 NIEn 1
Enables interrupt on normal termination 0: Disabled 1: Enabled
22 AbIEn 1
Enables interrupt on abnormal termination 0: Disabled 1: Enabled
21 1
Write 0 to this bit
20 R/W 0
Write 0 to this bit
19 0
Write 0 to this bit
18 0
Write 0 to this bit
17 Big 1
Write 0 to this bit
16 0
Write 0 to this bit
31 Str W 0
1: Starts DMA Channel 3
30
29
28
27
26
25
0
0
0
0
0
0
24 W 0
Write 0 to this bit.
7
CSR3 DMA Channel status Register 3 FFFF E264H 0
6
5
4
3
2
1
R/W 0 Write 0 to this bit.
0
0 Write 0 to this bit.
0
0
0
0
0 Write 0 to this bit.
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
NC 0 1: Normal Termination Status flag
22
AbC R/W 0 1: Abnormal Termination Status flag
21
0 Write 0 to this bit
20
BES
19
18
17
16
BED Conf R 0 0 0 1: Bus error 1: Bus error 1: Configuin source in destiration address nation error address
0
0
31
Act R 0 1: DMA Channel 3 in standby state
30
29
28
27
26
25
24
0
0
0
0
0
0
0
3-243
TX1940 Application Note DMA control (11/13)
Symbol
SAR3
Name
DMA Source address Register 3
Address
FFFF E268H
7
SAddr7
6
SAddr6
5
SAddr5
4
SAddr4 R/W Undefined
3
SAddr3
2
SAddr2
1
SAddr1
0
SAddr0
15
SAddr15
14
SAddr14
13
SAddr13
12
SAddr12 R/W Undefined
11
SAddr11
10
SAddr10
9
SAddr9
8
SAddr8
23
SAddr23
22
SAddr22
21
SAddr21
20
SAddr20 R/W Undefined
19
SAddr19
18
SAddr18
17
SAddr17
16
SAddr16
31
SAddr31
30
SAddr30
29
SAddr29
28
SAddr28 R/W Undefined
27
SAddr27
26
SAddr26
25
SAddr25
24
SAddr24
7
DAR3 DMA Destination address Register 3 FFFF E26CH DAddr7
6
DAddr6
5
DAddr5
4
DAddr4 R/W Undefined
3
DAddr3
2
DAddr2
1
DAddr1
0
DAddr0
15
DAddr15
14
DAddr14
13
DAddr13
12
DAddr12 R/W Undefined
11
DAddr11
10
DAddr10
9
DAddr9
8
DAddr8
23
DAddr23
22
DAddr22
21
DAddr21
20
DAddr20 R/W Undefined
19
DAddr19
18
DAddr18
17
DAddr17
16
DAddr16
31
DAddr31
30
DAddr30
29
DAddr29
28
DAddr28 R/W Undefined
27
DAddr27
26
DAddr26
25
DAddr25
24
DAddr24
7
BCR3 DMA Byte Count Register 3 FFFF E270H BC7
6
BC6
5
BC5
4
BC4 R/W Undefined
3
BC3
2
BC2
1
BC1
0
BC0
15
BC15
14
BC14
13
BC13
12
BC12 R/W Undefined
11
BC11
10
BC10
9
BC9
8
BC8
23
BC23
22
BC22
21
BC21
20
BC20 R/W Undefined
19
BC19
18
BC18
17
BC17
16
BC16
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-244
TX1940 Application Note DMA control (12/13)
Symbol
DTCR3
Name
DMA Transfer control Register 3
Address
FFFF E278H
7
6
5
DACM2
4
DACM1 0
3
DACM0 R/W 0
2
SACM2 0
1
SACM1 0
0
SACM0 0
0
0
0
Bit position at which destination address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
Bit position at which source address starts 000: Counts beginning at bit 0 of the address counter 001: Counts beginning at bit 4 of the address counter 010: Counts beginning at bit 8 of the address counter 011: Counts beginning at bit 12 of the address counter 100: Counts beginning at bit 16 of the address counter 101: Reserved 110: Reserved 111: Reserved
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
3-245
TX1940 Application Note DMA control (13/13)
Symbol
DCR
Name
DMA Control Register
Address
FFFF E280H
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
31
Rst W 0 1: Initializes DMA
30
29
28
27
26
25
24
0
0
0
0
0
0
0
7
DHR DMA Data Holding Register FFFF E28CH DOT7
6
DOT6
5
DOT5
4
DOT4 R/W Undefined
3
DOT3
2
DOT2
1
DOT1
0
DOT0
15
DOT15
14
DOT14
13
DOT13
12
DOT12 R/W Undefined
11
DOT11
10
DOT10
9
DOT9
8
DOT8
23
DOT23
22
DOT22
21
DOT21
20
DOT20 R/W Undefined
19
DOT19
18
DOT18
17
DOT17
16
DOT16
31
DOT31
30
DOT30
29
DOT29
28
DOT28 R/W Undefined
27
DOT27
26
DOT26
25
DOT25
24
DOT24
3-246
TX1940 Application Note (7) 8-Bit Timer control
Symbol
TA01RUN
Name
TMRA01 RUN
Address
FFFF F100H
7
TA0RDE R/W 0 Double Buffer 0: Disabled 1: Enabled TA2RDE
6
5
4
3
I2TA01 0 IDLE 0: Idle 1: Operate I2TA23 0 IDLE 0: Idle 1: Operate
2
TA01PRUN R/W 0
1
TA1RUN 0
0
TA0RUN 0
Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TA23PRUN R/W 0 0 0 Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TA1CLK0 0 TA0CLK1 0 TA0CLK0 0 TA3RUN TA2RUN
TA23RUN
TMRA23 RUN
FFFF F108H
R/W 0 Double Buffer 0: Disabled 1: Enabled TA01M1 TA01M0 0 PWM01 0 PWM period 00: Reserved 01: 26-1 10: 27-1 11: 28-1 PWM21 0 PWM period 00: Reserved 01: 26-1 10: 27-1 11: 28-1 PWM20 0 PWM00 0
TA1CLK1 R/W 0
TA01MOD
TMRA01
FFFF F104H 0 Operation mode 00: 8-Bit Timer Mode 01: 16-Bit Timer Mode 10: 8-Bit PPG Mode 11: 8-Bit PWM Mode TA23M1 TA23M0 0
TMRA1 source clock 00: TA0TRG 01: T1 10: T16 11: T256 TA3CLK1 R/W 0 TA3CLK0 0
TMRA0 source clock 00: TA0IN pin input 01: T1 10: T4 11: T16 TA2CLK1 0 TA2CLK0 0
TA23MOD
TMRA23
FFFF F10CH 0 Operation mode 00: 8-Bit Timer Mode 01: 16-Bit Timer Mode 10: 8-Bit PPG Mode 11: 8-Bit PWM Mode
TMRA3 source clock 00: TA2TRG 01: T1 10: T16 11: T256 TAFF1C1 TAFF1C0
TMRA2 source clock 00: TA2IN 01: T1 10: T4 11: T16 TAFF1IE 0 TA1FF inversion control 0: Disabled 1: Enabled TAFF3IE R/W 0 TA3FF inversion control 0: Disabled 1: Enabled TAFF1IS 0 Specifies TA1FFinverting signal 0: TMRA0 1: TMRA1 TAFF3IS 0 Specifies TA3FFinverting signal 0: TMRA2 1: TMRA3 R/W
TA1FFC R
TMRA1
FFFF F105H 1 00: Invert TA1FF 01: Set TA1FF 10: Clear TA1FF 11: Don't care 1
TAFF3C1 TA3FFC R TMRA3 FFFF F10DH 1
TAFF3C0 1
00: Invert TA3FF 01: Set TA3FF 10: Clear TA3FF 11: Don't care
3-247
TX1940 Application Note (8) 16-Bit Timer control (1/3)
Symbol
TB0RUN
Name
TMRB0 RUN
Address
FFFF F180H
7
TB0RDE R/W 0 Double Buffer 0: Disabled 1: Enabled TB1RDE
6
0 Write 0 to this bit.
5
4
3
I2TB0 0 IDLE 0: Idle 1: Operate I2TB1 0 IDLE 0: Idle 1: Operate I2TB2 0 IDLE 0: Idle 1: Operate I2TB3 0 IDLE 0: Idle 1: Operate R/W
2
TB0PRUN 0
1
0
TB0RUN R/W 0
Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TB1PRUN R/W 0 16 Bit Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TB2PRUN R/W 0 Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TB3PRUN R/W 0 16 Bit Timer Run/Stop Control 0: Stop & Clear 1: Run (Count up) TB0CLE R/W 0 Up-counter control 0: Clear disabled 1: Clear enabled TB0CLK1 0 TB0CLK0 0 TB3RUN R/W 0 TB2RUN R/W 0 TB1RUN R/W 0
R/W 0 Write 0 to this bit.
TB1RUN
TMRB1 RUN
FFFF F190H
0 Double Buffer 0: Disabled 1: Enabled TB2RDE
R/W 0 Write 0 to this bit.
TB2RUN
TMRB0 RUN
FFFF F1A0H
0 Double Buffer 0: Disabled 1: Enabled TB3RDE
R/W 0 Write 0 to this bit.
TB3RUN
TMRB1 RUN
FFFF F1B0H
0 Double Buffer 0: Disabled 1: Enabled
0
TB0CP0 W* 1 Software capture control 0: Software capture 1: Don't care
TB0CPM1 0
TB0CPM0 0
TB0MOD
TMRB0
FFFF F182H
0
Must always be set to 00.
Capture timing 00: Disabled 01: TB0IN0 TB0IN1 10: TB0IN0 TB0IN1 11: TA1OUT TA1OUT
Specifies source clock 00: TB0IN0 pin input 01: T1 10: T4 11: T16
3-248
TX1940 Application Note (8) 16-Bit Timer control (2/3)
Symbol
TB1MOD
Name
TMRB1
Address
FFFF F192H
7
R/W 0
6
0
5
TB1CP0 W* 1
4
TB1CPM1 0
3
TB1CPM0 0
2
TB1CLE R/W 0 Up-counter control 0: Clear disabled 1: Clear enabled TB2CLE R/W 0 Up-counter control 0: Clear disabled 1: Clear enabled
1
TB1CLK1 0
0
TB1CLK0 0
Must always be set to 00. Software capture control 0: Software capture 1: Don't care TB2MOD TMRB2 FFFF F1A2H 0 0 TB2CP0 W* 1 Software capture control 0: Software capture 1: Don't care
Capture timing 00: Disabled 01: TB1IN0 TB1IN1 10:TB1IN0 TB1IN1 11: TA1OUT TA1OUT TB2CPM1 0 TB2CPM0 0
Specifies source clock 00: TB1IN0 pin input 01: T1 10: T4 11: T16
TB2CLK1 0
TB2CLK0 0
Must always be set to 00.
Capture timing 00: Disabled 01: TB2IN0 TB2IN1 10:TB2IN0 TB2IN1 11: TA1OUT TA1OUT
Specifies source clock 00: TB0IN0 pin input 01: T1 10: T4 11: T16
TB3MOD TMRB3 FFFF F1B2H 0
0
TB3CP0 W* 1 Software capture control 0: Software capture 1: Don't care TB0C1T1 0
TB3CPM1 0
TB3CPM0 0
TB3CLE R/W 0 Up-counter control 0:Clear disabled 1: Clear enabled
TB3CLK1 0
TB3CLK0 0
Must always be set to 00.
Capture timing 00: Disabled 01: Disabled 10: Disabled 11: TA1OUT TA1OUT
Specifies source clock 00: TB3IN0 pin input 01: T1 10: T4 11: T16
TB0FFCR
W* 1
TB0C0T1 R/W 0
TB0E1T1 0
TB0E0T1 0
TB0FF0C1 1
TB0FF0C0 1
TMRB0
FFFF F183H
W*
1
Must always be set to 11.
TB0FF0 inversion trigger 0: Disables trigger 1: Enables trigger When capturing up-counter value into TB0CP1 When capturing up-counter value into TB0CP0
* Always read as 11.
Controls TB0FF0 00: Invert 01: Set 10: Clear When upWhen upcounter and counter and 11: Don't care * Always read as 11. TB0RG0 TB0RG1 match match
3-249
TX1940 Application Note (8) 16-Bit Timer control (3/3)
Symbol
TB1FFCR
Name
TMRB1
Address
FFFF F193H
7
W* 1
6
1
5
TB1C1T1 0
4
TB1C0T1 R/W 0
3
TB1E1T1 0
2
TB1E0T1 0
1
TB1FF0C1 1 W*
0
TB1FF0C0 1
Must always be set to 11.
TB1FF0 inversion trigger 0: Disables trigger 1: Enables trigger When capturing up-counter value into TB1CP1 TB2C1T1 0 When capturing up-counter value into TB1CP0 TB2C0T1
* Always read as 11.
Controls TB1F0 00: Invert 01: Set 10: Clear When upWhen upcounter and counter and 11: Don't care * Always read as 11. TB1RG1 TB1RG0 match match TB2E1T1 0 TB2E0T1 0 TB2FF0C1 1 TB2FF0C0 1
TB2FFCR
W* 1
TMRB2
FFFF F1A3H
R/W 0 TB2FF0 inversion trigger 0: Disables trigger 1: Enables trigger When capturing up-counter value into TB2CP1 TB3C1T1 0 When capturing up-counter value into TB2CP0 TB3C0T1 R/W 1 0 0 0 1 TB3FF0 inversion trigger 0: Disables trigger 1: Enables trigger When capturing up-counter value into TB3CP1 When capturing up-counter value into TB3CP0
W*
1
Must always be set to 11.
* Always read as 11.
Controls TB2FF0 00: Invert 01: Set 10: Clear When upWhen upcounter and counter and 11: Don't care * Always read as 11. TB2RG1 TB2RG0 match match TB3E1T1 TB3E0T1 TB3FF0C1 TB3FF0C0 1
TB3FFCR
W*
TMRB3
FFFF F1B3H
W*
1
Must always be set to 11.
* Always read as 11.
Controls TB3FF0 00: Invert 01: Set 10: Clear When upWhen upcounter and counter and 11: Don't care * Always read as 11. TB3RG1 TB3RG0 match match
3-250
TX1940 Application Note (9) UART/Serial channel (1/4)
Symbol Name Address 7
RB8 R SC0CR Serial Channel 0 Control FFFF F201H 0 Bit 8 of received data TB8 0 Serial Channel 0 Mode0 Bit 8 of transmissio n data 0 Parity type 0: Odd 1: Even CTSE 0 Controls handshaking function 0: Disables CTS 1: Enables CTS BR0ADDE 0 N+ (16-K)/16 Division function 0: Disabled 1: Enabled
6
EVEN R/W
5
PE 0
4
OERR 0
3
PERR 0 1: Error Parity SM1 R/W 0
2
FERR 0
1
SCLKS R/W 0 0:SCLK0 1:SCLK0
0
IOC 0 0: Baud rate generator 1: SCLK0 pin input SC0 0
R (Cleared to 0 by reading)
Parity 0: Disabled 1: Enabled Overrun RXE 0 Controls reception 0: Disables reception 1: Enables reception WU 0 Wake-up function 0: Disabled 1: Enabled
Framing SM0 0 SC1 0
SC0MOD0
FFFF F202H
Serial transfer mode 00: I/O Interface Mode 01: 7-Bit UART Mode 10: 8-Bit UART Mode 11: 9-Bit UART Mode
Serial transfer clock (for UART) 00: Timer TA0TRG 01: Baud rate generator 10: Internal clock fSYS/2 11: External clock (SCLK0 input) BR0S1 0 BR0S0 0
0 BR0CR Baud Rate Control FFFF F203H Write 0 to this bit
BR0CK1 0 00: T0 01: T2 10: T8 11: T32
BR0CK0 R/W 0
BR0S3 0
BR0S2 0
Specifies value of divisor N
BR0K3 BR0ADD Baud Rate Control FFFF F204H I2S0 R/W 0 SC0MOD1 Serial Channel 0 Mode1 FFFF F205H IDLE 0: Idle 1: Operate FDPX0 R/W 0 Synchronous operation 1: Fullduplex 0: Halfduplex 0
BR0K2 R/W 0
BR0K1 0
BR0K0 0
Specifies K value for N + (16 - K) / 16 Division
3-251
TX1940 Application Note UART / Serial channel (2/4)
Symbol Name Address 7
RB8 R SC1CR Serial Channel 1 Control FFFF F209H 0 Bit 8 of received data TB8 0 Serial Channel 1 Mode 0 Parity type 0: Odd 1: Even CTSE 0
6
EVEN R/W
5
PE 0
4
OERR 0
3
PERR 0 1: Error Parity SM1 R/W 0
2
FERR 0
1
SCLKS R/W 0 0: SCLK1 1: SCLK1
0
IOC 0 0: Baud rate generator 1: SCLK0 pin input SC0 0
R (Cleared to 0 by reading)
Parity 0: Disabled 1: Enabled Overrun RXE 0 Controls reception 0: Disables reception 1: Enables reception WU 0 Wake-up function 0: Disabled 1: Enabled
Framing SM0 0 SC1 0
SC1MOD0
FFFF F20AH
Bit 8 pof Controls transmission handdata shaking function 0: Disables CTS 1: Enables CTS 0 BR1ADDE 0 N+ (16-K)/16 Division function 0: Disabled 1: Enabled
Serial transfer mode 00: I/O Interface Mode 01: 7-Bit UART Mode 10: 8-Bit UART Mode 11: 9-Bit UART Mode
Serial transfer clock (for UART) 00: Timer TA0TRG 01: Baud rate generator 10: Internal clock fSYS/2 11: External clock (SCLK1 input) BR1S1 0 BR1S0 0
BR1CK1 0 00: 01: 10: 11: T0 T2 T8 T32
BR1CK0 R/W 0
BR1S3 0
BR1S2 0
BR1CR
Baud Rate Control
FFFF F20BH
Write 0 to this bit.
Specifies value of divisor N
BRK1K3 BR1ADD Baud Rate Control FFFF F20CH I2S0 R/W 0 SC1MOD1 Serial Channel 1 Mode1 FFFF F20DH IDLE 0: Idle 1: Operate 0 Synchronous operation 1: Fullduplex 0: Halfduplex FDPX0 0
BRK1K2 R/W 0
BRK1K1 0
BRK1K0 0
Specifies K value for N + (16 - K) / 16 Division
3-252
TX1940 Application Note UART/Serial channel (3/4)
Symbol Name
Serial Channel 3 Control
Address
7
RB8 R
6
EVEN R/W 0 Parity type 0: Odd 1: Even CTSE 0
5
PE 0
4
OERR 0
3
PERR 0 1: Error Parity SM1 R/W 0
2
FERR 0
1
R/W 0
0
0
R (Cleared to 0 by reading)
SC3CR
FFFF F281H
0 Bit 8 of received data TB8 0
Parity 0: Disabled Overrun 1: Enabled RXE 0 Controls reception 0: Disables reception 1: Enables reception BR3CK1 0 00: T0 01: T2 10: T8 11: T32 WU 0 Wake-up function 0: Disabled 1: Enabled
Must always be set to 0. Framing SM0 0 SC1 0 SC0 0
SC3MOD0
Serial Channel 3 Mode
FFFF F282H
Bit 8 of Must transmission always be data set to 0.
Serial transfer mode 00: Reserved 01: 7-Bit UART Mode 10: 8-Bit UART Mode 11: 9-Bit UART Mode BR3S3 BR3S2 0
Serial transfer clock (for UART) 00: Timer TA0TRG 01: Baud rate generator 10: Internal clock fSYS/2 11: Don't care BR3S1 0 BR3S0 0
0 BR3CR Baud Rate Control FFFF F283H Write 0 to this bit.
BR3ADDE 0 N+ (16-K)/16 Division function 0: Disabled 1: Enabled
BR3CK0 R/W 0
0
Specifies value of divisor N
BR3K3 BR3ADD Baud Rate Control FFFF F284H I2S0 SC3MOD1 Serial Channel 3 Mode1 R/W FFFF F285H 0 IDLE 0: Idle 1: Operate 0
BR3K2 R/W 0
BR3K1 0
BR3K0 0
Specifies K value for N + (16 - K) / 16 Division
3-253
TX1940 Application Note UART/Serial channel (4/4)
(9-4) UART only Channel4 Symbol Name
Serial Channel 4 Control
Address
7
RB8 R
6
EVEN R/W 0 Parity type 0: Odd 1: Even CTSE 0
5
PE 0
4
OERR 0
3
PERR 0 1: Error Parity SM1 R/W 0
2
FERR 0
1
R/W 0
0
0
R (Cleared to 0 by reading)
SC4CR
FFFF F289H
0 Bit 8 of received data TB8 0
Parity 0: Disabled Overrun 1: Enabled RXE 0 Controls reception 0: Disables reception 1: Enables reception BR4CK1 0 00: 01: 10: 11: T0 T2 T8 T32 WU 0 Wake-up function 0: Disabled 1: Enabled
Must always be set to 0. Framing SM0 0 SC1 0 SC0 0
SC4MOD0
Serial Channel 4 Mode
FFFF F28AH
Must Bit 8 of transmission always be set to 0. data
Serial transfer mode 00: Reserved 01: 7-Bit UART Mode 10: 8-Bit UART Mode 11: 9-Bit UART Mode BR4S3 BR4S2 0
Serial transfer clock (for UART) 00: Timer TA0TRG 01: Baud rate generator 10: Internal clock fSYS/2 11: Don't care BR4S1 0 BR4S0 0
0 BR4CR Baud Rate Control FFFF F28BH Write 0 to this bit.
BR4ADDE 0 N+ (16-K)/16 Division function 0: Disabled 1: Enabled
BR4CK0 R/W 0
0
Specifies value of divisor N
BR4K3 BR4ADD Baud Rate Control FFFF F28CH I2S0 SC4MOD1 Serial Channel 4 Mode1 R/W FFFF F28DH 0 IDLE 0: Idle 1: Operate 0
BR4K2 R/W 0
BR4K1 0
BR4K0 0
Specifies K value for N + (16 - K) / 16 Division
3-254
TX1940 Application Note (10) I2C bus / Serial channel control
Symbol Name Address
FFFF F240H (I2C Bus Mode)
7
BC2
6
BC1
5
BC0
4
ACK R/W 0 Acknowledgment clock 0: Not generated 1: Generated SIOM0
3
2
1
0/
SBI0CR1 Serial Bus Interface Control Register 1
W 0 0 Specifies number of bits to be transferred (when = 0) 000: 8, 001: 1, 010: 2 011: 3, 100: 4, 101: 5 110: 6, 111: 7
0
SCK0 SCK2 SCK1 SWRMON W W R/W 0 0 1 Specifies internal SCL output clock frequency and reflects reset state (when writing) 000: 4, 001: 5, 010: 6 011: 7, 100: 8, 101: 9 110: 10, 111: Reserved SCK0 R/W 0 0 1 Specifies serial clock frequency (when writing) 000 : 3, 001 : 4, 010 : 5 011 : 6, 100 : 7, 101 : 8 110 : 9, 111 : external clock W SCK2 SCK1
SIOS FFFF F240H 0 (SIO Mode) Controls transfer 0: Finishes transfer 1: Starts transfer SBI0DBR SBI Buffer Register I2C bus Address Register FFFF F241H FFFF F242H DB7
SIOINH W 0 Forcibly stops transfer 0: Transfer continues 1: Transfer stops DB6
SIOM1
0 0 Specifies transfer mode 00: Transmit Mode 01: Reserved 10: Transmit/Receive Mode 11: Receive Mode DB5
DB4 DB3 R (Receiving)/W (Transmission) Undefined SA3 W 0 SA2 0
DB2
DB1
DB0
SA6 0
SA5 0
SA4 0
SA1 0
SA0 0
ALS 0 Address recognition 0 : Recognize 1 : Do not recognize SWRST0
I2C0AR
Specifies slave address when device is operating as slave device
MST SBI0CR2 Serial Bus when Interface writing Control Register 2 SBI0SR when reading
TRX
BB 0 Generates start/stop state
PIN W 1 Clears INTSBSI interrupt request
SBIM1
SBIM0
SWRST1
FFFF F243H (I2C Bus Mode)
0 0 Specifies Specifies master/slave transmit/ receive
MST
TRX
BB
PIN
0 0 Reflects Transmit/ master/slave Receive selection selection
0 1 Reflects I2C Monitors bus state INTS2 interrupt request
FFFF F243H (SIO Mode)
0 0 Serial bus interface operation mode 00: Port Mode 01: SIO Mode 10: I2C Bus Mode 11: Reserved AL AAS R 0 0 Detects Detects arbitration- slave lost address condition 0: 0: 1: Detect 1: Detect SIOF SEF R 0 0 Reflects Reflects transfer status of state shift 0: Finished operation 1: Transfer 0: Finished in 1: Shift in progress progress
0 0 Generates software reset. A reset is generated by writing 10 and then 01.
AD0 0 Detects general call 0: 1: Detect
LRB 0 Reflects last bit received 0: "0" 1: "1"
SBI0BR0
Serial Bus Interface Control Register 0
FFFF F244H
I2SBI0 R/W 0 IDLE 0: Idle 1: Operate P4EN
W 0 Must always be set to 0.
SBI0BR1
Serial Bus Interface Control Register 1
FFFF F245H
R/W 0
Internal clock 0: Idle 1: Operate
3-255
TX1940 Application Note (11) AD converter control
Symbol Name Address 7
EOCF R 0 AD Conversion End flag 0: Conversion in progress 1: Finished 0 AD Conversion Busy flag 0: Conversion stopped 1: Conversion in progress I2AD R/W 0 A/D ADMOD1 MODE Reg1 Controls application of VREF 0 IDLE 0: Stops application of VREF 1: Applies VREF 0 0 0 Write 0 to this bit 0 Write 0 to this bit 0 INT timing during repeat mode
6
ADBF
5
4
3
ITM0 R/W
2
REPEAT 0 1: Repeat
1
SCAN 0 1: Scan
0
ADS 0 1: Start
A/D ADMOD0 MODE Reg0
FFFF F310H
VREFON
ADTRGE
ADCH2 R/W
ADCH1 0
ADCH0 0
FFFF F311H
0: OFF 1: ON
Selects analog input channel Controls external AD 000: AN0 AN0 001: AN1 AN0 AN1 trigger 010: AN2 AN0 AN1 AN2 0: Disabled 011: AN3 AN0 AN1 AN2 AN3 1: Enabled 100: AN4 AN4 101: AN5 AN4 AN5 110: AN6 AN4 AN5 AN6 111: AN7 AN4 AN5 AN6 AN7 ADR0RF R 0 ADR07 ADR06 R Undefined ADR05 ADR04 ADR03 ADR02
AD REG04L AD REG04H AD REG15L
AD Result Reg 0/4 low AD Result Reg 0/4 high AD Result Reg 1/5 low AD Result Reg 1/5 high AD Result Reg 2/6 low AD Result Reg 2/6 high AD Result Reg 3/7 low AD Result Reg 3/7 high
FFFF F300H FFFF F301H FFFF F302H FFFF F303H FFFF F304H FFFF F305H FFFF F306H FFFF F307H
ADR01 R
ADR00
Undefined ADR09 ADR08
ADR11 R
ADR10
ADR1RF R 0 ADR17 ADR16 R Undefined ADR15 ADR14 ADR13 ADR12
Undefined ADR19 ADR18
AD REG15H AD REG26L AD REG26H AD REG37L AD REG37H
ADR21 R
ADR20
ADR2RF R 0 ADR27 ADR26 R Undefined ADR25 ADR24 ADR23 ADR22
Undefined ADR29 ADR28
ADR31 R
ADR30

ADR3RF R 0
Undefined ADR39 ADR38 ADR37 ADR36 R Undefined ADCCK1 R/W 0 ADR35 ADR34 ADR33
ADR32
ADCCK0 0
ADCCLK
AD MODE Clock Reg
FFFF EE04H
Selects AD conversion clock 00: fsys/2 01: fsys/4 10: fsys/8 11:Reserved
3-256
TX1940 Application Note (12) Watchdog Timer
Symbol Name Address 7
WDTE R/W WDMOD WDT MODE Reg FFFF F090H 1 1: 0 WDT 00: 216/fsys 01: 218/fsys control 10: 220/fsys 11: 222/fsys W B1H: WDT disable code; 4EH: WDT clear code
6
WDTP1 R/W
5
WDTP0 0
4
3
2
I2WDT 0
1
RESCR R/W 0
0
0
IDLE 1: Internal Write 0 to 0: Idle connection this bit. 1: Operate to RESET pin enabled
WDCR
WD Control
FFFF F091H
(13) Timer for Real-Time Clock
Symbol Name Address 7
Timekeeping Timer Control Register R/W FFFF F0A0H 0 Write 0 to this bit.
6
5
4
3
RTCRCLR R/W 0 0: Clears Accumulator
2
RTCSEL1 R/W 0 00: 214/fs 01: 213/fs 10: 212/fs 11: 211/fs RUI2 0
1
RTCSEL0 0 0:
0
RTCRUN R/W 0 STOP & CLR 1: RUN
RTCCR
RTCREG Accumulator
FFFF F0A4H
RUI7 0
RUI6 0
RUI5 0
RUI4 R 0
RUI3 0
RUI1 0
RUI0 0
(14) Flash control/status
Symbol Name Address 7 6 5 4 3 2 1 0
SEQON R/W Security Mode SEQMOD FFFFE510 Reg 1 1: Security on 0: Security off W Must be written as 0x0000_00C5. W Security Control Reg Must be written as 0x0000_00C5. W Must be written as 0x0000_00C5. W Must be written as 0x0000_00C5. LVDD R/W 0 0: Normal FLCS Flash Control/ Status Reg FFFF E520H (R) Cleared (W) : Abnormal RDY/BSY R 1 0: Busy 1: Ready R/W 0 Must be written as "0". FSE R/W 0 0: Access main logic. 1: Access security logic.
SEQCNT
FFFFE514
Note:
This register is a 32-bit register, which must be accessed in 32-bit units.
3-257
TX1940 Application Note
3
3.9
TX1940 Internal Circuits Used
The tables below list the TX1940 internal circuits which are used in these application notes. (1) External interrupts
Interrupt Source
INT0 INT1 INT2 INT3 INT4 INT5 INT6 INT7 INT8 INT9 INTA NMI
Purpose of Use in Application Notes
Starts/Stops DC motors; starts stopwatch Unused Unused Unused Unused Unused Unused Unused Unused Unused Unused Takes stopwatch out of standby mode
(2) Port functions
Port
Port 0 Port 1 Port 2 Port 3 Port 4 Unused Unused Unused Unused P40 P41 P42 P43 P44 P50 P51 P52 P53 P54 P55 P56 P57 P70 P71 P72 P73 P74 P75 P76 P77 Port 8 Port 9 Port A P87-P80 P97-P90 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 Unused
Purpose of Use in Application Notes
DIP switch digit output Unused
Port 5
Port 7
Reads matrix key Reads matrix key Reads matrix key Reads matrix key Matrix key digit output Unused Matrix key digit output Unused Unused Matrix key digit output Matrix key digit output Unused Outputs 7-segment LED and indicator LED display data Unused Switches display digit between 7-segment LEDs and indicator LEDs Switches display digit between 7-segment LEDs and indicator LEDs Switches display digit between 7-segment LEDs and indicator LEDs Switches display digit between 7-segment LEDs and indicator LEDs Switches display digit between 7-segment LEDs and indicator LEDs Unused Unused Unused
3-258
TX1940 Application Note (3) Chip select and wait controller
Block
CS0 CS1 CS2 CS3 Unused Unused Unused Unused
Purpose of Use in Application Notes
(4) DMA controller (DMAC)
Channel Used
Channel 0 Channel 1 Channel 2 Channel 3
Purpose of Use in Application Notes
Please refer to Section 3.7, Other Features Unused Unused Unused
Remarks
Memory-to-memory transfer
(5) 8-Bit timers (TMRA)
Module
TMRA01 TMRA23
Mode Used
8-Bit Interval Timer 8-Bit Interval Timer 8-Bit Interval Timer 8-bit PWM
Channel Used
TMRA1(TA1FF) TMRA1 TMRA2 TMRA2 (TA3FF)
Purpose of Use in Application Notes Beep tone output (output) Combined with TMRB0 Analog data sample period DC motor drive (output)
(6) 16-bit timers (TMRB)
Channel Used
TMRB0 TMRB1 TMRB2 TMRB3 Capture feature Unused 16-Bit Interval Timer Mode Unused
Mode Used
Purpose of Use in Application Notes
Motor encoder pulse input Unused 2-ms Interval Timer interrupt Unused
(7) Serial channels (SIO)
Channel
SIO0 SIO1 SIO2 SIO3 Unused UART Mode Unused Unused
Mode Used
Purpose of Use in Application Notes
Unused PC communications (via RS-232C) Unused Unused
(8) Serial bus interface (SBI)
Channel
SBI
2
Mode Used
I C Bus Mode (multimasters)
Purpose of Use in Application Notes
E2PROM access
(9) Analog-to-digital converter
Mode Used
Channel fixed Channel scan
Channel Used
AN2 AN3 AN0AN1
Conversion Mode
Single-Conversion Mode Single-Conversion Mode Single-Conversion Mode
Purpose of Use in Application Notes AD conversion key input Motor revolution control Microphone input, photo-interrupter input
(10) Watchdog Timer
Control
Enable examples Disable examples Sample programs
Purpose of Use in Application Notes
Please refer to Section 3.7, Other Features
3-259
TX1940 Application Note
(11) Real-Time
Counter
Purpose of Use in Application Notes
Time count control
Interrupt Interval
0.5 sec
3-260

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