Press Release
NEW CYPRESS X36 DUAL-PORTS SOLVE MEMORY BANDWIDTH BOTTLENECK FLEx36 Family Offers 7.2-Gbps Throughput with Flexible Data Interface SAN JOSE, Calif., March 1, 1999 -- Addressing the growing need for increased throughput, Cypress Semiconductor Corp. (NYSE:CY) today introduced the FLEx36 family of x36 dual-port SRAMs. The FLEx36 dual-ports operate at 3.3V and deliver unsurpassed performance at 100 MHz. With two 36-bit wide ports each operating at 100 MHz, the FLEx36 devices offer a bandwidth up to 7.2 Gbps. The devices are available up to an industry-best 1 Mbit density, and offer a flexible data interface that allows designers to seamlessly mesh buses of different widths without using external logic. "We have had tremendous success with the new line of 1 Mbit dual-ports announced last year," said Geoff Charubin, director of marketing for Cypress's DataCom product line. "Many of the customers who are using our new dual-ports are anxious for x36 devices with enhanced features and performance, and the FLEx36 family delivers that combination." FLEx36 Features The new dual-ports allow users to feed different bus widths into each port, creating a seamless interface between disparate data flows. This can be accomplished in two ways: The "bus funnel" feature on the right port allows users to simply select a x9, x18, or x36 width with no external logic. The left port offers the standard "byte select" feature, allowing designers to select the order in which bytes are read. The FLEx36 dual-ports are offered in a package that is 50% smaller than competing x36 dual-ports, and dissipate only half the power of other 36-bit wide offerings. The synchronous FLEx36 devices also have an on-board burst-counter that simplifies data addressing by allowing users to supply a single address that the dual-port automatically increments on each subsequent clock cycle. The counter cycles the entire depth of the RAM and wraps around. With this feature, overall system design is simplified by integrating addressing logic into the memory.
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Cypress Debuts x36 Dual-Ports - Page 2 FLEx36 dual-ports give users the ability to select either flowthrough or pipelined operation on each port, independent of the mode of the other port. Designers can match each port to its respective processor's most efficient mode of operation to maximize performance and ease the design Dual-port RAMs allow the same piece of data to be shared by multiple processors and/or busses. Two ports provide independent access for reads and writes to any location in memory. They are used in performance-driven markets such as mass storage, base stations, telecom, and data communications. Aggressive Specialty Memory Push The new dual-ports are part of an aggressive specialty memory push by Cypress. In 1996, Cypress introduced the Deep Sync FIFO family, the first high density FIFOs with industry-standard pinouts. In 1997, Cypress debuted the first 1-Mbit FIFO, and followed that with a family of synchronous 3.3-V FIFOs in 1998 and a line of x36 FIFOs last month. In August 1998, Cypress rolled out over 60 new dual-ports, including the first at 1 Mbit, giving it the industry's broadest line of dual-port SRAMs. Price and Availability The FLEx36 dual-ports include 32K x 36 and 16K x 36 devices in both synchronous and asynchronous versions. They are expected to sample in April, with full production in Q299. All the devices are offered in 144-pin TQFP and 144-ball FBGA packages. In 10,000 unit quantities, the 1-Mbit devices are priced starting at $45, and the 512K dual-ports start at $35. Cypress Semiconductor Corporation, headquartered in San Jose, California, provides a broad range of integrated circuits for leading computer, networking, and telecommunications companies worldwide. Cypress's products include static RAM and specialty memories, programmable logic devices (PLDs), data communications products, timing devices, and USB microcontrollers. Its shares are listed on the New York Stock Exchange under the symbol CY, and its web site is http://www.cypress.com. "Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks. ### FLEx36 and Deep Sync are trademarks of Cypress Semiconductor Corp.
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