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Audio ICs 2-wire serial sound control IC BH3856S / BH3856FS The BH3856S and BH3856FS are signal processing ICs designed for volume and tone control in televisions, mini component stereo systems, and other audio products. Their two-line serial control (I2C BUS) enables them to control volume and tone on the basis of signals from a microcomputer, etc. FApplications Televisions, [video equipped television], personal computer televisions, mini component stereo systems, car stereos FFeatures 1) I2C BUS facilitates direct serial control from a microcomputer of volume (main volume), balance (left / right), and tone (bass, treble). DC control is also possible. 2) Volume is produced by a low-distortion, low-noise VCA. Designed to minimize step noise. FAbsolute maximum ratings (Ta = 25_C) 3) Stable standard voltage supply and built-in I / O buffer mean that few attachments are needed. SSOP32 package designed to save space. 4) Matrix surround yields powerful sound. FRecommended operating conditions (Ta = 25_C) 648 Audio ICs FBlock diagram BH3856S / BH3856FS 649 Audio ICs FPin descriptions BH3856S / BH3856FS 650 Audio ICs FInput / output circuits BH3856S / BH3856FS 651 Audio ICs BH3856S / BH3856FS 652 Audio ICs BH3856S / BH3856FS FElectrical characteristics (unless otherwise noted, Ta = 25_C, VCC = 9V, f = 1kHz, BW = 20 X 20kHz, VOL = Max., TONE = ALL FLAT, Rg = 600, RL = 10k) 653 Audio ICs FMeasurement circuit BH3856S / BH3856FS 654 Audio ICs FPerforming data settings (1) I2C BUS timing BH3856S / BH3856FS 655 Audio ICs (2) I2C BUS data format BH3856S / BH3856FS S S S S S S (3) S Slave address A Select address Data P = start condition (start bit recognition) = IC recognition. Upper 7 bits are random. Bottom bit is "L" for the sake of overwrite. = acknowledge bit (recognition of acknowledgment) = selection between volume, bass, treble, and matrix surround = volume and tone data = stop condition (stop bit recognition) BH3856S / BH3856FS slave addresses S Slave address selection 1 A = 1 (10000010) [SASS pin HIGH] 2 A = 0 (10000000) [SASS pin LOW] (4) Interface protocol (1) Basic protocol (2) Auto increment (Select address increases ()1) by the value of the data.) (Examples) 1 2 3 The address data specified by select address is taken as data 1. The address data specified by select address )1 is taken as data 2. The address data specified by select address )N is taken as data N. (3) Structure with which transmission is not possible (In this case, only select address 1 is set.) Note:Following transmission of data, data transmitted as select address 2 will not be recognized as select address 2, but as data. 656 Audio ICs (5) Specification of select address and data BH3856S / BH3856FS S The auto increment function cycles the select address in the manner shown in Figure A. (Figure A) 0 ! 1 ! 2 " # 4 zzz 3 S The cycle commences from the initially specified select address. (6) Surround data (7) Matrix surround 657 Audio ICs (8) Volume attenuation (reference values) BH3856S / BH3856FS Note: All figures in this table are reference values. When using this IC, check this table carefully and perform the appropriate setting. (9) Bass / Treble gain settings (reference values) Notes: (1) The gain values in the treble and bass data setting tables above are based on the assumption that the filter constants have been set so that maximum and minimum gain are equal to the peak and bottom values listed in the frequency characteristics drawings. (2) All figures in this table are reference values. When using this IC, check this table carefully and perform the appropriate setting. 658 Audio ICs FApplication example BH3856S / BH3856FS 659 Audio ICs FOperation notes (1) Operating power supply voltage range As long as the operating power supply voltage and ambient temperature are kept within the specified range, the basic circuits are guaranteed to function, but be sure to check the constants as well as the element settings, voltage settings, and temperature settings. (2) Bass filter BH3856S / BH3856FS S B.P.F. composed of multiple feedback active f0 can be varied according to the value of C. (theoretical equation) f0 = 1 2 1 R1R2C1C2 *1 1 2 Q R1 R2C1C2 1 2 (C1)C2) *1 Note: Filter gain is calculated using the equation on the left. Total output R2 G= 5k C1 1) C2 gain is the sum of the gain for each of the internal circuits. (When R1 = 5.1k, R2 = 50k, C1 = C2 = C) f0 = 1.0 10 C *5 Q 1.57 G = 5.0 660 Audio ICs (3) About the treble filter BH3856S / BH3856FS S The band-pass filter is constructed using a multiple-feedback active filter. f0 can be varied by changing the value of the capacitors. (Theoretical formulas) f0 = 1 2 1 R1R2C3C4 *1 1 2 Q R1 R2C3C4 1 2 (C3)C4) *1 Note: The filter gain is given by the formula on the left, but the total output gain G= R2 5k 1) C3 C4 is determined by the this in combination with the internal circuit. (When R1 = 2.1k, R2 = 25k, C3 = C4 = C) f0 = 2.2 10 C *5 Q 1.73 G = 2.5 (4) I2C BUS control High-frequency digital signals are input on the SCL and SDA terminals, so ensure that the wiring and PCB pattern is designed in such a way as to ensure that these signals do not interfere with the analog signal system. (5) Step switching noise The VC1, VC2, TC, BC and SC terminals have components connected to them the application example. The values of these components may need to be changed depending on the signal level setting and PCB pattern. Investigate carefully before deciding on the values of the If you are not using I2C BUS control (i.e. you are using DC control), connect the SCL, SDA and SASS terminals to GND (do not leave them disconnected). various circuit constants. The equivalent circuit for these terminals is given below (an integrator circuit is set at the first stage to slow the variation). 661 Audio ICs (6) Volume and tone level settings This specification sheet gives reference values for the amount of attenuation and gain with respect to the serial control data. The internal D / A convertor is an R-2R circuit, and data exists for the places where continuous variation does not occur between data. Use this when fine setting is required. The setting limits are up to 8 bits for volume (256 steps) and 6 bits (64 steps) for tone. (7) Digital / analog separation The digital and analog power supplies and grounds for this IC (BH3856) are completely separate. The digital circuits are supplied from a stable reference source that is on the chip (Vref (3.8V)). For this reason, there is no need to worry about timing shifts, or interference due to digital noise. (8) Matrix surround BH3856S / BH3856FS (9) DC control An internal impedance of 30k is seen from the VC1, VC2, TC, and BC terminals, and 200k is seen from the SC (pin 11) terminal, so with regard to DC control, we recommend direct control with the voltage source. When using variable volume, take the impedance into consideration when making the setting. Note: The DC control voltage range is 0V to Vref. Do not apply voltages above Vref to the terminals. (10) GND S As shown in the application circuit example, connect the external component GND to the analog GND. S However, the GND for the capacitor connected to the Vref terminal should be connected to the digital GND. S If a capacitor with goof high-frequency characteristics is connected in parallel with the capacitor connected to Vref, the performance of the circuit with respect to static noise will improve (we recommend a ceramic capacitor of between 0.001F and 0.1F) S When using long digital and analog ground lines, take care to ensure that there is no potential difference between the two ground lines. The matrix surround circuit construction is as shown in the diagram above. The gain is obtained from the formulas in the diagram. (However, reverse-phase gain is for input to one channel only) 662 Audio ICs FElectrical characteristic curves BH3856S / BH3856FS FExternal dimensions (Units: mm) 663 |
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