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PRELIMINARY TECHNICAL DATA
FEATURES
Calibrated rms response Excellent temperature stability Up to 30 dB input range at 2.5 GHz 700 mV rms, 10 dBm, re 50 maximum input 0.25 dB linear response up to 2.5 GHz Single-supply operation: 2.7 V to 5.5 V Low power: 3.3 mW at 3 V supply
100 MHz to 6 GHz TruPwrTM Detector ADL5500
APPLICATIONS
Measurement of CDMA, W-CDMA, QAM, other complex modulation waveforms RF transmitter or receiver power measurement
GENERAL DESCRIPTION
The ADL5500 is a mean-responding power detector for use in high frequency receiver and transmitter signal chains, from 100 MHz to 6 GHz. It is very easy to apply. It requires a single supply only between 2.7 V and 5.5 V and a power supply decoupling capacitor. The input is internally ac-coupled and has an input impedance of 50 . The output is a linear-responding dc voltage with a conversion gain of 7.5 V/V rms. An external low-pass filter network can be added at the output to increase the averaging time constant.
Figure 1. Output vs. Input Level, Supply 3 V, Frequency 1.9 GHz
The ADL5500 is intended for true power measurement of simple and complex waveforms. The device is particularly useful for measuring high crest-factor (high peak-to-rms ratio) signals, such as CDMA and W-CDMA. The ADL5500 is specified for operation from -40C to +85C and is available in 4-lead wafer-level chip scale package, 1.0mm x 1.0 mm. It is fabricated on a proprietary high fT silicon bipolar process.
FUNCTIONAL BLOCK DIAGRAM
Figure 2.
Rev. PrB
04/19/2005 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2005 Analog Devices, Inc. All rights reserved.
ADL5500 SPECIFICATIONS
TA = 25C, VS = 3 V, fRF = 900 MHz, unless otherwise noted. Table 1.
Parameter SIGNAL INPUT INTERFACE Frequency Range Linear Response Upper Limit Condition (Input RFIN) VS = 3 V Equivalent dBm, re 50 VS = 5 V Equivalent dBm, re 50 (Input RFIN to Output VRMS)
PRELIMINARY TECHNICAL DATA
Min 100
Typ
Max 6000
Unit MHz mV rms dBm mV rms dBm ||pF V/V rms V dB dB dB dB
Input Impedance RMS CONVERSION Conversion Gain Output Intercept Dynamic Range1 0.25 dB Error2 1 dB Error 2 dB Error POWER SUPPLIES Operating Range Quiescent Current
390 4.9 660 9.4 tbd 7.5 0
Error Referred to Best Fit Line CW Input, -40C < TA < +85C CW Input, -40C < TA < +85C CW Input, -40C < TA < +85C CW Input, VS = 5 V, -40C < TA < +85C -40C < TA < +85C 0 mV rms at RFIN3 2.7
14 23 26 30 5.5 1.1
V mA
1 2 3
Calculated using linear regression from best fit line. Compensated for output reference temperature drift. Supply current is input level dependant.
Rev. PrB | Page 2 of 8
PRELIMINARY TECHNICAL DATA PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADL5500
Figure 3. 4-Lead WLCSP
Table 2. Pin Function Descriptions
Pin 1 2 3 4 Mnemonic VRMS COMM RFIN VPOS Function Output Pin. Near rail-to-rail voltage output with limited current drive capabilities. Expected load >10 k to ground. Device Ground Pin. Signal Input Pin. Internally ac-coupled. Nominal 50 input impedance. Supply Voltage Pin. Operational range 2.7 V to 5.5 V.
Rev. PrB | Page 3 of 8
ADL5500
DEVICE HANDLING
The wafer-level chip scale package consists of solder bumps connected to the active side of the die. The part is lead-free with 95.5% tin, 4.0% silver, and 0.5% copper solder bump composition. The WLCSP package can be mounted on printed circuit boards using standard surface-mount assembly techniques; however, caution should be taken to avoid damaging the die. See the AN-617 application note for additional information. WLCSP devices are bumped die, and exposed die can be sensitive to light condition, which can influence specified limits.
PRELIMINARY TECHNICAL DATA
way to reduce these problems is to put a coaxial 3 dB attenuator on the RFIN SMA connector. Mismatches at the source, cable, and cable interconnection, as well as those occurring on the evaluation board, can cause these problems. A simple (and common) example of such a problem is triple travel due to mismatch at both the source and the evaluation board. Here the signal from the source reaches the evaluation board and mismatch causes a reflection. When that reflection reaches the source mismatch, it causes a new reflection, which travels back to the evaluation board, adding to the original signal incident at the board. The resultant voltage varies with both cable length and frequency dependence on the relative phase of the initial and reflected signals. Placing the 3 dB pad at the input of the board improves the match at the board and thus reduces the sensitivity to mismatches at the source. When such precautions are taken, measurements are less sensitive to cable length and other fixture issues. In an actual application when the distance between ADL5500 and source is short and well defined, this 3 dB attenuator is not needed.
EVALUATION BOARD
Figure 4 shows the schematic of the ADL5500 evaluation board. The layout and silkscreen of the evaluation board layers are shown in Figure 5 to Figure 8. The board is powered by a single supply in the 2.7 V to 5.5 V range. The power supply is decoupled by 100 pF and 0.01 F capacitors. Table 3 details the various configuration options of the evaluation board. Problems caused by impedance mismatch may arise using the evaluation board to examine the ADL5500 performance. One
Figure 4. Evaluation Board Schematic
Table 3. Evaluation Board Configuration Options
Component VPOS, GND C1, C2 R3, R8, C4 Function Ground and Supply Vector Pins. Power Supply Decoupling. The nominal supply decoupling of 0.01 F and 100 pF. Output Filtering. The internal 1 k output resistance with the C4 to produce a low pass filter to reduce output ripple. The output can also be scaled down using the resistor divider pads R3 and R8. Also, resistors and capacitors can be placed in C4 and R8 to load test VRMS. Alternate Interface. R6 allows for VRMS to be accessible from the edge connector, which is only used for characterization. Default Condition Not Applicable C1 = 0.01 F (Size 0402) C2 = 100 pF (Size 0402) R3 = 0 (Size 0402) R8 = Open (Size 0402) C4 = 10 nF (Size 0402) R6 = Open (Size 0402)
R6
Rev. PrB | Page 4 of 8
PRELIMINARY TECHNICAL DATA
ADL5500
Figure 5. Layout of Component Side (WLCSP)
Figure 7. Silkscreen of Component Side (WLCSP)
Figure 6. Layout of Circuit Side (WLCSP)
Figure 8. Silkscreen of Circuit Side (WLCSP)
Rev. PrB | Page 5 of 8
ADL5500 OUTLINE DIMENSIONS
PRELIMINARY TECHNICAL DATA
Figure 9. 4-Lead Wafer-level Chip Scale Package Dimensions shown in mm
ORDERING GUIDE
ADL5500 Products ADL5500ACBZ-P71 ADL5500-EVAL Temperature Package -40C to +85C Package Description 4-Lead Wafer-level Chip Scale Package, 7" Pocket Tape and Reel Evaluation Board Package Outline CB-4 Branding Information Q06 Ordering Quantity 3000
1
Z = Pb-free part.
Rev. PrB | Page 6 of 8
PRELIMINARY TECHNICAL DATA NOTES
ADL5500
Rev. PrB | Page 7 of 8
ADL5500 NOTES
PRELIMINARY TECHNICAL DATA
(c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05546-0-4/05(PrB)
Rev. PrB | Page 8 of 8

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