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| Microcontrollers ApNote APXXXX01.EXE available AP1617 o additional file Pre- and post-scale 32-Bit-Values for the MDU (Shifting/Rotating of Double-Words) By using the MDU it is very often necessary to scale the value before or after the calculation to avoid truncation errors during the calculation. K.H. Mattheis / Siemens HL MCB PD Semiconductor Group 03.97, Rel. 01 Software Examples Shifting/Rotating of Double-Words Shifting / Rotating of Double-Words (32 bit values) By using the MDU it is very often necessary to scale the value before or after the calculation to avoid truncation errors during the calculation. Scaling is most easily realized by multipling with a factor of 2X which is a simple left shift, e.g. VALUE * 23 >> shift VALUE three(3) positions to the left The following routines will show you a very effective way for shifting a 32-bit value with the 16-bit ALU using the General Purpose Registers (GPR) more than one bit position. The first routine shows a shift left; the principle used here can also be applied to perform right shifts as well as rotate left or right operations. The last routine shows the rotating of a double-word by 0 to 31 bit positions to the right. Shift_Double_Word: MOV SHL SHL NEG SHR OR R4,R1 R1,R3 R2,R3 R3 R4,R3 R2,R4 ; double-word in R2|R1, shift-count in R3 ; ; ; ; ; ; store(save) low-word in R4 shift left low-word (R1) shift left high-word (R2) two's complement of shift-count (R3) adjust overflown bits from low-word (R4) to the right and store to the high-word (R2) Shift a double-word by less than 16 bit positions to the left example: ; ; ; ; ; ; ; ; ; ; double-word: R2|R1 0000 0010 1011 1001 0110 1000 0100 0101 shift-count: R3 = 6 R4 = 0110 1000 0100 0101 R1 = 0001 0001 0100 0000 (0110 10) R2 = 1010 1110 0100 0000 R3 = FFFA (= 10 or -6); only the least 4 significant bits are used R4 = 0000 0000 0001 1010 R2 = 1010 1110 0101 1010 MOV SHL SHL NEG SHR OR R4,R1 R1,R3 R2,R3 R3 R4,R3 R2,R4 Example for the shift left. The bits shifted from one word to the other are underlined SHL_32: JNB MOV MOV SHL JMPR R3.4,SHL_32_1 R2,R1 R1,#0 R2,R3 ; double-word in R2|R1, shift-count in R3 ; check for shift-count 16 ; low-word (R1) in high-word (R2) (shift by 16) ; clear low-word (R1) ; shift left by shift-count - 16 (only the least 4 ; bits of the shift count in R3 are evaluated) cc_UC, SHL_32_Done ; SHL_32_1: MOV SHL SHL NEG SHR OR R4,R1 R1,R3 R2,R3 R3 R4,R3 R2,R4 ; ; ; ; ; ; store (save) low-word in R4 shift left low-word (R1) shift left high-word (R2) two's complement of shift-count (R3) adjust overflown bits from low-word to the right and store to the high-word (R2) SHL_32_Done: Semiconductor Group 2 of 3 AP1617 03.97 Software Examples Shifting/Rotating of Double-Words ... Shift a double-word by 0 to 31 bit positions to the left ROR_32: JNB MOV MOV MOV ; double-word in R2|R1, rotate-count in R3 R3.4,ROR_32_1 ; check for rotate-count 16 R4,R1 ; rotate-count is 16: exchange words R1,R2 ; R2,R4 ; ROR_32_1: MOV MOV SHR SHR NEG SHL SHL OR OR R4,R1 R5,R2 R1,R3 R2,R3 R3 R4,R3 R5,R3 R1,R5 R2,R4 ; ; ; ; ; ; ; ; ; save words shift the single words by rotate-count - 16 (only the least 4 bits of the rotate-count are evaluated) two's complement of rotate-count shift left saved words by complement of rotate-count combine the shifted parts of the words Rotate a double-word by 0 to 31 bit positions to the right example: ; ; ; ; ; ; ; ; ; ; ; ; double-word: R2 | R1 0000 0010 1011 1001 0110 1000 0100 0101 rotate-count: R3 = 6 R4 = 0110 1000 0100 0101 R5 = 0000 0010 1011 1001 R1 = 0000 0001 1010 0001 R2 = 0000 0000 0000 1010 R3 = FFFA (= -6) R4 = 0001 0100 0000 0000 R5 = 1110 0100 0000 0000 R1 = 1110 0101 1010 0001 R2 = 0001 0100 0000 1010 MOV MOV SHR SHR NEG SHL SHL OR OR R4,R1 R5,R2 R1,R3 R2,R3 R3 R4,R3 R5,R3 R1,R5 R2,R4 Example for a rotate of < 16 bit positions to the right. The bits rotated from one word into the other are underlined Semiconductor Group 3 of 3 AP1617 03.97 |
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