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AU5783 J1850/VPW transceiver with supply control function
Preliminary specification Supersedes data of 2000 Nov 29 2001 Feb 15
Philips Semiconductors
Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
FEATURES
multiplexing
* Supports SAE/J1850 VPW standard for in-vehicle class B * Bus speed 10.4 kbit/s nominal * 4X transmission mode (41.6 kbit/s) * Drive capability 32 bus nodes * Low RFI due to output waveshape function * Direct battery operation with protection against +40 V load dump
and 8 kV ESD
DESCRIPTION
The AU5783 is a line transceiver being primarily intended for in-vehicle multiplex applications. It provides interfacing between a J1850 link controller and the physical bus wire. The device supports the SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbit/s. For data upload and download purposes the 4X transmission mode is supported with a nominal bus speed of 41.6 kbit/s. The AU5783 provides protection against loss of ground conditions, thus ensuring the network will be operational in case of an electronic control unit loosing connection to ground potential. Low power operation is supported through provision of a sleep mode with very low power consumption. In addition an external voltage regulator can be turned off via the AU5783 transceiver to further reduce the overall power consumption. The voltage regulator will be activated again upon detection of bus activity or upon a local wake-up event.
* Bus terminals proof against automotive transients up to
+100 V/-150 V and 8 kV ESD
* Power supply enable function * Very low sleep mode power consumption * Diagnostic loop-back mode * Thermal overload protection * 14-pin SOIC
ORDERING INFORMATION
TYPE NUMBER AU5783D
PACKAGE NAME SO14 DESCRIPTION plastic small outline package; 14 leads; body width 3.9 mm VERSION SOT108-1
TEMPERATURE RANGE -40 to +125C
QUICK REFERENCE DATA
SYMBOL VBAT.op Tamb VBAT.ld VBOH VBI IBAT.lp tP tr PARAMETER Operating supply voltage, including low battery operation Operating ambient temperature range Battery voltage Bus output voltage Bus input threshold Sleep mode supply current Propagation delay Bus output rise time Tx to Rx 14 load dump, 1s 250 < RL < 1.6 k 6.7 3.4 CONDITIONS 5.5 -40 MIN. 12 TYP. 16 +125 +40 8.0 4.2 90 25 MAX. UNIT V C V V V A s s
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
BLOCK DIAGRAM
BATTERY (+12V) BAT
VOLTAGE R/F REFERENCE
TEMP. PROTECTION
Rs
TX
TX- BUFFER
OUTPUT BUFFER
BUS
NSTB
MODE Rld 4X/LOOP CONTROL
Vcc (+5V)
Rd
1.6V
LOAD SWITCH
LOAD
RX
VOLTAGE Vbat REFERENCE
INH WAKE-UP LWAKE CONTROL AU5783
GND
SL01224
Figure 1. Block diagram
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
PINNING Pin configuration FUNCTIONAL DESCRIPTION
The AU5783 is an integrated line transceiver IC that interfaces an SAE/J1850 protocol controller IC to the vehicle's multiplex bus line. It is primarily intended for automotive "Class B" multiplexing applications in passenger cars using VPW (Variable Pulse Width) modulated signals with a nominal transmission speed of 10.4 kbit/s. The device provides transmit and receive capability as well as protection to a J1850 electronic module. A J1850 link controller feeds the transmit data stream to the transceiver's TX input. The AU5783 transceiver waveshapes the TX data input signal so as to minimize electromagnetic emission. The bus output signal features controlled rise & fall characteristic including rounded shape. A resistance being connected to the R/F control input sets the bus output slew rate. The LOAD output is connected to the physical bus line via an external load resistor Rld. The load resistor pulls the bus line to ground potential being the default state, e.g., when no transmitter outputs an active state. This output ensures the J1850 network will not be affected by a potential loss of ground condition at an individual electronic control unit. The AU5783 includes a bus receiver with filter function to minimize susceptibility against interference. The logic state of the J1850 bus signal is indicated at the RX output being connected to the J1850 link controller. The AU5783 also provides advanced low-power modes to help minimize ignition-off power consumption of an electronic control unit. The bus receiver function is kept alive in the low-power modes. If an active state is being detected on the bus line this will be indicated via the RX output. By default the AU5783 enters the low-power standby mode when the mode control inputs NSTB and 4X/LOOP are not driven. A 100 k pull down resistor is required on NSTB. Ignition-off current draw can be reduced further by turning off the voltage regulator being typically provided in an electronic control unit. This is supported by the activity indication function of the AU5783. In this application the activity indication flag INH will control external devices such as a voltage regulator. To turn-off the INH flag and thus the voltage regulator, the go to sleep command needs to be applied to the Network Standby power control input, e.g., NSTB = 0. The INH output is turned off after the sleep time-out period thereby, reducing the power consumption of an electronic control unit to an extremely low level. The activity indication flag INH will be turned on again upon detection of a remote wake-up condition (i.e. bus activity) or upon detection of a local wake-up condition or a respective command from the microcontroller. A local wake-up condition is detected when an edge occurs at the wake-up input LWAKE. The INH flag will also be turned on upon detection of a high input level at the mode control input NSTB. Activation of the INH output enables external devices, e.g., a voltage regulator. This condition will power-up logic devices, e.g., a microcontroller in order to perform appropriate action, e.g., activation of the AU5783 and the J1850 network. The AU5783 contain a power on reset (POR) circuit, which is active at low voltages. This circuit insures that if the control input NSTB is at 0 V or floating during power up, the device will be forced into the standby mode by the time the battery voltage rises to 4.4 V. This will also insure that the INH pin is in the high state to turn on the local voltage regulator. If there is a dip going below 4.4 V in battery voltage while in the sleep mode, the device may return to the
R/F
1
14
GND
GND
2
13
N.C.
4X/LOOP
3
12
BUS
NSTB
4
AU5783
11
LOAD
TX
5
10
INH
RX
6
9
LWAKE
N.C.
7 SO14
8
BAT
SL01225
Figure 2. Pin configuration
Pin description
SYMBOL R/F GND 4X/LOOP NSTB PIN 1 2 3 4 DESCRIPTION Rise/fall time control input; connect to ground potential via a resistor Ground Tx mode control input; low: normal mode; high: 4X mode; float: loopback Network STandBy power control input; low: transmit function disabled (low power modes); high: transmit function enabled Transmit data input; low: transmitter passive; high: transmitter active Receive data output; low: active bus condition detected; high: otherwise Not connected Battery supply input, 12V nominal Local wake-up input, edge sensitive Activity indication flag (inhibit) output high side driver; e.g., to control a voltage regulator. Active high enables the regulator Bus load in/output Bus line transmit/receive input/output, active high side driver Not connected Ground
TX RX N.C. BAT LWAKE INH
5 6 7 8 9 10
LOAD BUS N.C. GND
11 12 13 14
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
standby mode if the POR is tripped. Even if the device is not in sleep mode the INH output will turn off at some battery voltages below 4.4 V when the internal POR circuit is active. At still lower voltages where the POR circuit does not operate, the INH may again pull up toward the battery level, typically with battery voltages below approximately 3.6 V. The operation of the POR circuit can be verified by placing the device in the sleep mode while the battery voltage is above 4.4 V. The INH output, which is a high side driver, should turn off when the sleep mode is entered. Next ramp the battery voltage down to 2.0V and finally return the battery voltage to 4.4 V. When the battery supply is returned to 4.4V, the INH output will pull high since the device enters standby mode. The actual voltages at which the POR engages and releases will vary from part to part. The lowest voltage at which the POR will be active is 2.6 V and it will always release below 4.4 V. The AU5783 provides a high-speed data transmission mode where the bus output waveshape function is disabled. In this mode transmit signals are output as fast as possible thus allowing higher data rates, e.g., the so-called 4X mode with 41.6 kbit/s nominal speed. The AU5783 also provides a loop-back mode for diagnostic purpose, e.g., self-test of an electronic control unit. In loop-back mode the bus transmit and receive functions are disabled thus
essentially disconnecting an electronic control unit from the J1850 bus line. The TX signal is internally looped back to the RX output. The AU5783 only requires one power supply VBAT. Bus transmissions can continue with battery voltage down to 5.5 V. The bus output voltage will track 1.3V bellow the battery voltage. The bus input voltage threshold will also follow the battery voltage going down as shown in Figure 3. This ratio metric behavior of the input threshold partially compensates for the reduced dominant level transmitted during low battery operation. The AU5783 features special robustness at its BAT and BUS pins hence the device is well protected for applications in the automotive environment. Specifically the BAT input is protected against 40 V load dump and jump start condition. The BUS output is protected against wiring fault conditions, e.g., short circuit to ground and battery voltage as well as typical automotive transients and electrostatic discharge. In addition, an over-temperature shutdown function with hysteresis is incorporated which protects the device under network fault conditions. In case of the die temperature reaching the trip point, the AU5783 will latch-off the transceiver function. The device is reset on the first rising edge on the TX input after a decrease in the junction temperature.
8
6.7
5.5
3.9 3.4
1.9
5.5 5.8
7
8
~ ~
~ ~
4.2
2001 Feb 15
EEEEEEEEEEEEEEEE EEE EEEEEEEEEEEEEEEE EEE EEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEE
~ ~ ~ ~
16
Bus Voltage (V)
bus output bus input
SL01254
Battery Voltage (V)
Figure 3. Bus voltage vs battery voltage
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
Table 1. Control input summary
Z = Input connected to high impedance permitting it to float. Typically accomplished by turning off the output of a microcontroller. X = Don't care; The input may be at either logic level. NSTB 1 1 1 1 1 1 0 or Z 1 -> 0 0 or Z 4X/LOOP 0 0 1 1 Z Z X X X TX 1 0 1 0 1 0 X 0 X normal operation normal operation 4X transmit 4X transmit loop-back loop-back standby (default state after power on), Note 1, Note 6 go to sleep command, Note 4, Note 6 sleep, Note 4, Note 6 Mode Bus transmitter active passive active passive passive passive off off off BUS high float high float float float float float float RX (out) low bus state, Note 2 low bus state, Note 2 low high bus state, Note 5 bus state, Note 5 bus state, Note 5 high high high high high high high float, Note 3 float INH
NOTES: 1. After power-on, the AU5783 enters standby mode since the input pins NSTB and 4X/LOOP are assumed to be floating. In standby mode the voltage regulator is enabled via the INH output, and therefore power is supplied to the microcontroller. When the microcontroller begins operation it will normally set the control inputs NSTB high and 4X/LOOP to low state in order to start normal operation of the AU5783. 2. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be high. Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active), then RX will be low. 3. INH is turned off after a time-out period. 4. For entering the sleep mode (e.g., to deactivate INH), the "Go To Sleep" command needs to be applied. The "Go To Sleep" command is a high-to-low transition on the NSTB input. When the "Go To Sleep" command is present, the INH flag is deactivated. This signal can be used to turn-off the voltage regulator of an electronic module. After the voltage regulator is turned off the microcontroller is no longer supplied and the NSTB input will be floating. The INH output will be set again upon detection of bus activity or occurrence of a local wake-up event. 5. In standby and sleep mode, the detection of a wake-up condition (e.g., high level on BUS) will be signalled on the output RX. 6. The NSTB pin contains a weak pull down which is active in the normal, loop-back and high-speed modes but is disabled in the sleep mode. To insure a logic 0 input if the microcontroller's outputs are tri-stated or the microcontroller is not powered, a 100 k resistor between NSTB and ground is suggested.
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System. Unless otherwise specified, operation is not guaranteed under these conditions: all voltages are referenced to pin GND; positive currents flow into the IC. SYMBOL VBAT VBAT.ld VBAT.tr VB0 VB1 VB.tr VWKE VWKR VINH VI VI,RF ESDHBM1 PARAMETER Voltage on pin BAT Short-term supply voltage Transient voltage on pin BAT and pin LWAKE Bus voltage Bus voltage Transient bus voltage Voltage on pin LWAKE Voltage on pin LWAKE DC voltage on pin INH DC voltage on pins TX, RX, NSTB and 4X/LOOP DC voltage on pin R/F ESD capability of pins BAT, BUS, LOAD and LWAKE ESD capability of all pins Maximum power dissipation Thermal impedance Operating ambient temperature Operating junction temperature Storage temperature Human body model, direct contact discharge, R = 1.5 k, C = 100 pF, Rld > 1.4 k; Rwake > 9 k Human body model, direct contact discharge, R = 1.5 k, C = 100 pF @ Tamb = +125C with standard test PCB -40 -40 -40 via series resistor of Rwake > 9 k load dump, t < 1s SAE J1113 test pulses 3A and 3B, Rwake > 9 k VBAT < 2 V, Rld > 1.4 k VBAT > 2 V, Rld > 1.4 k SAE J1113, test pulses 3A and 3B, coupled via C = 1 nF; Rld > 1.4 k -150 -16 -10 -150 -0.3 -16 -0.3 -0.3 -0.3 -8 CONDITIONS MIN. -0.3 MAX. +34 +40 +100 +18 +18 +100 VBAT +34 VBAT 7.0 5.0 +8 UNIT V V V V V V V V V V V kV
ESDHBM2 Ptot JA Tamb Tvj Tstg
-2
+2 205 120 +125 +150 +150
kV mW C/W C C C
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
DC ELECTRICAL CHARACTERISTICS
7V < VBAT < 16 V; -40 C < Tamb < +125 C; 250 < RL < 1.6 k; 1.4 k < Rld < 12 k; -2V < Vbus < +9 V; NSTB = 5 V; 4X/LOOP = 5 V; Rs = 56 k 1%; RX connected to +5 V via Rd = 3.9 k; INH loaded with 100 k to GND; LWAKE connected to BAT via 10 k resistor; all voltages are referenced to pin 14 (GND); positive currents flow into the IC; typical values reflect the approximate average value at VBAT = 13 V and Tamb = 25 C; unless otherwise specified. SYMBOL IBAT.sl IBAT.sb IBAT.p.nl IBAT.p.h IBAT.wl IBAT.fl Tsd Thys Vih Vil Iihtx Iih.nstb,nlh Iil PARAMETER Sleep mode supply current Standby mode supply current Supply current; passive state, in normal or loopback modes Supply current; passive state, in high speed mode Supply current; weak load Supply current; full load Thermal shutdown temperature Thermal shutdown hysteresis High level input voltage Low level input voltage TX high level input current NSTB high level input current in normal, loop back and high speed modes Low level input current VTX = 5 V VNSTB = 5 V Vi = 0 V NSTB = 5 V NSTB = 5 V, Bare Die 4X/LOOP = 5 V, NSTB = 5 V 4X/LOOP = 3 V, NSTB = 3 V NSTB = 5 V NSTB = 5 V; Note 4 NSTB = 5 V V4X = 0 V, NSTB = 5 V V4X = 0 V, NSTB = 0 V 50 -5 50 10 -2 2.7 2.9 50 30 1.25 -2 300 250 1.65 2 +0.7 200 +5 Note 1 Note 1 TX = 5 V; LWAKE = 0 V, 4X/LOOP = 0 or Z TX = 5 V; LWAKE = 0 V, 4X/LOOP = 5 V TX = 5 V, RL = 1.38 k, Note 2 TX = 5 V, RL = 250 Note 2 Note 2 155 5 2.7 0.9 200 50 +2 CONDITIONS MIN. TYP. 90 500 3 10 25 45 190 15 MAX. UNIT A A mA mA mA mA C C V V A A A V V A A V A V A A Pin BAT & thermal shutdown
Pins TX, NSTB
Pin 4X/LOOP Vih High level input voltage (High Speed Mode) Iih-5 Iih-3 Vilb Iilb Vil -Iil -Iils Pin LWAKE Vi_wh Vi_Wl -II_w Pin INH -Ioh_inh -Iol_inh Vbat_POR INH high level output current INH off-state output leakage Power-on reset release voltage; Battery voltage threshold for setting INH output high Low level output voltage Low level output current High level output leakage Local wake-up high Local wake-up low Low level input current High level input current with 5 V logic High level input current with 3 V logic Mid level input voltage (Loop back operation) Loopback mode input current Low level input voltage (Normal Mode) Low level input current Low level input current in standby and sleep mode
NSTB = 0 V NSTB = 0 V VLWAKE = 0 V VINH = VBAT - 1 V; 4.9 V < VBAT < 16 V VINH = 0 V; NSTB = 0 V NSTB = 0 V, BUS = 0 V, VBAT = 4.4 V, verify INH = 1
3.9 2.5 2 120 -5 25 500 +5 4.4
V V A A A V
Pin RX Vol_rx Iol_rx Ioh_rx IRX = 1.6 mA, BUS = 7 V, all modes VRX = 5 V, BUS = 7 V VRX = 5 V, BUS = 0 V, all modes 0 2 -10 0.45 20 +10 V mA A
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
SYMBOL Pin BUS VBOh_n
PARAMETER BUS output high voltage in normal mode
CONDITIONS TX = 5 V, 4X/LOOP = 0 V; 8 V < VBAT < 16 V 250 < RL < 1.6 k; Note 3 TX = 5 V, 4X/LOOP = 5 V; 8 V < VBAT < 16 V 250 < RL < 1.6 k; Note 3 TX = 5 V; Note 3 5.5 V1/ 2
MIN. 6.7
TYP.
MAX. 8.0
UNIT V
VBOh_h
BUS output high voltage in high speed mode BUS voltage; low battery
6.7
9.0
V
VBOhl
VBAT-1.3
VBAT
V
-IBO.LIM -IBO.LK1 -IBO.LK0, -IBO.LK5 -IBO.LKLB0, -IBO.LKLB5 -ILOG VBih
BUS short circuit current BUS leakage current; passive state BUS current with loss of battery BUS leakage current; loop back mode BUS leakage current at loss of ground BUS input high voltage
30 -100 -100 -100 -20 4.2
100 +100 +100 +100 +100
mA A A A A V
VBil VBhy VBih_l
BUS input low voltage BUS input hysteresis BUS input high voltage at low battery
3.4 0.1 VBAT - 1.6 V VBAT - 3.6 V 4.2 0.5
V V V
VBiL_L
BUS input low voltage at low battery
V
VBih_s
BUS input high voltage in standby and sleep mode
V
VBil_s
BUS input low voltage in standby and sleep mode
2.2
V
VBih_sl
BUS input high voltage in standby and sleep mode at low battery
(VBAT + 2.4)
V
VBil_sl
BUS input low voltage in standby and sleep mode at low battery
1/ (V 2 BAT - 1.6)
V
Pin LOAD Vld Vldoff Load output voltage Load output voltage unpowered 0.2 1 V V
NOTES: 1. TX = 0 V; NSTB = 0 V; 7 V < VBAT < 13 V; Tj < 125C; -1 V < VBUS < 1 V; LWAKE connected to BAT via 10 k; INH not connected. 2. This parameter is characterized but not subject to production test. 3. For VBAT < 8.3 V the bus output voltage is limited by the supply voltage. For 16 V < VBAT < 27 V the load is limited by the package power dissipation ratings. The duration of the latter condition is recommended to be less than 2 minutes. 4. For 3-State devices driving the 4X/LOOP Pin, the leakage in the 3-State output must be below the specified input current to ensure the pin is biased in the center state to provide the loop back function. For 3-State devices driving the 4X/LOOP pin, the leakage in the 3-State output must be below the specified input current to insure the pin is biased in the center state to provide the loop back function. If the leakage current of the microcontroller is too high, then an alternate approach is to connect a resistor voltage divider between the VCC and ground of the microcontroller's supply to provide approximately 1.45 V bias on the 4X/LOOP pin.
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
DYNAMIC CHARACTERISTICS
7 V < VBAT < 16 V; -40C < Tamb < +125C; -2 V < Vbus < +9 V; 1.4 k < Rld < 12 k BUS: 250 < RL < 1.6 k; 3 nF < CL < 17 nF; 1.7 s < (RL * CL) < 5.2 s Bus load A: RL = 1.38 k, CL = 3.3 nF; Bus load B: RL = 300 , CL = 16.5 nF R/F pin: Rs = 56 k 1%; INH loaded with 100 k and 30 pF to GND RX pin: Rd = 3.9 k to 5 V; CL = 30 pF to GND; NSTB = 5 V; 4X/LOOP = 0 V Typical values reflect the approximate average value at VBAT = 13 V and Tamb = 25C, unless otherwise specified. NSTB and 4X/LOOP rise and fall times < 10 ns. SYMBOL CTX tinhoff tinhonl tinhonr INH output function INH turn-off delay LWAKE to INH turn-on delay BUS to INH turn-on delay BUS = 0 V, LWAKE = VBAT or 0 V, go to sleep command, measured from NSTB = 0.9 V to INH = 3.5 V NSTB = 0 V, BUS = 0 V, measured from LWAKE = 3 V to INH = 3.5 V sleep mode, LWAKE = VBAT, measured from BUS = 3.875 V to INH = 3.5 V from TX = 2.5 V to BUS = 3.875 V; bus load A and bus load B bus load A, 9 V < VBAT < 16 V, measured at 1.5 V and 6.25 V bus load B, 9 V < VBAT < 16 V, measured at 1.5 V and 6.25 V bus load A, 9 V < VBAT < 16 V, measured at 1.5 V and 6.25 V bus load B, 9 V < VBAT < 16 V, measured at 1.5 V and 6.25 V bus load B connected to -2 V, 9 V < VBAT < 16 V, measured at 20% and 80% of load capacitor current bus load B connected to -2 V, 9 V < VBAT < 16 V, measured at 20% and 80% of load capacitor current TX = high for 64 s, bus load condition A, 9 V < VBAT < 16 V; minimum width measured at BUS = 6.25 V, maximum width measured at BUS = 1.5 V f = 530 kHz to 1670 kHz, bus load B connected to -2 V, TX = 7.81 kHz, 50% duty cycle, 9 V < VBAT < 16 V, Note 1 4X/LOOP = 1 V, bus load B, 9 V < VBAT < 16 V, from TX = 1.8 V to BUS = 3.875 V measured from 1.8 V on TX to 2.5 V on RX NSTB = 5 V, 4X = floating, measured from 1.8 V on TX to 2.5 V on RX measured from VBUS = 3.875 V to VRX = 2.5 V NSTB = 5 V, measured at 10% and 90% of waveform NSTB = 0 V, measured at 10% and 90% of waveform 0.5 13 13 13 11 11 11 11 4 200 100 60 s s s PARAMETER TX input capacitance Note 1 CONDITIONS MIN. TYP. MAX. 15 UNIT pF
BUS output function tBOon; tBOoff tBrA tBrB tBfA tBfB tir Delay TX to BUS rising and falling edge BUS voltage rise time BUS voltage rise time BUS output voltage fall time BUS output voltage fall time BUS output current rise time 22 18 18 18 18 s s s s s s
tif
BUS output current fall time
4
s
twBh
BUS high pulse width
35
93
s
BHRM tBO4Xon; tBO4Xoff tpon; tpoff tplbon; tplboff tDRXon; tDRXoff ttRX ttRXsl
BUS output voltage harmonic content; normal mode TX to BUS delay in 4X mode Delay TX to RX rising and falling edge in normal mode Delay TX to RX rising and falling edge in loop-back mode BUS input delay time, rising and falling edge RX output transition time, rising and falling edge RX output transition time in standby and sleep mode, rising and falling edge BUS to RX delay in sleep and standby modes
70 5 25 25
dBV s s s
BUS input function 0.2 2 1 5 s s s
tDRXsl
NSTB = 0 V, LWAKE = VBAT, measured from BUS = 3.875 V to RX = 2.5 V
8
60
s
NOTES: 1. This parameter is characterized but not subject to production test.
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
TEST CIRCUITS
5.1V INH 100k R/F 56k TX GND
NSTB S1 4X/LOOP S2 RX
AU5783
BUS 1.5k 10.7k S3 1uF
LOAD BAT
LWAKE 3.9k 10k
+
I_LOG V_bat
SL01226
NOTE: 1. Check I_LOG with the following switch positions: 1. S1 = open = S2 2. S1 = open, S2 = closed 3. S1 = closed, S2 = open 4. S1 = closed = S2 Figure 4. Test circuit for loss of ground condition
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
APPLICATION INFORMATION
C with J1850 Link Controller
+5V VCC VPWO VPWI port port 3.9 k
Rb 1k 100 K Ra 10 k 100 nF LWAKE TX RX NSTB 4X/LOOP INH BAT
5V Reg.
AU5783 Transceiver
LOAD 10.7 k 1% Rld 47 uH BUS R/F
+12V
GND
56 k 1% Rs
470 pF
SAE/J1850/VPW BUS LINE
SL01227
NOTES: 1. Value of Rld depends, e.g., on type of bus node. Example: secondary node Rld =10.7 k, primary node Rld =1.5 k. 2. For connection of the NSTB and 4X/LOOP pins there are different options, e.g., connect to a port pin or to VCC or to active low reset. Figure 5. Application of the AU5783 transceiver
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
2001 Feb 15
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Philips Semiconductors
Preliminary specification
J1850/VPW transceiver with supply control function
AU5783
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Bare Die -- All die are tested and guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits that are not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafers. Philips Semiconductors has no control over third party procedures in the sawing, handling, packing, or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or system after third party sawing, handling, packaging, or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2001 All rights reserved. Printed in U.S.A. Date of release: 02-01 Document order number: 9397 750 08083
Philips Semiconductors
2001 Feb 15
14

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