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| C8051F061 ANALOG PERIPHERALS - 16-bit ADCs, CAN, 64KB FLASH, 64-Pin MCU PRELIMINARY HIGH SPEED 8051 C CORE Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks Up to 25MIPS Throughput with 25MHz System Clock Expanded Interrupt Handler 4352 Bytes Internal Data RAM (256 + 4k) 64k Bytes In-System Programmable FLASH Program Memory 32 Message Objects "Mailbox" implementation only interrupts CPU when needed 24 Port I/O; All are 5V tolerant Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently Programmable 16-bit Counter Array with 6 Capture/Compare Modules Five General Purpose 16-bit Counter/Timers Dedicated Watch-Dog Timer; Bi-directional Reset Internal Programmable 2% Oscillator: 24.5MHz External Oscillator: Crystal, RC, C, or Clock Real-Time Clock Mode using Timers or PCA Multiple Power Saving Sleep and Shutdown Modes - - Two 16-bit ADC's ! Programmable Throughput up to 1Msps (each ADC) ! 0.75 LSB INL; guaranteed no missing codes ! Configurable as two Single-Ended or one Differential ADC ! DMA to XRAM ! Data Dependent Windowed Interrupt Generator 10-bit ADC ! Programmable Throughput up to 200ksps ! 8 External Inputs ! Built-in Temperature Sensor ( 3C) Two 12-bit DACs ! Can Synchronize Outputs to Timers for Jitter-Free Waveform Generation Three Comparators Internal Voltage Reference Precision VDD Monitor/Brown-out Detector On-Chip Debug Circuitry Facilitates Full Speed, Non-Intrusive InSystem Debug (No Emulator Required!) Provides Breakpoints, Single Stepping, Watchpoints, Stack Monitor Inspect/Modify Memory and Registers Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets IEEE1149.1 Compliant Boundary Scan Low Cost, Complete Development Kit MEMORY CAN Bus 2.0B DIGITAL PERIPHERALS ON-CHIP JTAG DEBUG & BOUNDRY SCAN CLOCK SOURCES SUPPLY VOLTAGE ......................... 2.7V to 3.6V 64-Pin TQFP Temperature Range: -40C to +85C VDD VDD VDD DGND DGND DGND AV+ AGND Digital Power Analog Power TCK TMS TDI TDO /RST MONEN XTAL1 XTAL2 JTAG Logic Boundary Scan Debug HW Reset 8 0 5 1 C o r e UART0 UART1 SMBus SPI Bus PCA P0 Drv P0.0 P0.7 SFR Bus Timers 0, 1, 2,3,4 P0, P1, P2, P3 Latches VDD Monitor External Oscillator Circuit 25MHz 2% Internal Oscillator WDT C R O S S B A R P1 Drv P1.0/AIN2.0 P1.7/AIN2.7 P2 Drv P2.0 P2.7 System Clock P3 Drv CTX CRX VREF2 64kbyte FLASH 256 byte RAM 4kbyte RAM CAN 2.0B (32 Message Objects) VREF VREF VREF2 DAC0 DAC1 AVDD ADGND AV+ AGND VREF0 VRGND0 AIN0 AIN0G VBGAP0 CNVSTR0 DAC0 (12-Bit) ADC 200ksps (10-Bit) CP0 A M 8:1 U X + + CP2 Temp Sensor P2.6 P2.7 P2.2 P2.3 CP1 ADC0 1Msps (16-Bit) + - P2.4 P2.5 AVDD ADGND AV+ AGND VREF1 VRGND1 AIN1 AIN1G VBGAP1 CNVSTR1 R E S U L T 0 External Data Memory Bus P4 Latch Ctrl Latch P5 Latch P4 DRV P5 DRV P6 DRV P7 DRV ADC1 1Msps (16-Bit) R E S U L T 1 + - D I F F DMA EMIF Cntrl Addr15-8 P6 Latch Addr7-0 P7 Latch Data Latch 4.22.2003 C8051F061 16-bit ADCs, CAN, 64KB FLASH, 64-Pin MCU PRELIMINARY SELECTED ELECTRICAL SPECIFICATIONS TA = -40C to +85C, VDD = 2.7V unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS GLOBAL CHARACTERISTICS Supply Voltage 2.7 3.6 V mA 18 Supply Current (CPU Clock=25MHz mA 0.7 active) Clock=1MHz 20 Clock=32kHz; VDD Monitor Enabled A Supply Current Oscillator not running; VDD Monitor 0.1 A (shutdown) Disabled Clock Frequency Range DC 25 MHz 16-BIT A/D CONVERTERS Resolution 16 bits LSB Integral Nonlinearity Single-ended Mode 0.75 2 LSB Differential Mode 0.50 1 Differential Nonlinearity Guaranteed Monotonic LSB 0.5 1 Signal-to-Noise Plus Fin = 10kHz, Single-ended 86 dB Distortion Fin = 10kHz, Differential 89 dB Total Harmonic Distortion Fin = 10kHz, Single-ended 96 dB Fin = 10kHz, Differential 103 dB Spurious-Free Dynamic Fin = 10kHz, Single-ended 97 dB Range Fin = 10kHz, Differential 104 dB Throughput Rate 1 Msps Input Voltage Range Single-ended (AINn - AINnG) 0 VREF V Differential (AIN0-AIN1) -VREF VREF V Power Supply Current Operating Mode, 1 Msps (each ADC) (AVDD + AV+) 5.5 mA Shutdown Mode 1 A D/A CONVERTERS Resolution 12 LSB Differential Nonlinearity LSB 1 Output Settling Time 10 s PACKAGE INFORMATION D D1 C8051F060DK DEVELOPMENT KIT MIN NOM MAX (mm) (mm) (mm) A 1.20 0.15 1.05 A1 0.05 E1 E A2 0.95 b D 0.17 0.22 0.27 12.00 10.00 0.50 12.00 10.00 - 64 PIN 1 DESIGNATOR 1 A2 e A b A1 D1 e E E1 SMBus is a trademark of Intel Corp.; I2C is a trademark of Philips Semiconductors, Inc.; SPI is a trademark of Motorola, Inc. |
Price & Availability of C8051F061SHORT
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