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| C8051F320 ANALOG PERIPHERALS 10-BIT ADC - 1 LSB INL; No Missing Codes - Programmable Throughput up to 200ksps - Up to 17 External Inputs; Programmable as Single-Ended or Differential - Built-in Temperature Sensor ( 3C) Two Comparators Internal Voltage Reference - 2.4V POR/Brown-Out Detector USB Mixed-Signal 16KB FLASH MCU PRELIMINARY HIGH SPEED 8051 C Core - Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks Up to 25MIPS Throughput with 25MHz Clock Expanded Interrupt Handler 1280 Bytes Internal Data RAM (256 + 1K) 16k Bytes In-System Programmable FLASH Program Memory MEMORY DIGITAL PERIPHERALS 25 Port I/O; All 5V tolerant with High Sink Current Hardware Enhanced UART, SPITM and SMBus Serial Ports Four General Purpose 16-Bit Counter/Timers 16-bit Programmable Counter Array with Five Capture/Compare Modules Internal Oscillator: 0.25% Accuracy with Clock Recovery enabled. Supports all USB and UART Modes External Oscillator: Crystal, RC, C, or Clock On-Chip Clock Multiplier for USB Controller On-Chip Voltage Regulator Supports USB Bus-Powered Operation Regulator Bypass Mode Supports USB Self-Powered Operation USB FUNCTION CONTROLLER USB Specification 2.0 Compliant Full-Speed (12 Mbps) or Low-Speed (1.5Mbps) Operation Integrated Clock Recovery; No External Crystal Required for either Full-Speed or Low-Speed Operation Supports Eight Flexible Endpoints Dedicated 1k Byte USB Buffer Memory Integrated Transceiver; No External Resistors Required On-Chip Debug Circuitry Facilitates Full Speed, Non-Intrusive In-System Debug (No Emulator Required!) Provides Breakpoints, Single Stepping Inspect/Modify Memory, Registers, and USB Memory Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets CLOCK SOURCES - ON-CHIP DEBUG VOLTAGE REGULATOR VOLTAGE REGULATOR INPUT............ 4.0V to 5.25V 32-Pin LQFP Package Temperature Range: 0C to 70C 5.0V REGIN IN Voltage Regulator OUT Enable Port 0 Latch Port 1 Latch UART Timer 0,1,2,3 / RTC PCA/ WDT SMBus SPI Port 2 Latch C R O S S B A R P 0 D r v P 1 D r v P 2 D r v P 3 D r v CP0 VDD GND Analog/Digital Power P0.0 P0.1 P0.2/XTAL1 P0.3/XTAL2 P0.4 P0.5 P0.6/CNVSTR P0.7/VREF P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P3.0/C2D C2D Debug HW Reset /RST/C2CK POR XTAL1 XTAL2 BrownOut 8 0 5 1 16kbyte FLASH 256 byte SRAM 1K byte XRAM External Oscillator Circuit 12MHz Internal Oscillator x4 2 System Clock C o r SFR Bus e Port 3 Latch 2 Clock Recovery VREF USB Clock VREF 1,2,3,4 USB Transceiver USB Controller + + Temp CP1 D+ D- VDD VBUS 1K byte USB SRAM 10-bit 200ksps ADC A M U X AIN0-AIN16 VDD VREF 10.3.2002 C8051F320 Regulator Input Voltage (REGIN) VDD (VREG Output) VREG Bias Current Supply Current with CPU and USB active Supply Current (suspend mode, Oscillator off) CPU System Clock Range Frequency USB Clock USB Mixed-Signal 16KB FLASH MCU PRELIMINARY SELECTED ELECTRICAL SPECIFICATIONS TA = 0C to +70C, VREG = 5.0V unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS GLOBAL CHARACTERISTICS 4.0 3.0 VREG Enabled CPU Clock=24MHz, USB Clock=48MHz CPU Clock=12MHz, USB Clock=6MHz VDD Monitor Enabled; VREG Disabled VDD Monitor Disabled; VREG Disabled DC Clock Recovery Enabled Clock Recovery Disabled Full-Speed Operation Low-Speed Operation 11.97 11.82 47.88 5.91 12.0 12.0 48.0 6.0 10 1/2 1/2 3.3 70 18 9 20 <0.1 5.25 3.6 V V A mA mA A A MHz MHz MHz MHz MHz bits LSB LSB dB ksps V s A s A s A s A 25 12.03 12.18 48.12 6.09 INTERNAL OSCILLATOR & CLOCKS A/D CONVERTER Resolution Integral Nonlinearity Differential Nonlinearity Signal-to-Noise Plus Distortion Throughput Rate Input Voltage Range Guaranteed Monotonic 53 0 (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV 0.1 7.6 0.18 3.2 0.32 1.3 1 0.4 1 1 200 VREF COMPARATOR Response Time Mode0 Current Consumption Mode0 Response Time Mode1 Current Consumption Mode1 Response Time Mode2 Current Consumption Mode2 Response Time Mode3 Current Consumption Mode3 PACKAGE INFORMATION D D1 A MIN NOM MAX (mm) (mm) (mm) 1.60 0.15 C8051F320DK DEVELOPMENT KIT A1 0.05 E1 E A2 1.35 1.40 1.45 b 0.30 0.37 0.45 9.00 7.00 0.80 9.00 7.00 - 32 D D1 1 PIN 1 IDENTIFIER A2 e A b A1 e E E1 10.3.2002 |
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