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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-21309-4E
ASSP
Serial Input PLL Frequency Synthesizer
MB1511
s
DESCRIPTION
The Fujitsu MB1511 is a single chip serial input PLL frequency synthesizer designed for VHF tuner and cellular telephone applications. It contains a 1.1 GHz dual modulus prescaler which enables pulse swallow function, and an analog switch to speed up lock up time. It operates supply voltage of 3.0 V typ. and dissipates 7 mA typ. of current realized through the use of Fujitsu's unique U-ESBIC Bi-CMOS technology. The MB1511 is housed in SSOP package, this enables high integration.
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FEATURES
Low power supply voltage: VCC = 2.7 to 5.5 V High operating frequency: fIN MAX = 1.1 GHz (VIN MIN = -10dBm) Pulse swallow function: 64/65 or 128/129 Low supply current: ICC = 7 mA typ. Serial input 18-bit programmable divider consisting of: Binary 7-bit swallow counter: 0 to 127 Binary 11-bit programmable counter: 16 to 2047 * Serial input 15-bit programmable reference divider consisting of: Binary 14-bit programmable reference counter: 8 to 16383 1-bit switch counter (SW) sets divide ratio of prescaler * * * *
(Continued)
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PACKAGE
20 pin, Plastic SSOP
(FPT-20P-M03)
1
MB1511
(Continued) * On-chip analog switch achieves fast lock up time * 2 types of phase detector output On-chip charge pump (Bipolar type) Output for external charge pump * Wide operating temperature: -40C to +85C * 20-pin Plastic Shrink Small Outline Package (Suffix: -PFV)
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MB1511
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PIN ASSIGNMENT
(TOP VIEW)
OSCIN NC OSCOUT VP VCC DO GND LD NC fin 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R NC P fout BiSW FC LE Data NC Clock
(FPT-20P-M03)
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PIN DESCRIPTION
Pin No. Pin Name I/O Functions
1 3 4 5 6 7 8 10 11
OSCIN OSCOUT VP VCC DO GND LD fin Clock
I O -- -- O -- O I I
Oscillator input. Oscillator output. A crystal is placed between OSCIN and OSCOUT. Power supply input for charge pump and analog switch. Power supply voltage input. Charge pump output. The characteristics of charge pump is reversed depending upon FC input. Ground. Phase comparator output. Normally this pin outputs high level. While the phase difference of fr and fp exists, this pin outputs low level. Prescaler input. The connection with an external VCO should be AC connection. Clock input for 19-bit shift register and 16-bit shift register. On rising edge of the clock shifts one bit of data into the shift registers. Binary serial data input. The last bit of the data is a control bit which specified destination of shift registers. When this bit is high level and LE is high level, the data stored in shift register is transferred to 15-bit latch. When this bit is low level and LE is high level, the data is transferred to 18-bit latch. Load enable input (with internal pull up resistor). When LE is high or open, the data stored in shift register is transferred into latch depending upon the control bit. At the time, internal charge pump output is connected to BiSW pin because internal analog switch becomes ON state. Phase select input of phase comparator (with internal pull up resistor). When FC is low level, the characteristics of charge pump, phase comparator is reversed. FC input signal controls fout pin (test pin) output level, fr or fp. Analog switch output. Usually BiSW pin is set high-impedance state. When internal analog switch is ON (LE pin is high level), this pin outputs internal charge pump output. Minitor pin of phase comparator input. fout pin outputs either programmable reference divider output (fr) or programmable divider output (fp) depending upon FC pin input level. FC = H: It is the same as fr output level. FC = L: It is the same as fp output level. Output for external charge pump. The characteristics are reversed according to FC input. P pin is N-channel open drain output. No connection.
13
Data
I
14
LE
I
15
FC
I
16
BiSW
O
17
fout P R NC
O
18 20 2, 9 12, 19
O O --
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MB1511
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BLOCK DIAGRAM
16 bit shift register V CC 5 16 bit shift register GND 7 15 bit latch LE 14 15 bit latch Monitor frequency changing circuit
17 fout
15 FC 8 LD
Programmable reference divider OSC IN 1 Cristal oscillator Binary 14-bit S reference counter W
Phase comparator
20 R
fr fp
OSC OUT 3 Analog switch
18 P
16 BiSW
Charge pump 19 bit shift register 19 bit shift register
4 VP
6 DO
18 bit latch fin 10 Prescaler 7 bit latch 11 bit latch
Programmable
Binary 7 bit swallow counter Data 13 Control 1 bit latch
Binary 11 bit programmable counter
Control circuit Clock 11
: Data signal : Control signal
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FUNCTIONAL DESCRIPTIONS
1. Pulse Swallow Function The divide ratio is set using the following equation. fVCO = [(M x N) + A] x fOSC / R fVCO : Output frequency of external voltage controlled oscillator (VCO) M : Preset modulus of external dual modulus prescaler (64 or 128) N : Preset divide ratio of binary 11-bit programmable counter (16 to 2047) A : Preset divide ratio of binary 7-bit swallow counter (0 A 127, A < N) fOSC : Output frequency of the external reference frequency oscillator R : Preset divide ratio of binary 14-bit programmable reference counter (8 to 16383) 2. Serial Data Input Serial data input is achieved by three inputs, such as Data pin, Clock pin and LE pin. Serial data input controls 15bit programmable reference divider and 18-bit programmable divider, respectively. Binary serial data is input to Data pin. On rising edge of clock shifts one bit of serial data into the internal shift registers and when load enable pin is high level or open, stored data is transferred into latch depending upon the control bit. Control data "H" data is transferred into 15-bit latch. Control data "L" data is transferred into 18-bit latch.
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MB1511
(1) Programmable Reference Divider
Programmable reference divider consists of 16-bit shift register, 15-bit latch and 14-bit reference counter. Serial 16bit data format is shown below.
Control bit LSB C S 1 S 2 S 3 S 4 S 5 S 6 S 7
Divide ratio of prescaler setting bit MSB S 8 S 9 S 10 S 11 S 12 S 13 S 14 S W
Divide ratio of programmable reference counter setting bit * 14-BIT PROGRAMMABLE REFERENCE COUNTER DIVIDE RATIO Divide Ratio R 8 9 ... S 14 0 0 ... S 13 0 0 ... S 12 0 0 ... S 11 0 0 ... S 10 0 0 ... S 9 0 0 ... S 8 0 0 ... S 7 0 0 ... S 6 0 0 ... S 5 0 0 ... S 4 1 1 ... S 3 0 0 ... S 2 0 0 ... 1 S 1 0 1 ... 1
16383
1
1
1
1
1
1
1
1
1
1
1
1
NOTES: Divide ratio less than 8 is prohibited. Divide ratio: 8 to 16383 SW: This bit selects divide ratio of prescaler. SW = H: 64/65 SW = L: 128/129 S1 to S14: These bits select divide ratio of programmable reference divider. C: Control bit (sets as high level). Data is input from MSB side.
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MB1511
(2) Programmable Divider
Programmable divider consists of 19-bit shift register, 18-bit latch, 7-bit swallow counter and 11-bit programmable counter. Serial 19-bit data format is shown following page.
Control bit LSB C S 1 S 2 S 3 S 4 S 5 S 6 S 7 S 8 S 9 S 10 S 11 S 12 S 13 S 14 MSB S 15 S 16 S 17 S 18
Divide ratio of swallow counter setting bit
Divide ratio of programmable counter setting bit
* 7-bit Swallow Counter Divide Ratio Divide Ratio S A 0 1 ... 7 0 0 ... S 6 0 0 ... S 5 0 0 ... S 4 0 0 ... S 3 0 0 ... S 2 0 0 ... S 1 0 1 ...
* 11-bit Programmable Counter Divide Ratio Divide Ratio S N 16 17 ... 18 0 0 ... S 17 0 0 ... S 16 0 0 ... S 15 0 0 ... S 14 0 0 ... S 13 0 0 ... S 12 1 1 ... S 11 0 0 ... S 10 0 0 ... S 9 0 0 ... 1 S 8 1 1 ... 1
127
1
1
1
1
1
1
1
2047 Notes:
1
1
1
1
1
1
1
1
1
Note: Divide ratio: 0 to 127
Divide ratio less than 16 is prohibited. Divide ratio: 16 to 2047 S1 to S7: Swallow counter divide ratio setting bit. (0 to 127) S8 to S18: Programmable counter divide ratio setting bit. (16 to 2047) C: Control bit (sets as low level). Data is input from MSB side.
3. Serial Data Input Timing
t 1~t 5 1 s
Data
S18 = MSB
S17
S10
S9
S1 = LSB
C : CONTROL BIT
* (SW)
(S14)
(S8)
(S7)
(S1)
(C : CONTROL BIT)
Clock
LE
t
1
t2
t3
t4 t5
* : Paranthesis data is used for setting divide ratio of programmable reference divider. On rising edge of clock shifts one bit of data in the shift register. 8
MB1511
4. Phase Characteristics FC pin is provided to change phase characteristics of phase comparator. Characteristics of internal charge pump output level (DO), phase comparator output level (R, P) are reversed depending upon FC pin input level. Also, monitor pin (fOUT) output level of phase comparator is controlled by FC pin input level. The relation between outputs (DO, R, P) and FC input level are shown below.
FC : "H" or open DO R P fout DO R FC : "L" P fout
fr > fp fr = fp fr < fp
H Z L
L L H
L Z Z
(fr) (fr) (fr)
L Z H
H L L
Z Z L
(fp) (fp) (fp)
Note: Z = (High impedance)
Depending upon VCO characteristics, FC pin should be set accordingly:
VCO Output Frequency
(1)
* When VCO characteristics are like (1), FC should be set High or open circuit; When VCO characteristics are like (2), FC should be set Low.
(2) VCO Input Voltage
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MB1511
Phase comparator output waveforms are shown below.
fr fp
LD
H
DO
fr > fp fr = fp
Z
L fr < fp fr < fp fr < fp
Notes: Phase difference detection range: -2 to +2 Spike appearance depends on charge pump characteristics. Also, the spike is output in order to diminish dead band. When fr>fp or fr5. Analog Switch ON/OFF of analog switch is controlled by LE input signal. When the analog switch is ON, internal charge pump output (DO) is connected to BiSW pin. When the analog switch is OFF, BiSW pin is set to high-impedance state.
LE Analog Switch
H (Changing the divide ratio of internal prescaler) L (Normal operationg mode)
ON OFF
When an analog switch is inserted between LP1 and LP2, faster lock up times is achieved to reduce LPF time constant during PLL channal switching.
DO CHARGE PUMP LPF-1 LPF-2 VCO
BiSW ANALOG SW (CONTROL SIGNAL LE)
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MB1511
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ABSOLUTE MAXIMUM RATINGS (See WARNING)
Parameter Symbol VCC VP VOUT VOOP IOUT Tstg Rating Min. -0.5 VCC -0.5 -0.5 -10 -55 Max. +7.0 +10.0 VCC +0.5 +8.0 +10 +125 Unit V V V V mA C
Power supply voltage Output voltage Open-drain voltage Output current Storage temperature
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
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RECOMMENDED OPERATING CONDITIONS
Parameter Symbol VCC VP VIN Ta Value Min. 2.7 VCC GND -40 Typ. 3.0 -- -- -- Max. 5.5 8.0 VCC +85 Unit V V V C
Power supply voltage Input voltage Operating temperature
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. HANDLING PRECAUTIONS * This device should be transported and stored in anti-static containers. * This is static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover workbenches with grounded conductive mats. * Always turn the power supply off before inserting or removing the device from its socket. * Protect leads with a conductive sheet when handing or transporting PC boards with devices.
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ELECTRICAL CHARACTERINSTICS
(VCC = 2.7 V to 5.5 V, Ta = -40C to +85C) Parameter Symbol ICC fin*2 OSCIN fin-1*
3 4
Values Min. -- 10 -- -4 -10 0.5 VCCx0.7 -- -- -- -- -- 2.2 -- -- -1.0 1.0 -- Typ. 7.0 -- 12 -- -- -- -- -- 1.0 -1.0 50 -60 -- -- -- -- -- 25 Max. -- 1100 20 6 6 -- -- VCCx0.3 -- -- -- -- -- 0.4 1.1 -- -- --
Unit mA MHz MHz dBm dBm Vp-p V V A A A A V V A mA mA
Power supply current*1 Operating frequency
fIN fOSC Vfin1 Vfin2 VOSC VIH VIL IIH IIL IOSC ILE VOH*5 VOL IOFF IOH IOL RON
Input sensitivity
fin-2*
OSCIN High-level input voltage Low-level input voltage High-level input current Low-level input current Input current High-level output voltage Low-level output voltage N-channel open drain cutoff current Output current Analog switch on resistance Except fin and OSCIN Data, clock OSCIN LE, FC Except DO and OSCOUT DO, P*6 Except DO and OSCOUT
*1: fin =1.1 GHz, OSCIN=12 MHz, VCC=3V. Inputs are grounded and outputs are open. *2: AC coupling. Minimum operating frequency is measured when a capacitor 1000pF. *3: VCC=4.0 to 5.5V, 50 () *4: VCC=2.7 to 4.0V, 50 () *5: VCC=3V *6: VP=VCC to 8V, VOOP=GND to 8V
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MB1511
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MEASURMENT CIRCUIT
VCC = 3 V 1000 pF P*G 50 10 0.1 F 7 5 4
X'tal
VP = 6 V
3
1
11
13
14
17
Oscilloscope
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MB1511
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TYPICAL APPLICATION EXAMPLE
VPX (6V)
10 k 12 k 12 k LPF VCO
OUTPUT
From Controller 10 k
47 k 20 R 18 P 17 fout 16 BiSW 15 FC 14 LE 13 Data 11 Clock
47 k
MB1511
OSCIN 1
OSCOUT 3
VP 4 6V
VCC 5 3V
DO 6
GND 7
LD 8
fin 10 1000 pF VCC (3 V) 100 k 33 k 0.01 F Lock Detector 10 k
X'tal
C1
C2
0.1 F
VPX, VP : C1, C2 P :
8 V max. Depends on crystal oscillator With internal pull up resistor Open drain output
LE, FC : :
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ORDERING INFORMATION
Part number Package 20-pin plastic SSOP (FPT-20P-M03) Remarks
MB1511PFV
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MB1511
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PACKAGE DIMENSION
20 pin, Plastic SSOP (FPT-20P-M03)
* 6.500.10(.256.004)
20 11
Note1) *: This dimension does not include resin protruction. Note2) Pins width and pins thickness include plating thickness.
0.170.03 (.007.001)
* 4.400.10
INDEX
6.400.20 (.173.004) (.252.008)
Details of "A" part 1.25 -0.10 .049 -.004 LEAD No.
1 10
+0.20 +.008
(Mounting height)
0.65(.026)
"A" 0.240.08 (.009.003) 0.13(.005)
M
0~8 0.100.10 (Stand off) (.004.004) 0.25(.010)
0.10(.004)
0.500.20 (.020.008) 0.45/0.75 (.018/.030)
C
1999 FUJITSU LIMITED F20012S-3C-5
Dimensions in mm (inches).
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MB1511
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0104 (c) FUJITSU LIMITED Printed in Japan

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