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| TM NS ESIG EW D UCT R N OD R D FO NDE ITUTE P E OMM SUBST REC LE 0N NOT Data ISheet IRFP14 SS B PO IRFP140 June 2000 File Number 2086.4 31A, 100V, 0.077 Ohm, N-Channel Power MOSFET [ /Title (IRFP1 40) /Subject (31A, 100V, 0.077 Ohm, NChannel Power MOSFET) /Autho r () /Keywords (31A, 100V, 0.077 Ohm, NChannel Power MOSFET, Intersil Corporation, TO247) /Creator () /DOCI NFO This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17421. Features * 31A, 100V * rDS(ON) = 0.077 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER IRFP140 PACKAGE TO-247 BRAND IRFP140 Symbol D NOTE: When ordering, include the entire part number. G S Packaging JEDEC STYLE TO-247 SOURCE DRAIN GATE DRAIN (FLANGE) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000 IRFP140 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRFP140 100 100 31 22 120 20 180 1.2 100 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured between the Contact Screw on Header that is Closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S TEST CONDITIONS VGS = 0V, ID = 250A (Figure 10) VGS = VDS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V VGS = 10V, ID = 19A (Figures 8, 9) VDS 50V, ID = 19A (Figure 12) VDD = 50V, ID 28A, RGS = 9.1, RL = 1.7, VGS = 10V MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = 10V, ID 27A, VDS = 0.8 x Rated BVDSS, IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VGS = 0V, VDS 25V, f = 1.0MHz (Figure 11) MIN 100 2.0 31 9.3 - TYP 0.055 14 15 72 40 50 38 10 21 1275 550 160 5.0 MAX 4.0 25 250 100 0.077 23 110 60 75 59 - UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance Internal Source Inductance LS - 12.5 - nH Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJC RJA Free Air Operation - - 0.83 30 oC/W oC/W 2 IRFP140 Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode G D MIN - TYP - MAX 31 120 UNITS A A S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovered Charge NOTES: VSD trr QRR TJ = 25oC, ISD = 31A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 28A, dISD/dt = 100A/s TJ = 25oC, ISD = 28A, dISD/dt = 100A/s 70 0.44 150 0.91 2.5 300 1.9 V ns C 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 160H, RG = 50, peak IAS = 31A. Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 Unless Otherwise Specified 40 ID , DRAIN CURRENT (A) 32 24 16 8 0 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZJC , TRANSIENT THERMAL IMPEDANCE 10 1 0.5 0.1 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE 10-3 10-5 PDM 10-2 t1 t2 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-4 10-3 10-2 0.1 1 10 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 IRFP140 Typical Performance Curves 103 OPERATION IN THIS REGION IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 10s 100s 1ms 10 10ms TC = 25oC TJ = MAX RATED SINGLE PULSE 1 1 DC Unless Otherwise Specified (Continued) 50 VGS = 10V VGS = 8V VGS = 7V ID, DRAIN CURRENT (A) 40 102 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 30 VGS = 6V 20 VGS = 5V 10 VGS = 4V 10 VDS , DRAIN TO SOURCE VOLTAGE (V) 102 103 0 0 10 20 30 40 VDS , DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS 50 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V VGS = 8V 102 VGS = 7.0V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 10 30 VGS = 6V 20 VGS = 5V 10 VGS = 4V 0 0 1 2 3 4 VDS , DRAIN TO SOURCE VOLTAGE (V) 5 TJ = 175oC 1 TJ = 25oC 0.1 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS 1.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE VOLTAGE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 3.0 rDS(ON), DRAIN TO SOURCE 0.8 ON RESISTANCE () 2.4 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID = 19A, VGS = 10V 0.6 VGS = 10V 0.4 1.8 1.2 0.2 VGS = 20V 0 25 50 75 ID , DRAIN CURRENT (A) 100 125 0.6 0 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4 IRFP140 Typical Performance Curves 1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A Unless Otherwise Specified (Continued) 3000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD 2400 COSS CDS + CGD 1800 1.15 C, CAPACITANCE (pF) 1.05 CISS 0.95 1200 COSS 0.85 600 CRSS 0.75 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0 0 2 5 10 20 50 100 TJ , JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 20 gfs, TRANSCONDUCTANCE (S) 16 TJ = 25oC ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 103 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 102 12 TJ = 175oC 8 TJ = 175oC 10 4 TJ = 25oC 1 0 0.6 1.2 1.8 2.4 VSD , SOURCE TO DRAIN VOLTAGE (V) 3.0 0 0 10 20 30 ID , DRAIN CURRENT (A) 40 50 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 34A 16 VDS = 20V 12 VDS = 50V VDS = 80V 8 4 0 0 12 24 36 48 60 Qg, GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 IRFP140 Test Circuits and Waveforms VDS tP IAS + BVDSS L VDS VDD VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG - VDD 0V IAS 0.01 0 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr VDS RL 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS 0 10% 50% PULSE WIDTH 50% VGS FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD Qg(TOT) Qgd Qgs VGS 12V BATTERY 0.2F 50k 0.3F SAME TYPE AS DUT D G DUT VDS 0 IG(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS 6 IRFP140 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-1, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-25158508 FAX: 886-2-25158369 7 |
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