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19-2694; Rev 0; 12/02
MAX3740 Evaluation Kit
General Description
The MAX3740 evaluation kit (EV kit) is an assembled demonstration board that provides complete optical and electrical evaluation of the MAX3740 VCSEL driver. The EV kit has an electrical section and an optical section. The output of the electrical evaluation section is interfaced to an SMA connector, which can be connected to a 50 terminated oscilloscope. The optical section of the evaluation board is populated with a DS1858 digital potentiometer and allows evaluation of the MAX3740 in an SFP layout. With slight modifications, a common-cathode VCSEL also can be evaluated using the electrical side of the EV kit. o Fully Assembled and Tested o Single +3.3V Power-Supply Operation o Allows Optical and Electrical Evaluation o Allows Evaluation with DS1858 in SFP Layout
Features
Evaluates: MAX3740
Ordering Information
PART MAX3740EVKIT TEMP RANGE -40C to +85C IC PACKAGE 24 QFN
Electrical Evaluation Component List
DESIGNATION C1, C2, C5, C9, C13, C15, C16, C17 C3 C4, C6, C7, C8, C11, C12 C10 C14 C18 D1 D2 L1, L2, L3 L4 R1, R2 R3 R4 R5, R12 R6, R13 R7 R8 R9, R11 QTY 8 DESCRIPTION 0.1F 10% ceramic capacitors (0402) 0.047F 10% ceramic capacitor (0402) 0.01F 10% ceramic capacitors (0402) Open 10F 10% ceramic capacitor (0805) 10F 10% tantalum capacitor, case B VCSEL laser and photodiode* LED, red T1 package 600 ferrite beads (0603) Murata BLM18HD102SN1 1H inductor (1008CS) Coilcraft 1008CS-102XKBC 10k potentiometers 350 resistor (0402) 2.49k resistor (0402) 499 resistors (0402) 10k resistors (0402) 0 resistor (0402)* 4.7k resistor (0402) 49.9 resistors (0402) Q3 JU1-JU8, JU10 J1-J7 TP1-TP11, TP20, TP21 U1 U2 None None None 1 9 7 13 1 1 9 1 1 DESIGNATION R10, R26, R27, R34, R35, R36 R14 1 6 1 1 1 1 1 3 1 2 1 1 2 2 1 1 2 R15 R16 Q1, Q2 QTY 6 1 1 1 2 Open 20k potentiometer 50k potentiometer 500k potentiometer NPN transistors (SOT23) Zetex FMMT491A MOSFET (SOT23) Zetex BS170F 2-pin headers, 0.1in centers SMA connectors, round contacts Test points MAX3740ETG (24 QFN) MAX495ESA (8 SO) Shunts MAX3740 EV board MAX3740 data sheet DESCRIPTION
*These components are not supplied but can be populated if the user wants to test the VCSEL with the electrical side of the EV kit.
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX3740 Evaluation Kit Evaluates: MAX3740
Optical Evaluation Component List
DESIGNATION C19 C20, C25, C27 C21 C22 C23, C26, C28, C29 C30 J9, J10 JU9 L5 L6 R17, R18, R28 R21, R22, R23, R33 R24 R25 R29, R30 R31 R32 TP13-TP19, TP22, TP23 U3 U4 QTY 1 3 1 1 4 1 2 1 1 1 3 4 1 1 2 1 1 9 1 1 DESCRIPTION 0.01F 10% ceramic capacitor (0402) 0.1F 10% ceramic capacitors (0402) 10F 10% tantalum capacitor, case B 0.047F 10% ceramic capacitor (0402) 0.01F 10% ceramic capacitors (0201) Open SMA connectors, round contacts 2-pin header, 0.1in center 1H inductor (1008CS) Coilcraft 1008CS-102XKBC 600 ferrite bead (0603) Murata BLM18HD102SN1 4.7k resistors (0603) Open 350 resistor (0201) 1.7k resistor (0201) 0 resistors (0201) 49.9 resistor (0402) 20k resistor (0402) Test points MAX3740ETG (24-pin QFN) DS1858 (16-pin BGA, 1.5mm pitch)
Quick Start
Electrical Evaluation
In the electrical configuration, an automatic power-control (APC) test circuit is included to emulate a semiconductor laser with a monitor photodiode. Monitor diode current is provided by transistor Q1, which is controlled by an operational amplifier (U2). The APC test circuit, consisting of U2 and Q1, applies the simulated monitor diode current to the MD pin of the MAX3740. To ensure proper operation in the electrical configuration, set up the evaluation board as follows: 1) Place shunts on JU4-JU8 and JU10 (see the Adjustment and Control Descriptions section for details). 2) Remove shunts JU1 and JU2. 3) To enable the outputs, connect TX_DISABLE to GND by placing a shunt on JU3. Note: When performing the following resistance checks, autoranging DMMs may forward bias the on-chip ESD protection and cause inaccurate measurements. To avoid this problem, manually set the DMM to a high range. 4) Adjust R15, the RBIASSET potentiometer, for 1.7k resistance between TP4 (BIASSET) and ground. 5) Adjust R1, the RPWRSET potentiometer, for 10k resistance between TP2 (REF) and pin 1 (MD) of JU2. 6) Adjust R14, the RPEAKSET potentiometer, for 20k resistance between TP10 (PEAKSET) and ground to disable peaking. 7) Adjust R16, the RTC potentiometer, for 0 resistance between TP7 (TC1) and TP8 (TC2) to disable temperature compensation. 8) Adjust R2, the RMODSET potentiometer, for 10k resistance between TP9 (MODSET) and ground. 9) Apply a differential input signal (250mV P-P to 2200mVP-P) between SMA connectors J5 and J7 (IN+ and IN-). 10) Attach a high-speed oscilloscope with a 50 input to SMA connector J6 (OUT). 11) Connect a +3.3V supply between TP20 (VCC) and TP21 (GND). Adjust the power supply until the voltage between TP11 and ground is +3.3V. 12) Adjust R1 (RPWRSET) until the desired laser bias current is achieved. IBIAS = VPIN1_ JU5 49.9
Component Suppliers
SUPPLIER AVX Coilcraft Murata Zetex PHONE 803-946-0690 847-639-6400 814-237-1431 516-543-7100 FAX 803-626-3123 847-639-1469 814-238-0490 516-864-7630
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MAX3740 Evaluation Kit
13) The MD and BIAS currents can be monitored at TP1 (VPWRMON) and TP3 (VBIASMON) using the equations below: IMD = VPWRMON 2 x RPWRSET 9 x VBIASMON 350 9) Adjust R16, the RTC potentiometer, for 0 resistance between TP7 (TC1) and TP8 (TC2), to disable temperature compensation. 10) Adjust R2, the RMODSET potentiometer, for 10k resistance between TP9 (MODSET) and ground. 11) Apply a differential input signal (250mV P-P to 2200mVP-P) between SMA connectors J5 and J7 (IN+ and IN-). 12) Attach the VCSEL fiber connector to an optical/electrical converter. 13) Connect a +3.3V supply between TP20 (VCC) and TP21 (GND). Adjust the power supply until the voltage between TP11 and ground is +3.3V. 14) Adjust R1 (RPWRSET) until desired average optical power is achieved. 15) The MD and BIAS currents can be monitored at TP1 (VPWRMON) and TP3 (VBIASMON) using the following equations: IMD = VPWRMON 2 x RPWRSET 9 x VBIASMON 350
Evaluates: MAX3740
IBIAS =
Note: If the voltage at TP1 exceeds VPMTH (0.8V typ) or TP3 exceeds VBMTH (0.8V typ), the FAULT signal is asserted and latched. 14) Adjust R2 until the desired laser modulation current is achieved. IMOD = Signal Amplitude (V) 50
15) Adjust R14 (RPEAKSET) until the desired amount of peaking is achieved.
Optical Evaluation with Mechanical Potentiometers
For optical evaluation of the MAX3740, configure the evaluation kit as follows: 1) Place shunts on JU2, JU6, JU7, JU8, and JU10 (see the Adjustment and Control Descriptions section). 2) Remove components L2 and C9. Remove the shunts from JU1, JU4, and JU5. 3) Install a 0 resistor at R7 to connect the anode of the VCSEL to the output. 4) To enable the outputs, connect TX_DISABLE to GND by placing a shunt on JU3. 5) Connect a common-cathode VCSEL as shown in Figure 1. Keep leads short to reduce reflection. Note: When performing the following resistance checks, autoranging DMMs may forward bias the on-chip ESD protection and cause inaccurate measurements. To avoid this problem, manually set the DMM to a high range. 6) Adjust R15, the RBIASSET potentiometer, for 1.7k resistance between TP4 (BIASSET) and ground. 7) Adjust R1, the RPWRSET potentiometer, for 10k resistance between TP2 (REF) and pin 1 (MD) of JU2. 8) Adjust R14, the RPEAKSET potentiometer, for 20k resistance between TP10 (PEAKSET) and ground to disable peaking. IBIAS =
Note: If the voltage at TP1 exceeds VPMTH (0.8V typ) or TP3 exceeds VBMTH (0.8V typ), the FAULT signal is asserted and latched. 16) Adjust R2 (R MODSET ) until the desired optical amplitude is achieved. Optical amplitude can be observed on an oscilloscope connected to an optical/electrical converter. VCSEL overshoot and ringing can be improved by appropriate selection of R10 and C10, as described in the Design Procedure section of the MAX3740 data sheet. 17) To improve the falling edge of a VCSEL, adjust R14 (RPEAKSET).
Optical Evaluation Using the DS1858 Digital Potentiometer with Monitors
The MAX3740 optical evaluation side is similar to an SFP transmitter. In this configuration, RMODSET and RPWRSET are provided by the DS1858 digital potentiometer. The DS1858 also monitors the PWRMON and BIASMON outputs of the MAX3740. Control for the DS1858 is provided through a two-wire interface at TP14 (MOD-DEF2) and TP15 (MOD-DEF1). For control of the digital potentiometer, refer to the DS1858 data sheet.
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MAX3740 Evaluation Kit
1) To enable the outputs, connect TX_DISABLE to GND by placing a shunt on JU9. 2) Connect a common-cathode VCSEL as shown in Figure 2. Keep the leads short to reduce reflection. 3) Apply a differential input signal (250mV P-P to 2200mVP-P) between SMA connectors J9 and J10 (IN+ and IN-). 4) Attach the VCSEL fiber connector to an optical/electrical converter. 5) Connect a +3.3V supply between TP22 (VCCT) and TP23 (GND). Adjust the power supply until the voltage between TP13 and ground is +3.3V. 6) Adjust the RPWRSET resistor using the DS1858 until desired average optical power is achieved. Refer to the DS1858 data sheet for control instructions. 7) The MD and BIAS currents can be monitored through the DS1858 (refer to DS1858 data sheet), or at TP16 (VPWRMON) and TP17 (VBIASMON) using the following equations:
Evaluates: MAX3740
VPWRMON 2 x RPWRSET 9 x VBIASMON IBIAS = 350 IMD = Note: If the voltage at TP16 exceeds VPMTH (0.8V typ) or TP17 exceeds VBMTH (0.8V typ), the FAULT signal is asserted and latched. 8) Adjust the RMODSET resistor using the DS1858 until the desired optical amplitude is achieved. Optical amplitude can be observed on an oscilloscope connected to an optical/electrical converter. Refer to the DS1858 data sheet for control instructions. 9) If needed, change the value of RPEAKSET (R32) to improve the falling edge of the VCSEL.
Adjustment and Control Descriptions (see Quick Start)
COMPONENT D2 JU1 JU2 JU3, JU9 JU4 JU5 JU6 JU7 JU8 JU10 R1 R2 R14 R15 R16 TP14 TP15 NAME Fault Indicator COMP PHOTODIODE TX_DISABLE IPD APCOPEN FAULT SQUELCH POWER VCCEXT RPWRSET RMODSET RPEAKSET RBIASSET RTC MOD-DEF2 MOD-DEF1 FUNCTION The LED is illuminated when a fault condition has occurred (refer to the Detailed Description section of the MAX3740 data sheet). Enables/disables the APC circuit. Remove the shunt to enable the APC circuit. Installing a shunt connects the photodiode of the VCSEL to the MD pin. Used when a VCSEL is installed. Enable/disable the output currents. Install a shunt to enable output currents. Determines the gain of the photodiode emulator. When JU4 is open, the gain is 0.02A/A. When JU4 is shunted, the gain is 0.12A/A. Installing a shunt connects the electrical output of the part to the emulation circuit. Installing a shunt enables the external fault-indicator circuit. Installing a shunt enables the squelch function. Installing a shunt enables power to the part. Installing a shunt provides power to the emulation and fault-indicator circuits. Adjusts transmit optical power to be maintained by the APC loop. Adjusts the laser modulation current. Adjusts the peaking for the falling edge of the VCSEL. In a closed-loop configuration, adjusts the maximum bias current available to the APC. In an open-loop configuration, adjusts the bias level of the output. Adjusts the temperature compensation of the modulation current. Part of the two-wire interface for the DS1858. Refer to the DS1858 data sheet. Part of the two-wire interface for the DS1858. Refer to the DS1858 data sheet.
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JU8 POWER L4 1H L3 BLM18HD102SN1 JU10 VCCEXT VCCEXT
TP11 NOISEGEN
VC C1
TP20 VC C C14 10F C17 0. 1F TP6 PORTE ST C15 0. 1F C16 0. 1F C18 10F C7 F 0.01
Q3
TP21 GND
R35 O PEN C12 F 0.01 VCCEXT
JU2 PHOTODIODE
C1 0. 1F
R1 10k PWRSET VC C1
7
C6 F 0.01 Q1 FMMT491 A
3 U2 2
C3 0.04 7F
JU1 COMP
MD
REF
VCC
2
R36 O PEN
TX_DISABLE BIASSET VCC
16 15 14
17
VC C1
J5 IN +
IN+ INFAULT SQUELCH VCC TC1 TC2 GN D
J7 IN -
C13 0. 1F
4 5
U1 MAX3740
OUT+
C8 F 0.01 C9 0. 1F
R15 50 k BIASSET
C5 0. 1F
L2 BLM18HD102SN1
3
J6 OUT C11 F 0.01
VCCEXT VC C1 JU7 SQUELCH
OUTGND MODSET
6
13
R9 49. 9 C10 O PEN
R7 O PEN
D2 FAULT R13 10k VC C1
PEAKSET
2 R10 O PEN 1
4 3 D1 VCSEL PHOTODIOD E
Q2 FMMT491A
7
JU6 FAULT R8 4.7k C4 F 0.01 R16 500k TC
8
R12 499 TP5 FAULT
TP9 MODSET R27 O PEN R26 O PEN
TP10 PEAKSET R2 10k MODSET R14 20 k PEAKSET R34 O PEN
Evaluates: MAX3740
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J2 CALOUT+ TP2 REF MAX495 TP3 BIASMON R3 350
TP7 TC1
TP8 TC2
JU5 APCOPEN R11 49. 9
GND BIAS
PWRMON
BIASMON
JU3 TX_DISABLE
1
COMP
Figure 1. MAX3740 EV Kit Electrical Schematic
6 4
J4 CALOUTTP1 PWRM ON
J1 CALIN+
C2 0. 1F
J3 CALIN-
24
L1 BLM18HD102SN1
23
22
21
20
19
R4 2.49k
JU4 IP D
R5 499
R6 10k
18
TP4 BIASSET
MAX3740 Evaluation Kit
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Evaluates: MAX3740
REF
MD
PWRMON
BIASMON
JU9
BMON+
TX_DISABLE
VCCT1
BIASSET VCC
16 15 14
1 3 C30 O PEN 2 D1 VCSEL PHOTODIODE R18 4.7k 4 C28 F 0.01
J9 IN +
C25 0. 1F
3
IN+ INFAULT SQUELCH VCC TC1 TC2 GN D MODSET GND
13
R31 49. 9 R33 O PEN
MAX3740 Evaluation Kit
MON2
MON1
GND
5
OUT-
C29 F 0.01
VCCT1
L1
J10 IN -
C27 0. 1F
4
U3 MAX3740
OUT+
D4
D3
PMON+
PEAKSET
OUT2
SDA
H1
VCCT1
B1
R17 4.7k
B2
B3
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RS ET L5 1H TP16 PMON+ R22 O PEN PMON+ BMON+ R24 350 R21 O PEN L6 BLM18HD102SN1 TP23 GND R23 O PEN C22 F 0.047 VCCT1 C21 10F C20 0. 1F C26 F 0.01 C19 F 0.01 TP17 BMON+ TP22 VC CT C23 F 0.01 TP13 VCCT1 VCCT1
RS ET TP14 MOD-DEF 2
L0
Figure 2. MAX3740 EV Kit Optical Schematic with DS1858
24 23 22 21 20 19 1
COMP
VCC
6
GND
17
TP18 TX_DISABLE
BIAS
18
R25 1.7k
2
D2
VCCT1
6
A1 A2
TP15 MOD-DEF 1 VCCT1
C1
IN1 SC L
A3 A4
MON3
C1
R28 4.7k VCCT1 R29 0 R32 20k
OUT1
C1
TP19 FAULT
7
8
VCC H0
U4 DS1858
IN2
C1
WP
R30 0
MAX3740 Evaluation Kit Evaluates: MAX3740
1.0"
1.0"
Figure 4. MAX3740 EV Kit PC Board Layout--Component Side
Figure 3. MAX3740 EV Kit Component Placement Guide-- Component Side
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MAX3740 Evaluation Kit Evaluates: MAX3740
1.0"
Figure 5. MAX3740 EV Kit PC Board Layout--Ground Plane
1.0"
Figure 6. MAX3740 EV Kit PC Board Layout--Power Plane
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MAX3740 Evaluation Kit Evaluates: MAX3740
1.0"
Figure 7. MAX3740 EV Kit PC Board Layout--Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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