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| 19-0085; Rev 0; 3/05 MAX3975 Evaluation Kit ________________ General Description The MAX3975 evaluation kit (EV kit) is an assembled demonstration board that provides complete optical and electrical evaluation of the MAX3975 VCSEL driver. The EV kit is composed of two independent sections, one optical and one electrical, with a score line between the sections for optional separation. The output of the electrical section has a SMA connector that can be connected to a 50 terminated oscilloscope. The output of the optical section is configured for attachment to a VCSEL TOSA flex cable. The optical section includes the DS1862* controller IC for testing closed-loop power control. *Future Product ____________________________ Features Fully Assembled and Tested Allows Optical and Electrical Evaluation Easy Programming of Bias and Modulation Currents AC-Coupling Provided On-Board Evaluates: MAX3975 _______________ Ordering Information PART MAX3975EVKIT TEMP RANGE 0C to +85C IC PACKAGE 20 UCSP-20 _______________________________________________________________Component List DESIGNATION C1, C4, C5, C9 C2, C3, C13, C16, C18, C20, C24, C25, C26 C6, C14, C23 C7, C10, C12, C15 C8, C11, C17, C21 C19 C22 J1-J5 J7, J10, J11, J18, J19, TP1-TP24 JU1, JU3, JU4, JU7-JU11, JU13, JU16 JU2, JU5, JU6, JU12, JU14, JU15 JU1-JU16 L1, L3, L6 L2, L4, L7 L5** QTY 4 9 3 4 4 1 1 5 29 10 DESCRIPTION 0.1F 10% ceramic capacitors (0201) 0.1F 5% ceramic capacitors (0402) 10F 5% tantalum capacitors (B case) 1000pF 5% ceramic capacitors (0201) 0.01F 5% ceramic capacitors (0402) Open 1000pF 5% ceramic capacitor SMA connectors (edge mount, tab contact) EF Johnson 142-0701-851 Test points Digi-Key 5000K-ND 2-pin headers, 0.1in centers Digi-Key S1012-36-ND 3-pin headers, 0.1in centers Digi-Key S1023-36-ND Shunts Digi-Key S9000-ND 1H 5% chip inductors Panasonic ELJFD1R0KF Ferrite beads (0603) Murata BLM18HK331SN1 VCSEL TOSA with 50 flex Advanced Optical Components HFE6190-561 DESIGNATION Q1, Q2 R1, R7 R2, R4, R5, R16 R3, R6, R10, R11 R8 R9 R12 R13 R14, R15, R17, R18, R19 R20 U1, U2 U5 U6* None QTY 2 2 4 4 1 1 1 1 5 1 2 1 1 1 DESCRIPTION P-Channel MOSFETs Fairchild FDN302P 1k 1% resistor (0402) 825 1% resistors (0402) 20k variable resistors 511k 1% resistor (0402) 7.5k 1% resistor (0402) 26.7k 1% resistor (0402) 20.0k 1% resistor (0402) 4.7k 5% resistor (0402) 499 1% resistor (0402) MAX3975UBA (20 UCSP-20) MAX9039BEBT (6 UCSP-6) DS1862 25-ball STPBGA MAX3975 EV kit circuit board, Rev A *Future Product **Component not included with EV kit 6 16 3 3 1 ______________ Component Suppliers SUPPLIER Advanced Optical Components AVX Digi-Key Murata Panasonic PHONE 866-698-2735 843-448-9411 800-344-4539 770-436-1300 201-392-4818 FAX 972-470-4654 843-626-3123 218-681-3380 770-436-3030 201-392-6263 Note: Please indicate that you are using the MAX3975 when ordering from these suppliers. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. MAX3975 Evaluation Kit Evaluates: MAX3975 _____________ Electrical Quick Start The electrical section of the evaluation board requires a positive and negative supply in order for the output termination to electrically emulate the characteristics of a VCSEL. For more information, refer to Figure 1 in the MAX3975 datasheet. If desired, the electrical section of the board can be separated from the optical section by bending the board length-wise until they snap apart. Follow the procedure below to configure the electrical section for evaluation. 1) 2) 3) 4) Place a shunt on JU3. This connects the BIASSET pin to the RBIASSET variable resistor (R11). Place a shunt on JU4. This connects the MODSET pin to the RMODSET variable resistor (R10). Place a shunt on JU1. This enables the driver output by connecting the DISABLE pin to VEE. Adjust R11 until there is 2.4k resistance between TP5 and TP6. This sets the output bias current to approximately 5mA. Adjust R10 until there is 2.4k resistance between TP4 and TP6. This sets the output modulation current to approximately 5mA. Apply a 10Gbps differential signal (650mVp-p) between SMA connectors J1 (IN+) and J2 (IN-). Connect an oscilloscope with a 50 termination to SMA connector J3 (OUT). The output must be DCcoupled to the oscilloscope. Connect a +1.2V supply to J7 (VCC), a -2.1V supply to J11 (VEE), and the supply ground to J10 (GND). Verify there is +1.2V at the VCC pin by measuring the voltage from TP8 to TP7 and adjusting the voltage at J7 accordingly. 7) ________________Optical Quick Start The optical section of the evaluation board requires installation of the VCSEL TOSA with flex cable (not included with EV Kit). The flex cable should be soldered to the board so that the TOSA points toward the top of the board. If desired, the optical section of the board can be separated from the electrical section by bending the board length-wise until they snap apart. Follow the procedure below to configure the optical section for evaluation. 1) 2) Place shunts on JU6, JU7, JU8, JU9, JU10, JU11, JU13, and JU16. Place a shunt across pins 1 and 2 of JU2. This connects the BIASSET pin to the RBIASSET variable resistor (R6). Place a shunt across pins 1 and 2 of JU5. This connects the MODSET pin to the RMODSET variable resistor (R3). Move the shunt on JU6 to the side labelled GND. Place shunts across pins 1 and 2 of JU12, JU14, and JU15. Adjust R6 until there is 6k resistance between TP2 and ground. This sets the output bias current to approximately 2mA. Adjust R3 until there is 6k resistance between TP1 and ground. This sets the output modulation current to approximately 2mA. Apply a 10Gbps differential signal (650mVp-p) between SMA connectors J4 (IN+) and J5 (IN-). Use a multi-mode fiber to connect the VCSEL TOSA to an optical-to-electrical converter or optical power meter. 3) 4) 5) 6) 5) 6) 7) 8) 9) 8) 9) 10) Verify there is -2.1V at the VEE pin by measuring the voltage from TP6 to TP7 and adjusting the voltage at J11 accordingly. 11) Test the driver output current monitor by measuring the voltage from TP3 to TP6. 12) Adjust the variable resistor R11 until the desired bias current is achieved. 13) Adjust the variable resistor R10 until the desired modulation current is achieved. 10) Connect a +3.3V supply to J19 (VCC1) and the supply ground to J18 (GND). The power-on-reset circuit will apply power to the VCSEL and VCC2 when VCC1 reaches approximately 2.9V. 11) Verify there is +3.3V at the VCC pin by measuring the voltage from TP22 to ground and adjusting the voltage at J19 accordingly. 12) Adjust the bias current with R6 and the modulation current with R3 until the desired optical average power and amplitude is achieved. 13) Test the driver output current monitor by measuring the voltage from TP9 to ground. Evaluation with closed loop power control requires the DS1862 controller (U6). Contact Dallas Semiconductor 2 _________________________________________________________________________________________ MAX3975 Evaluation Kit Evaluates: MAX3975 technical support (pots.support@dalsemi.com) for the software and hardware required to program and communicate with the DS1862. The following steps will configure the optical section for using the DS1862. 14) Move the shunt on JU6 to the side labelled FETG. This connects the safety fault output of the controller to the MOSFET gate. 15) Move the shunt on JU2 to pins 2 and 3. This connects the BIASSET pin to the controller BIAS_DR pin. 16) Move the shunt on JU5 to pins 2 and 3. This connects the MODSET pin to the controller MOD_DR pin. 17) Using the DS1862 software, program the controller to achieve the desired average optical power and modulation amplitude. 18) The VCSEL monitor diode current can be determined by removing the shunt from JU10 and measuring the voltage across the two pins. The monitor diode current is equal to the measured voltage divided by 499. _______________ Adjustment and Control Descriptions (see Quick Start first) COMPONENT OPTICAL JU7 - - JU2 ELECTRICAL JU1 JU3 JU4 - NAME DISABLE - - - FUNCTION Enables/disables the driver output currents. Place a shunt on JU1 or JU7 to enable the output currents. Connects the BIASSET pin to the RBIASSET variable resistor (R11). Connects the MODSET pin to the RMODSET variable resistor (R10). Connects the BIASSET pin to either the RBIASSET variable resistor (R6) or to the BIAS_DR pin of the DS1862. Shunt pins 1 and 2 to use the RBIASSET resistor. Shunt pins 2 and 3 to use the DS1862. Connects the MODSET pin to either the RMODSET variable resistor (R3) or the MOD_DR pin of the DS1862. Shunt pins 1 and 2 to use the RMODSET resistor. Shunt pins 2 and 3 to use the DS1862. Adjusts the driver bias current. Rotate clockwise to increase the bias current. Adjusts the driver modulation current. Rotate clockwise to increase the modulation current. Connects the MOSFET gate to either ground or the FETG pin of the DS1862. Connects the VCC1 power plane to the VCC2 power plane. Connects the MONITOR pin to the AUX1 pin of the DS1862. Connects the VCSEL monitor diode to the IMD pin of the DS1862. The VCSEL monitor diode current can be determined by removing the shunt from JU10 and measuring the voltage across the two pins. The monitor diode current is equal to the measured voltage divided by 499. Enables/disables the communication with the DS1862 over the 2wire interface bus (SDA and SCL). Place a shunt on JU11 to enable communication on the bus. JU5 - - R6 R3 JU6 JU8 JU9 R11 R10 - - - RBIASSET RMODSET - VCC2 AUX1 JU10 - MD JU11 - MOD_DESEL _________________________________________________________________________________________ 3 MAX3975 Evaluation Kit Evaluates: MAX3975 __________________________ Adjustment and Control Descriptions (continued) COMPONENT OPTICAL JU12 JU13 JU14 JU15 JU16 ELECTRICAL - - - - - NAME SC_TX_LOL P_DOWN SC_RX_LOS SC_RX_LOL TX_DIS FUNCTION Sets the SC_TX_LOL pin of the DS1862 high or low. Shunt pins 1 and 2 for low. Shunt pins 2 and 3 for high. Enable/disables the power down mode of the DS1862. Remove the shunt to enable power down mode. Sets the SC_RX_LOS pin of the DS1862 high or low. Shunt pins 1 and 2 for low. Shunt pins 2 and 3 for high. Sets the SC_RX_LOL pin of the DS1862 high or low. Shunt pins 1 and 2 for low. Shunt pins 2 and 3 for high. Control pin of the DS1862 used to enable/disable the bias and modulation currents. Place a shunt on JU16 to enable the currents. 4 _________________________________________________________________________________________ J7 C14 10F C16 0.1F TP7 L3 1H L4 TP8 FERRITE BEAD VCC VCC J10 C6 10F C13 0.1F TP6 R5 825 JU4 R11 20k JU3 VEE R10 20k TP4 VEE VEE B4 B5 C5 D5 N.C. VEE N.C. C1 0.1F A5 VEE IN+ U1 DISABLE OUT VEE VEE J1 IN+ JU1 A3 J2 INVCC A1 N.C. VCC B2 C5 0.1F C12 1000pF A2 INVEE C26 0.1F A4 C25 0.1F VEE E5 E4 E3 E2 VCC VCC VEE VCC N.C. B1 C1 D1 D2 MONITOR VCC E1 C15 1000pF C4 0.1F J3 OUT MODSET BIASSET C7 1000pF D4 VEE TP5 R16 825 L2 FERRITE BEAD L1 1H GND J11 Figure 1. MAX3975 EV Kit Schematic - Electrical Section C10 1000pF C9 0.1F VEE VEE MAX3975 VCC VEE TP3 R1 1k Evaluates: MAX3975 _________________________________________________________________________________________ 5 VEE MAX3975 Evaluation Kit Evaluates: MAX3975 J19 VCC1 U5 R12 26.7k IN+ INREF JU8 JU6 FETG AUX1 TP14 E5 IMD VCC2 VCC2 D3 D2 TP11 TP10 N.C. BIAS_DR VEE IN+ U2 DISABLE OUT VCC2 J4 IN+ C21 0.01F J5 INTP18 FETG MOD_DR TP20 R19 4.7k VCC2 VCC1 A1 C8 0.01F N.C. VEE VCC C3 0.1F JU7 A3 A2 A4 C2 0.1F A5 B4 B5 C5 D1 C5 C4 C3 R14 4.7k D5 VEE D4 N.C. VEE VEE E5 E4 6 5 L6 1H TP22 C23 10F C24 0.1F B1 VEE OUT VCC A3 VCC1 C20 0.1F VCC2 A2 B2 B3 R9 7.5k Q2 FDN302P A1 C22 TP23 1000pF L7 FERRITE BEAD VCC1 R8 511k VCC1 VCC1 J18 GND VCC2 JU12 JU11 R20 499 R13 20k VCC2 MAX9039 Q1 FDN302P TP24 JU10 TP13 E3 GND AUX2 R3 20k TP1 TP2 R2 825 E2 E1 D5 D4 JU9 R4 825 TP12 TP21 MOD_DR JU5 JU2 BIAS_DR MD JU13 E4 A2 SC_RX_LOS SC_RX_LOL U6 BIAS_DR MODSET VTH FCTL1 RX_LOS SCL FETG RSSI TX-DIS SDA MOD_DR VCC2 INTRB MOD_NR A3 A4 A5 VCC3 B1 JU15 MOD_DESEL VCC2 SC_TX_LOL IBIAS_MON JU14 A1 P_DOWN AUX1 FCTL2 TP16 BIASSET MONITOR VCC R18 4.7k TP19 JU16 B2 B1 C1 D1 D2 VCC1 N.C. Figure 2. MAX3975 EV Kit Schematic - Optical Section R15 4.7k R6 20k VCC2 MAX3975 Evaluation Kit TP15 C17 0.01F DS1862 VCSEL TOSA PD CATHODE VCC2 B2 B3 B4 B5 C1 C2 E3 4 3 CASE VCSEL CATHODE VCSEL ANODE R17 4.7k TP17 MAX3975 INVCC VCC E2 E1 C18 0.1F VCC1 2 1 CASE PD ANODE HFE6190-561 C19 OPEN C11 0.01F VCC2 MD AUX1 R7 1k TP9 6 _________________________________________________________________________________________ MAX3975 Evaluation Kit Evaluates: MAX3975 Figure 3. MAX3975 EV Kit Component Placement Guide-- Component Side Figure 4. MAX3975 EV Kit PC Board Layout--Component Side _________________________________________________________________________________________ 7 MAX3975 Evaluation Kit Evaluates: MAX3975 Figure 5. MAX3975 EV Kit PC Board Layout--Ground Plane Figure 6. MAX3975 EV Kit PC Board Layout--Power Plane 8 _________________________________________________________________________________________ MAX3975 Evaluation Kit Evaluates: MAX3975 Figure 7. MAX3975 EV Kit PC Board Layout--Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600____________________9 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products |
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