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| Datasheet File OCR Text: |
| Semiconductor ML53001 10/100BASE-TX Fast EtherNet Transceiver LSI GENERAL DESCRIPTION Version 1.00, July 1998 Preliminary ML53001 is a single chip transceiver LSI which facilitates both 100BASE-TX and 10BASE-T EtherNet protocols. The physical layer function can be realised with only a few external components, such as a magnetics. The host interface with commercial MAC (Media Access Control) device can be also realised simply through the MII (Media Independent Interface) bus. FEATURES * 100BASE-TX Transceiver fully compliant with IEEE802.3u Spec. * 10BASE-T Tranceiver fully compliant with IEEE802.3u Spec. * Support MII (Media Independent Interface) * Automatical Negotiation * Integrated LED Driver for the status indication * Supports the function as repeater * Supports power down mode * Single +5V (5%) power supply voltage * Operating temperature 0 to +70C * 100-pin TQFP (TQFP100-P-1414-0.50-K) * Product name ML53001TB CHIP MICROGRAPH BLOCK SCHEMATIC WAVESHAPE 10 PCS10 10TX RX FILTER & SLICER EQL RxDP/ RxDN TxDP/ TxDN MII M I I M U X NRZI to NRZ PCS100 NRZ to NRZI DPLL NRZI to MLT3 100TX MDC MDIO MANAGEMENT CONTROL CLOCKS FS X1 X2 AUTO-NEGOTIATION BIAS TO VARIOUS BLOCKS BIAS BGRES Specification are subject to change without notice. Semiconductor TYPICAL APPLICATIONS * NIC (Network Interface Card) * Hub/Switch/Repeater/Router ML53001 100-pin TQFP (top view) VSSMASB[1] (N/C) (N/C) VSSPLL[1] XC100BT VDDPLL[1] VDDPLL[0] XRC10BT VSSPLL[0] VSSDPLLSUB (N/C) (N/C) VSSCORE[0] VDDCORE[0] PHYAD[4] LEDLINK/PHYAD[3] LEDACTV/PHYAD[2] VSSIO[0] LEDS100/PHYAD[1] LEDFDPX/PHYAD[0] VDDIO[0] VSSCORE[1] VDDCORE[1] RX_EN RPTRMODE 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 VDDMASB MASBRES VSSMASB[0] VDDA VSSA RxDP RxDN VSSEQ VDDEQ (N/C) (N/C) (N/C) (N/C) (N/C) PWRDWN MII_ISOLATE VDDTX VSSTX[2] TxDP TxDN VSSTX[1] TXRES[3] VSSTX[0] TXRES[2] TXRES[1] PIN ASSIGNMENT 10/100BASE-TX Transceiver ML53001 100-pin TQFP (N/C) (N/C) MDIO MDC RXD_MII[3] RXD_MII[2] VSSIO[1] RXD_MII[1] RXD_MII[0] VDDIO[1] VSSCORE[4] RX_DV_MII RX_CLK_MII RX_ER_MII VDDCORE[4] VSSIO[3] TX_ER_MII TX_CLK_MII TX_EN_MII VSSIO[2] TXD_MII[0] PACKAGE DIMENSIONS 100-pin TQFP Unit in millimeters, unless otherwise specified. TXD_MII[1] VDDIO[2] TXD_MII[2] TXD_MII[3] 97 98 99 100 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 TXRES[0] VSSTX[3] (N/C) (N/C) VSSFS[0] VDDFS[0] VSSFS[2] VDDFS[2] VSSFS[1] X2 X1 VDDFS[1] VSSFSSUB VSSCORE[3] VDDCORE[3] CHIPRST_N TEST AN_EN SPDSEL100 CRS_MII COL_MII VSSCORE[2] VDDCORE[2] FDPX BYPPCS/SER10BT Page 2 |
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