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CLC111 Ultra-High Slew Rate, Closed-Loop Buffer
June 1999
N
CLC111 Ultra-High Slew Rate, Closed-Loop Buffer
General Description
The CLC111 is a high-performance, closed-loop, monolithic buffer designed for applications requiring very high-frequency signals. The CLC111's high performance includes an extremely fast 800MHz small signal bandwidth (0.5Vpp) and an ultra high (3500V/s) slew rate while requiring only 10.5mA quiescent current. Signal fidelity is maintained with low harmonic distortion (-62dBc 2nd and 3rd harmonics at 20MHz). These performance characteristics are for a demanding 100 load. Featuring a patented closed-loop design, the CLC111 offers nearly ideal unity-gain (0.996) with very low (1.4) output impedance. The CLC111 is ideally suited for buffering video signals with its 0.15%/ 0.04 differential gain and phase performance at 4.43MHz. Power sensitive applications will benefit from the CLC111's excellent performance on reduced or single supply voltages. Constructed using an advanced, complementary bipolar process and Comlinear's proven high-performance architectures, the CLC111 is available in several versions to meet a variety of requirements. 8-pin Plastic DIP 8-pin Plastic SOIC dice dice qualified to Method 5008, MIL-STD-883, Level B Contact factory for other packages and DESC SMD number. CLC111AJP CLC111AJE CLC111ALC CLC111AMC -40C to +85C -40C to +85C -40C to +85C -55C to +125C
Features
s s s s s s s
Very wideband (800MHz) Ultra-high (3500V/s) slew rate Very low output impedance (1.4) Low (-62dBc) 2nd/3rd harmonics @ 20MHz 60mA output current (5 supplies) Single supply operation (0 to 3V supply min.) Evaluation boards and Spice models Video switch buffers Test point drivers High frequency active filters Wideband DC clamping buffer High-speed peak detector circuits
Applications
s s s s s
Pinout
DIP & SOIC
Typical Application
CLC111
Single-Supply Circuit
(c) 1999 National Semiconductor Corporation
Printed in the U.S.A.
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CLC111 Electrical Characteristics (V = 5V, R = 100 unless specified) 5V, 100 CLC109 Electrical Characteristics (Vcc = 5V, RL = 100)
cc L
PARAMETER
CONDITIONS CLC111AJ
TYP
MIN AND MAX RATINGS +25C 400 250 0.1 0.5 0.8 0.25 0.08 0.8 1.4 20 5 2700 -50 -55 4.8 3.0 0.994 0.97 2.0 9 15 -48 12 0.5 0.7 3.5 2.0 3.6 3.2 50 50
UNITS
SYMBOL
Ambient Temperature FREQUENCY RESPONSE small signal bandwidth gain flatness flatness peaking rolloff differential gain differential phase TIME DOMAIN RESPONSE rise and fall time settling time to 0.1% overshoot slew rate
+25C 800 450 0.02 0.1 0.1 0.15 0.04 0.6 1.0 16 0 3500 -62 -62 4.0 1.6 0.996 0.98 1.4 2 30 5 50 -52 10.5 0.2 1 2.5 1.25 3.9 3.5 60
-40C 400 250 0.1 1.0 0.8 0.4 0.08 0.8 1.4 20 8 2700 -47 -55 4.8 4.0 0.994 0.96 3.0 17 100 30 187 -48 12 1.0 0.3 3.5 2.0 3.5 +3.1,-2.5 3.1 50,25 50,35
+85C 300 200 0.2 0.5 1.2 0.25 0.08 1.1 1.7 20 5 2300 -50 -52 5.3 3.0 0.992 0.97 2.0 9 50 15 100 -46 12 0.5 1 3.5 2.0 3.6 3.2 40 50 MHz MHz dB dB dB % ns ns ns % V/sec dBc dBc nV/Hz pA/Hz V/V V/V mV V/C A nA/C dB mA % M pF pF V V V mA mA SSBW LSBW GFL GFPH GFRH DG DP TRS TRL TS OS1 SR HD2 HD3 VN ICN GA1 GA2 RO VIO DVIO IBN DIBN PSRR ICC ILIN RIN CIN CIN VO VOL VOL IO IO
Vout < 0.5Vpp Vout < 4.0Vpp Vout < 0.5Vpp DC-50MHz DC-200MHz DC-200MHz 4.43MHz, 150 load 4.43MHz, 150 load 0.5V step 4.0V step 2.0V step 4V step 4V step
DISTORTION AND NOISE PERFORMANCE 2nd harmonic distortion 2Vpp, 20MHz 3rd harmonic distortion 2Vpp, 20MHz equivalent output noise voltage >1MHz current >1MHz STATIC DC PERFORMANCE small signal gain no load 100 load DC
output resistance *output offset voltage average temperature coefficient * input bias current average temperature coefficient power supply rejection ratio * supply current no load
MISCELLANEOUS PERFORMANCE integral endpoint linearity 2V, full scale input resistance input capacitance CERDIP Plastic DIP output voltage range no load RL=100 RL=100, 0C output current 0 - 70C
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
Absolute Maximum Ratings
Vcc Iout output is short circuit protected to ground, but maximum reliability will be maintained if Iout does not exceed... input voltage maximum junction temperature operating temperature range AJ storage temperature range lead temperature (soldering 10 sec) ESD rating 7.0V Notes: *
Miscellaneous Ratings
AJ : 100% tested at +25C.
80mA Vcc +150C -40C to +85C -65C to +150C +300C 1000V
Package Thermal Resistance
Package
Plastic(AJP) Surface Mount (AJE)
JC
70C/W 65C/W
JA
125C/W 145C/W
Reliability Information
Transistor count 17
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Electrical Characteristics
PARAMETERS
(VCC = +3V or VCC = +5V, -VEE = 0V, TA = +25C, RL = 100, unless noted)
VCC = 3V VCC = 5V UNITS
CONDITIONS
FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vout < 0.5Vpp Vout < 2.0Vpp gain flatness Vout < 0.5Vpp flatness DC to 30MHz peaking DC to 200MHz rolloff DC to 60MHz TIME DOMAIN RESPONSE rise and fall time 0.5V step 2.0V step overshoot 1.0V step slew rate 0.5V step DISTORTION AND NOISE RESPONSE 0.5Vpp,20MHz 2nd harmonic distortion 1.0Vpp,20MHz 0.5Vpp,20MHz 3rd harmonic distortion 1.0Vpp,20MHz STATIC DC PERFORMANCE small-signal gain supply current AC-coupled RL=
120 0.5 0 1.5 3.9 3 260 -46
300 210 0.1 0 0.25 1.2 1.5 3 425
MHz MHz dB dB dB ns ns % V/s dBc dBc dBc dBc V/V mA Vpp Vpp
ferrite bead (optional) +5V C3 6.8F Vin Rin 5 + L1 1 4 CLC111 2 3 0.01F C1 8 67 Vout Rout
-55 -44 -64 0.96 2.0 1.5 1.1 0.97 4.5 3.4 2.6
MISCELLANEOUS PERFORMANCE output voltage range RL= RL=100
Operation The CLC111 is a low-power, very high-speed unity-gain buffer. It uses a closed-loop topology which allows for accuracy not usually found in high-speed open-loop buffers. A slew enhanced front end allows for low quiescent power while not sacrificing ac performance. Single Supply Operation Although the CLC111 is specified to operate from split 5V power supplies, there is no internal ground reference that prevents operation from a single voltage power supply. For single supply operation the input signal should be biased at a DC value of 1/2VCC. This can be accomplished by AC coupling and rebiasing as shown in Figure 1. The above electrical specifications provide typical performance specifications for the CLC111 at 25C while operating from a single +3V or a single +5V power supply. Printed Circuit Layout and Supply Bypassing As with any high-frequency device, a good PCB layout is required for optimum performance. This is especially important for a device as fast as the CLC111. To minimize capacitive feedthrough, pins 2, 3, 6, and 7 should be connected to the ground plane, as shown in Figure 1. Input and output traces should be laid out as transmission lines with the appropriate termination resistors very near the CLC111. On a 0.065 inch epoxy PCB material, a 50 transmission line (commonly called stripline) can be constructed by using a trace width of 0.1" over a complete ground plane. Figure 1 shows recommended power supply bypassing. The ferrite beads are optional and are recommended only where additional isolation is needed from high-frequency (>400MHz) resonances in the power supply.
Rin is chosen for desired input impedance.
L2 -5V C4 6.8F + ferrite bead (optional)
C2 0.01F
Rout is chosen for desired output impedance. (CLC111 Ro = 1.4 )
Figure 1: Recommended circuit & evaluation board schematic
Parasitic or load capacitance directly on the output of the CLC111 will introduce additional phase shift in the device. This phase shift can decrease phase margin and increase frequency response peaking. A small series resistor before the capacitance effectively decouples this effect. The graphs on the following page illustrate the required resistor value and the resulting performance vs. capacitance. Precision buffed resistors (PRP8351 series from Precision Resistive Products), which have low parasitic reactances, were used to develop the data sheet specifications. Precision carbon composition resistors or standard spirally-trimmed RN55D metal film resistors will work, though they will cause a slight degradation of ac performance due to their reactive nature at high frequencies. Evaluation Boards Evaluation boards are available from National as part numbers CLC730012 (DIP) and CLC730045 (SOIC). This board was used in the characterization of the device and provides optimal performance. Designers are encouraged to copy these printed circuit board layouts for their applications. 3
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See "Typical Application" section on front page.
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CLC111 Ultra-High Slew Rate, Closed-Loop Buffer
Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018.
Life Support Policy National's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of National Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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Tel: 81-043-299-2309 Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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