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CLC452 Single Supply, Low-Power, High Output, Current Feedback Amp
April 1998
N
CLC452 Single Supply, Low-Power, High Output, Current Feedback Amplifier
General Description
The CLC452 has a new output stage that delivers high output drive current (100mA), but consumes minimal quiescent supply current (3.0mA) from a single 5V supply. Its current feedback architecture, fabricated in an advanced complementary bipolar process, maintains consistent performance over a wide range of gains and signal levels, and has a linear-phase response up to one half of the -3dB frequency. The CLC452 offers superior dynamic performance with a 130MHz small-signal bandwidth, 400V/s slew rate and 4.5ns rise/fall times (2Vstep). The combination of low quiescent power, high output current drive, and high-speed performance make the CLC452 well suited for many battery-powered personal communication/computing systems. The ability to drive low-impedance, highly capacitive loads, makes the CLC452 ideal for single ended cable applications. It also drives low impedance loads with minimum distortion. The CLC452 will drive a 100 load with only -75/-74dBc second/third harmonic distortion (Av = +2, Vout = 2Vpp, f = 1MHz). With a 25 load, and the same conditions, it produces only -65/-77dBc second/third harmonic distortion. It is also optimized for driving high currents into single-ended transformers and coils. When driving the input of high-resolution A/D converters, the CLC452 provides excellent -78/-85dBc second/third harmonic distortion (Av = +2, Vout = 2Vpp, f = 1MHz, RL = 1k) and fast settling time. Available in SOT23-5, the CLC452 is ideal for applications where space is critical.
+5V 6.8F
+
Features
s s s s s s s s s
100mA output current 3.0mA supply current 130MHz bandwidth (Av = +2) -78/-85dBc HD2/HD3 (1MHz) 25ns settling to 0.05% 400V/s slew rate Stable for capacitive loads up to 1000pF Single 5V to 5V supplies Available in Tiny SOT23-5 package Coaxial cable driver Twisted pair driver Transformer/Coil Driver High capacitive load driver Video line driver Portable/battery-powered applications A/D driver
Maximum Output Voltage vs. RL
10 9
Applications
s s s s s s s
Output Voltage (Vpp)
8 7 6 5 4 3 2 1 10 100 1000
Vs = +5V VCC = 5V
RL ()
Response After 10m of Cable
Vin = 10MHz, 0.5Vpp
Typical Application
Single Supply Cable Driver
10m of 75 Coaxial Cable
100mV/div
Vin
0.1F 5k
5k
3
+ -
7
0.1F
6
75 0.1F
CLC452
2 4
Vo 75
1k
1k 0.1F
Vo VCC
20ns/div
Pinout
SOT23-5
VEE Vinv
Pinout
DIP & SOIC
Vnon-inv
(c) 1998 National Semiconductor Corporation
Printed in the U.S.A.
VEE
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+5V Electrical Characteristics (A
PARAMETERS Ambient Temperature
v
= +2, Rf = 1k, RL = 100, Vs = +5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
CONDITIONS CLC452AJ
TYP +25C 130 95 30 0 0.1 0.1 4.5 25 11 400 -75 -78 -65 -74 -85 -60 2.8 7.5 10.5 1 8 6 40 6 25 48 51 3.0 0.39 1.5 4.2 0.8 4.0 1.0 4.1 0.9 100 70
MIN/MAX RATINGS +25C 0 to 70C -40 to 85C 95 80 25 0.5 0.3 0.2 6.0 - 15 300 -69 -70 -58 -70 -75 -55 3.5 10 14 4 - 18 - 14 - 45 48 3.4 0.28 2.3 4.1 0.9 3.9 1.1 4.0 1.0 80 105 90 77 20 0.9 0.3 0.3 6.4 - 18 275 -67 -68 -56 -68 -73 -53 3.8 11 15 6 - 22 - 16 - 43 46 3.6 0.25 2.3 4.0 1.0 3.8 1.2 4.0 1.0 65 105 85 75 20 1.0 0.3 0.3 6.8 - 18 260 -67 -68 -56 -68 -73 -53 3.8 11 15 6 - 24 - 17 - 43 46 3.6 0.25 2.3 4.0 1.0 3.8 1.2 3.9 1.1 40 140
UNITS
NOTES
FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo = 0.5Vpp Vo = 2.0Vpp -0.1dB bandwidth Vo = 0.5Vpp gain peaking <200MHz, Vo = 0.5Vpp gain rolloff <30MHz, Vo = 0.5Vpp linear phase deviation <30MHz, Vo = 0.5Vpp TIME DOMAIN RESPONSE rise and fall time settling time to 0.05% overshoot slew rate 2V step 1V step 2V step 2V step
MHz MHz MHz dB dB deg ns ns % V/s dBc dBc dBc dBc dBc dBc nV/Hz pA/Hz pA/Hz mV V/C A nA/C A nA/C dB dB mA M pF V V V V V V mA m A A A
DISTORTION AND NOISE RESPONSE 2Vpp, 1MHz 2nd harmonic distortion 2Vpp, 1MHz; RL = 1k 2Vpp, 5MHz 3rd harmonic distortion 2Vpp, 1MHz 2Vpp, 1MHz; RL = 1k 2Vpp, 5MHz equivalent input noise voltage (eni) >1MHz non-inverting current (ibn) >1MHz inverting current (ibi) >1MHz STATIC DC PERFORMANCE input offset voltage average drift input bias current (non-inverting) average drift input bias current (inverting) average drift power supply rejection ratio common-mode rejection ratio supply current
DC DC RL=
A
MISCELLANEOUS PERFORMANCE input resistance (non-inverting) input capacitance (non-inverting) input voltage range, High input voltage range, Low output voltage range, High RL = 100 output voltage range, Low RL = 100 output voltage range, High RL = output voltage range, Low RL = output current output resistance, closed loop DC
B
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters.
Notes
A) J-level: spec is 100% tested at +25C. B) The short circuit current can exceed the maximum safe output current. 1) Vs = VCC - VEE
Absolute Maximum Ratings
supply voltage (VCC - VEE) output current (see note C) common-mode input voltage maximum junction temperature storage temperature range lead temperature (soldering 10 sec) ESD rating (human body model) +14V 140mA VEE to VCC +175C -65C to +150C +300C 500V
Reliability Information
Transistor Count MTBF (based on limited test data) 49 31Mhr
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2
5V Electrical Characteristics (A
PARAMETERS Ambient Temperature
v
= +2, Rf = 1k, RL = 100, VCC = 5V, unless specified)
CONDITIONS CLC452AJ
TYP +25C 160 75 30 0 0.1 0.1 0.05 0.08 3.2 20 8 540 -77 -78 -69 -72 -90 -58 2.8 7.5 10.5 1 10 3 40 13 30 48 53 3.2 0.52 1.2 4.2 3.8 4.0 130 60
GUARANTEED MIN/MAX +25C 0 to 70C -40 to 85C 135 60 25 0.5 0.2 0.2 - - 4.2 - 12 400 -71 -72 -63 -68 -80 -54 3.5 10 14 6 - 18 - 24 - 45 50 3.8 0.35 1.8 4.1 3.6 3.8 100 90 120 57 25 0.9 0.3 0.3 - - 4.5 - 15 370 -69 -70 -61 -66 -78 -52 3.8 11 15 8 - 23 - 31 - 43 48 4.0 0.30 1.8 4.1 3.6 3.8 80 90 115 55 20 1.0 0.3 0.3 - - 5.0 - 15 350 -69 -70 -61 -66 -78 -52 3.8 11 15 8 - 25 - 31 - 43 48 4.0 0.30 1.8 4.0 3.5 3.7 50 120
UNITS
NOTES
FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo = 1.0Vpp Vo = 4.0Vpp -0.1dB bandwidth Vo = 1.0Vpp gain peaking <200MHz, Vo = 1.0Vpp gain rolloff <30MHz, Vo = 1.0Vpp linear phase deviation <30MHz, Vo = 1.0Vpp differential gain NTSC, RL=150 differential phase NTSC, RL=150 TIME DOMAIN RESPONSE rise and fall time settling time to 0.05% overshoot slew rate 2V step 2V step 2V step 2V step
MHz MHz MHz dB dB deg % deg ns ns % V/s dBc dBc dBc dBc dBc dBc nV/Hz pA/Hz pA/Hz mV V/C A nA/C A nA/C dB dB mA M pF V V V mA m
DISTORTION AND NOISE RESPONSE 2Vpp, 1MHz 2nd harmonic distortion 2Vpp, 1MHz; RL = 1k 2Vpp, 5MHz 3rd harmonic distortion 2Vpp, 1MHz 2Vpp, 1MHz; RL = 1k 2Vpp, 5MHz equivalent input noise voltage (eni) >1MHz non-inverting current (ibn) >1MHz inverting current (ibi) >1MHz STATIC DC PERFORMANCE input offset voltage average drift input bias current (non-inverting) average drift input bias current (inverting) average drift power supply rejection ratio common-mode rejection ratio supply current
DC DC RL=
MISCELLANEOUS PERFORMANCE input resistance (non-inverting) input capacitance (non-inverting) common-mode input range output voltage range RL = 100 output voltage range RL = output current output resistance, closed loop DC
B
Notes
B) The short circuit current can exceed the maximum safe output current.
Model CLC452AJP CLC452AJE CLC452AJM5 CLC452ALC CLC452A8B CLC452ALC
Ordering Information
Temperature Range -40C -40C -40C -40C -55C to to to to to +85C +85C +85C +85C +175C Description 8-pin PDIP 8-pin SOIC 5-pin SOT dice 8-pin CerDIP, MIL-STD-883 dice, MIL-STD-883
Package Thermal Resistance
Package Plastic (AJP) Surface Mount (AJE) Surface Mount (AJM5) Dice (ALC) CerDIP (A8B) JC 105C/W 95C/W 140C/W 25C/W 70C/W JA 155C/W 175C/W 210C/W - 215C/W
-55C to +175C
3
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+5V Typical Performance (A
Non-Inverting Frequency Response Normalized Magnitude (1dB/div)
Vo = 0.5Vpp Gain Av = 2 Rf = 750 Av = 1 Rf = 1k
v
= +2, Rf = 1k, RL = 100, Vs = +5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
Inverting Frequency Response Normalized Magnitude (1dB/div) Phase (deg) Phase (deg)
Vo = 0.5Vpp Gain Av = -2 Rf = 604 Av = -1 Rf = 681
Frequency Response vs. RL Phase (deg)
Vo = 0.5Vpp
Magnitude (1dB/div)
RL = 1k Gain
RL = 100
Phase Av = 5 Rf = 402 Av = 10 Rf = 249
0 -90 -180 -270 -360 -450 100M
Phase
-180 -225 -270 -315 -360 -405 100M
Phase RL = 25
0 -90 -180 -270 -360 -450
Av = -5 Rf = 453 Av = -10 Rf = 402
1M
10M
1M
10M
1M
10M
100M
Frequency (Hz) Frequency Response vs. Vo
Frequency (Hz) Frequency Response vs. CL
120
Gain Vo = 0.5Vpp
Frequency (Hz) Open Loop Transimpedance Gain, Z(s)
220 180
Phase
Magnitude (1dB/div)
Magnitude (1dB/div)
Vo = 1Vpp
Magnitude (dB)
CL = 10pF Rs = 46.4 CL = 100pF Rs = 20 CL = 1000pF Rs = 6.7
+ -
100 80 60 40 20
Phase (deg)
140 100 60 20 100M
Vo = 2.5Vpp
Rs 1k CL 1k
Vo = 0.1Vpp
1k
1M
10M
100M
1M
10M
100M
10k
100k
1M
10M
Frequency (Hz) Gain Flatness
3.2
Frequency (Hz) Equivalent Input Noise
12.5 -40
Vo = 2Vpp
Frequency (Hz) 2nd & 3rd Harmonic Distortion
Noise Voltage (nV/Hz)
Noise Current (pA/Hz)
Magnitude (0.05dB/div)
Inverting Current 10.5pA/Hz
Distortion (dBc)
3.1
Non-Inverting Current 7.5pA/Hz
10
-50 -60 -70 -80 -90 1M
2nd RL = 100
3rd RL = 100 2nd RL = 1k
3
7.5
2.9
Voltage 2.85nV/Hz
5
3rd RL = 1k
2.8 10 20 30 1k 100k 1M 10M
2.5
10M
Frequency (MHz) 2nd Harmonic Distortion, RL = 25
-44 -46
10MHz
Frequency (Hz) 3rd Harmonic Distortion, RL = 25
-35 -40
10MHz
Frequency (Hz) 2nd Harmonic Distortion, RL = 100
-60
10MHz
Distortion (dBc)
Distortion (dBc)
Distortion (dBc)
-48 -50 -52 -54
2MHz 5MHz
-45 -50 -55 -60
1MHz 5MHz
-65
5MHz
2MHz
-70
2MHz
-56 -58 -60 0 0.5 1 1.5 2 2.5
1MHz
-65 -70 -75 0 0.5 1 1.5 2 2.5
-75
1MHz
-80 0 0.5 1 1.5 2 2.5
Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 100
-45 -50
10MHz
Output Amplitude (Vpp) 2nd Harmonic Distortion, RL = 1k
-60 -65 -60 -65
Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 1k
Distortion (dBc)
Distortion (dBc)
Distortion (dBc)
-55
5MHz
-70
10MHz
-60 -65 -70 -75 -80 0 0.5 1 1.5 2 2.5
2MHz 1MHz
-70
10MHz
-75 -80 -85
2MHz 5MHz
-75 -80 -85 0
5MHz 2MHz
-90
1MHz
-95 1 1.5 2 2.5 0 0.5 1
1MHz
0.5
1.5
2
2.5
Output Amplitude (Vpp)
Output Amplitude (Vpp)
Output Amplitude (Vpp)
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+5V Typical Performance (A
Closed Loop Output Resistance
100
v
= +2, Rf = 1k, RL = 100, Vs = + 5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
Recommended Rs vs. CL
70
+
Large & Small Signal Pulse Response Output Voltage (0.5V/div)
Rs
Output Resistance ()
60
-
Large Signal
1k
CL
1k
10
50
1k
Small Signal
Rs ()
40 30 20 10
1
0.1
0.01 10k 100k 1M 10M 100M
0 10 100 1000
Time (10ns/div)
Frequency (Hz) PSRR & CMRR
60 50 40 30 20 10 0 1k 10k 100k 1M 10M 100M -0.6
PSRR CMRR
CL (pF) IBN, Vos vs. Temperature
6 5 4 3 2 1 -100 -50 0 50 100 150 4.8 4.4
IBN Vos
Maximum Output Voltage vs. RL
Offset Voltage Vos (mV)
PSRR & CMRR (dB)
Output Voltage (Vpp)
-0.7 -0.8 -0.9 -1 -1.1
4 3.6 3.2 2.8 2.4 2 1.6 10 100 1000
IBN (A)
Frequency (Hz)
Temperature (C)
RL ()
5V Typical Performance (A
Non-Inverting Frequency Response Normalized Magnitude (1dB/div)
Vo = 1Vpp Gain Av = +1 Rf = 1k Av = +2 Rf = 750
v
= +2, Rf = 1k, RL = 100, VCC = 5V, unless specified)
Inverting Frequency Response Normalized Magnitude (1dB/div) Phase (deg) Phase (deg)
Vo = 1Vpp Gain Av = -1 Rf = 681 Av = -2 Rf = 604
Frequency Response vs. RL Phase (deg)
Vo = 1Vpp
Magnitude (1dB/div)
RL = 1k Gain
RL = 100
Phase
0 -45 -90 -135 -180 -225 100M
Phase
-180 -225 -270 -315 -360 -425 100M
Phase RL = 25
0 -90 -180 -270 -360 -450
Av = +5 Rf = 402 Av = +10 Rf = 249
Av = -5 Rf = 453 Av = -10 Rf = 402
1M
10M
1M
10M
1M
10M
100M
Frequency (Hz) Frequency Response vs. Vo
Vo = 0.1Vpp
Frequency (Hz) Frequency Response vs. CL
Vo = 1Vpp
Frequency (Hz) Gain Flatness
Vo = 1Vpp
CL = 10pF Rs = 68.1 CL = 100pF Rs = 17.4 CL = 1000pF Rs = 6.7
+ -
Vo = 5Vpp Vo = 2Vpp
Rs 1k CL 1k
1k
1M
10M
100M
1M
10M
100M
Magnitude (0.05dB/div)
Magnitude (1dB/div)
Magnitude (1dB/div)
0
5
10
15
20
25
30
Frequency (Hz)
Frequency (Hz)
Frequency (MHz)
5
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5V Typical Performance (A
Small Signal Pulse Response Output Voltage (200mV/div)
Av = +2
v
= +2, Rf = 1k, RL = 100, VCC = 5V, unless specified)
Large Signal Pulse Response
-40
Vo = 2Vpp
2nd & 3rd Harmonic Distortion
Output Voltage (1V/div)
Av = +2
-50
Distortion (dBc)
-60 -70 -80 -90
2nd RL = 100
3rd RL = 100 2nd RL = 1k
Av = -2
Av = -2
3rd RL = 1k
Time (10ns/div)
Time (10ns/div)
1M
10M
Frequency (Hz) 2nd Harmonic Distortion, RL = 25
-40 -45 -30 -40
10MHz
3rd Harmonic Distortion, RL = 25
-55
2nd Harmonic Distortion, RL = 100
10MHz
-60
Distortion (dBc)
Distortion (dBc)
-50
5MHz
Distortion (dBc)
10MHz
5MHz
-50 -55 -60 -65 0 1 2 3 4
5MHz
-65 -70
2MHz
-60 -70 -80 -90
1MHz 2MHz
2MHz 1MHz
1MHz
-75 -80
5
0
1
2
3
4
5
0
1
2
3
4
5
Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 100
-50 -55 -60 -65
Output Amplitude (Vpp) 2nd Harmonic Distortion, RL = 1k
-60 -65
Output Amplitude (Vpp) 3rd Harmonic Distortion, RL = 1k
10MHz
Distortion (dBc)
Distortion (dBc)
Distortion (dBc)
10MHz
-60
5MHz
-70 -75
2MHz
5MHz
-70
5MHz
-65 -70 -75 -80 0 1 2 3 4 5
2MHz 1MHz
2MHz
-75
10MHz
-80 -85 -90
1MHz
-80 -85 0
1MHz
-95 1 2 3 4 5 0 1 2 3 4 5
Output Amplitude (Vpp) Recommended Rs vs. CL
70
+
Output Amplitude (Vpp) Maximum Output Voltage vs. RL
10 -0.01
Output Amplitude (Vpp) Differential Gain & Phase
-0.2
f = 3.58MHz Gain Positive Sync
Rs 1k
60
Output Voltage (Vpp)
-
CL
RL
50
8
-0.015
Gain Negative Sync
-0.3
1k
Phase (deg)
Gain (%)
Rs ()
40 30 20 10 0 10 100 1000
-0.02 -0.025
Phase Positive Sync
-0.4 -0.5 -0.6
Phase Negative Sync
6
4
-0.03 -0.035 10 100 1000 1 2 3 4
2
-0.7
CL (pF) IBN, Vos vs. Temperature
1.5 12 0.2
Vo = 2Vstep
RL () Short Term Settling Time
0.2 0.15
Number of 150 Loads Long Term Settling Time
Vo = 2Vstep
Offset Voltage Vos (mV)
Vo (% Output Step)
Vo (% Output Step)
1 10 100 1000
1
8
0.1
0.1 0.05 0 -0.05 -0.1 -0.15
IBN (A)
0.5
IBN Vos
4
0
0
0
-0.1
-0.5 -100 -50 0 50 100 150
-4
-0.2
-0.2 1 10 100 1m 10m 100m 1
Temperature (C)
Time (ns)
Time (s)
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CLC452 Operation
The CLC452 is a current feedback amplifier built in an advanced complementary bipolar process. The CLC452 operates from a single 5V supply or dual 5V supplies. Operating from a single supply, the CLC452 has the following features:
s s s
Vo = Vin where:
s s s
Av Rf 1+ Z(j )
Equation 1
Provides 100mA of output current while consuming 15mW of power Offers low -78/-85dB 2nd and 3rd harmonic distortion Provides BW > 80MHz and 1MHz distortion < -70dBc at Vo = 2.0Vpp
Av is the closed loop DC voltage gain Rf is the feedback resistor Z(j) is the CLC452's open loop transimpedance gain Z( j ) is the loop gain Rf
s
The CLC452 performance is further enhanced in 5V supply applications as indicated in the 5V Electrical Characteristics table and 5V Typical Performance plots. Current Feedback Amplifiers Some of the key features of current feedback technology are: s Independence of AC bandwidth and voltage gain s Inherently stable at unity gain s Adjustable frequency response with feedback resistor s High slew rate s Fast settling Current feedback operation can be described using a simple equation. The voltage gain for a non-inverting or inverting current feedback amplifier is approximated by Equation 1.
The denominator of Equation 1 is approximately equal to 1 at low frequencies. Near the -3dB corner frequency, the interaction between Rf and Z(j) dominates the circuit performance. The value of the feedback resistor has a large affect on the circuits performance. Increasing Rf has the following affects:
s s s s s
Decreases loop gain Decreases bandwidth Reduces gain peaking Lowers pulse response overshoot Affects frequency response phase linearity
Refer to the Feedback Resistor Selection section for more details on selecting a feedback resistor value.
CLC452 Design Information
Single Supply Operation (VCC = +5V, VEE = GND) The specifications given in the +5V Electrical Characteristics table for single supply operation are measured with a common mode voltage (Vcm) of 2.5V. Vcm is the voltage around which the inputs are applied and the output voltages are specified. Operating from a single +5V supply, the Common Mode Input Range (CMIR) of the CLC452 is typically +0.8V to +4.2V. The typical output range with RL=100 is +1.0V to +4.0V.
VCC
Note: Rt, RL and Rg are tied to Vcm for minimum power consumption and maximum output swing.
For single supply DC coupled operation, keep input signal levels above 0.8V DC. For input signals that drop below 0.8V DC, AC coupling and level shifting the signal are recommended. The non-inverting and inverting configurations for both input conditions are illustrated in the following 2 sections. DC Coupled Single Supply Operation Figures 1 and 2 show the recommended non-inverting and inverting configurations for input signals that remain above 0.8V DC.
Note: Rb, provides DC bias for non-inverting input. Rb, RL and Rt are tied to Vcm for minimum power consumption and maximum output swing.
VCC 6.8F
+
6.8F
+
Vin Rt Vcm
3 2
+ -
7
0.1F
6
3
CLC452
4
Vo Rb
2
+ -
7
0.1F
6
CLC452
4
Vo RL Vcm
Rf
RL Vin Vcm
Vcm Rt Vcm
Rg
Rf
Rg Vcm
R Vo = A v = 1+ f Vin Rg
R Vo = Av = - f Vin Rg
Select Rt to yield desired Rin = Rt || Rg
Figure 1: Non-Inverting Configuration 7
Figure 2: Inverting Configuration
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AC Coupled Single Supply Operation Figures 3 and 4 show possible non-inverting and inverting configurations for input signals that go below 0.8V DC. The input is AC coupled to prevent the need for level shifting the input signal at the source. The resistive voltage divider biases the non-inverting input to VCC / 2 = 2.5V (For VCC = +5V).
VCC 6.8F
+
VCC 6.8F
+
Rb
3
+ -
7
0.1F
6
CLC452 2
Vo
Note: Rb provides DC bias for the non-inverting input. Select Rt to yield desired Rin = Rt || Rg.
Vin
Rg
4
Rf 0.1F
+
Rt
Vin
Cc VCC 2
R
3
+ -
7
0.1F
6
R
2
CLC452
4
Vo
R Vo = Av = - f Vin Rg
6.8F VEE
Rf
Figure 6: Dual Supply Inverting Configuration Feedback Resistor Selection The feedback resistor, Rf, affects the loop gain and frequency response of a current feedback amplifier. Optimum performance of the CLC452, at a gain of +2V/V, is achieved with Rf equal to 1k. The frequency response plots in the Typical Performance sections illustrate the recommended Rf for several gains. These recommended values of Rf provide the maximum bandwidth with minimal peaking. Within limits, Rf can be adjusted to optimize the frequency response.
s
R Vo = Vin 1 + f + 2.5 Rg low frequency cutoff =
Rg C
1 R , where: Rin = 2RinC c 2 R >> R source
Figure 3: AC Coupled Non-Inverting Configuration
VCC 6.8F
+
VCC 2 Vin Cc Rg
R
3 2
+ -
7
0.1F
6
CLC452
4
Vo
s
Decrease Rf to peak frequency response and extend bandwidth Increase Rf to roll off frequency response and compress bandwidth
Rf
R
R Vo = Vin - f + 2.5 Rg low frequency cutoff = 1 2R gC c
As a rule of thumb, if the recommended Rf is doubled, then the bandwidth will be cut in half. Unity Gain Operation The recommended Rf for unity gain (+1V/V) operation is 1k. Rg is left open. Parasitic capacitance at the inverting node may require a slight increase in Rf to maintain a flat frequency response. Bandwidth vs. Output Amplitude The bandwidth of the CLC452 is at a maximum for output voltages near 1Vpp. The bandwidth decreases for smaller and larger output amplitudes. Refer to the Frequency Response vs. Vo plots. Load Termination The CLC452 can source and sink near equal amounts of current. For optimum performance, the load should be tied to Vcm.
Figure 4: AC Coupled Inverting Configuration Dual Supply Operation The CLC452 operates on dual supplies as well as single supplies. The non-inverting and inverting configurations are shown in Figures 5 and 6.
VCC 6.8F
+
Vin Rt
3
+ -
7
0.1F
6
CLC452 2 4
Vo
Rf 0.1F
+
Rg
R Vo = A v = 1+ f Vin Rg
6.8F VEE
Figure 5: Dual Supply Non-Inverting Configuration
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Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the CLC452 will improve stability and settling performance. The Frequency Response vs. CL and Recommended Rs vs. CL plots, in the typical performance section, give the recommended series resistance value for optimum flatness at various capacitive loads. 8
Power (W)
Transmission Line Matching One method for matching the characteristic impedance (Zo) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. Figure 7 shows typical inverting and non-inverting circuit configurations for matching transmission lines.
R1 V1 + R4 V2 + Z0 Z0 R3 R2 Rg R5 C6
+
1.0
AJP
0.8 0.6 0.4 0.2 0 -40 -20 0
AJE SOT
Z0 R6
CLC452
-
Vo R7
Rf
20 40 60 80 100 120 140 160 180
Ambient Temperature (C)
Figure 8: Power Derating Curves Figure 7: Transmission Line Matching Non-inverting gain applications:
s s s
Connect Rg directly to ground. Make R1, R2, R6, and R7 equal to Zo. Use R3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics.
Layout Considerations A proper printed circuit layout is essential for achieving high frequency performance. Comlinear provides evaluation boards for the CLC452 (730013-DIP, 730027SOIC, 730068-SOT) and suggests their use as a guide for high frequency layout and as an aid for device testing and characterization. General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout:
s s s s
Inverting gain applications:
s s s
Connect R3 directly to ground. Make the resistors R4, R6, and R7 equal to Zo. Make R5 II Rg = Zo.
The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier's output impedance with frequency. Power Dissipation Follow these steps to determine the power consumption of the CLC452: 1. Calculate the quiescent (no-load) power: Pamp = ICC (VCC - VEE) 2. Calculate the RMS power at the output stage: Po = (VCC - Vload) (Iload), where Vload and Iload are the RMS voltage and current across the external load. 3. Calculate the total RMS power: Pt = Pamp + Po The maximum power that the DIP, SOIC, and SOT packages can dissipate at a given temperature is illustrated in Figure 8. The power derating curve for any CLC452 package can be derived by utilizing the following equation: (175 - Tamb ) JA where Tamb = Ambient temperature (C) JA = Thermal resistance, from junction to ambient, for a given package (C/W) 9
s s
Include 6.8F tantalum and 0.1F ceramic capacitors on both supplies. Place the 6.8F capacitors within 0.75 inches of the power pins. Place the 0.1F capacitors less than 0.1 inches from the power pins. Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. Minimize all trace lengths to reduce series inductances. Use flush-mount printed circuit board pins for prototyping, never use high profile DIP sockets.
Evaluation Board Information Data sheets are available for the CLC730013/ CLC730027 and CLC730068 evaluation boards. The evaluation board data sheets provide:
s s s
Evaluation board schematics Evaluation board layouts General information about the boards
The CLC730013/CLC730027 data sheet also contains tables of recommended components to evaluate several of Comlinear's high speed amplifiers. This table for the CLC452 is illustrated below. Refer to the evaluation board data sheet for schematics and further information. Components Needed to Evaluate the CLC452 on the Evaluation Board:
s s
Rf, Rg - Use this product data sheet to select values Rin, Rout - Typically 50 (Refer to the Basic Operation section of the evaluation board data sheet for details)
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s
s s
Rt - Optional resistor for inverting gain configurations (Select Rt to yield desired input impedance = Rg || Rt) C1, C2 - 0.1F ceramic capacitors C3, C4 - 6.8F tantalum capacitors C5, C6, C7, C8 R1 thru R8
Gain = K = 1 +
Rf Rg 1 R1R 2C1C2
Corner frequency = c = Q= 1 R 2C 2 + R1C1
Components not used:
s s
The evaluation boards are designed to accommodate dual supplies. The boards can be modified to provide single supply operation. For best performance; 1) do not connect the unused supply, 2) ground the unused supply pin. SPICE Models SPICE models provide a means to evaluate amplifier designs. Free SPICE models are available for Comlinear's monolithic amplifiers that:
s s s
R1C2 R1C1 + (1- K) R 2C1 R 2C 2
For R1 = R 2 = R and C1 = C2 = C c = Q= 1 RC
1 (3 - K) Figure 10: Design Equations
Support Berkeley SPICE 2G and its many derivatives Reproduce typical DC, AC, Transient, and Noise performance Support room temperature simulations
This example illustrates a lowpass filter with Q = 0.707 and corner frequency fc = 10MHz. A Q of 0.707 was chosen to achieve a maximally flat, Butterworth response. Figure 11 indicates the filter response.
3 0 -3 -6 -9 -12 -15 -18 -21 -24 -27 -30 1M 10M 100M
Application Circuits
Single Supply Cable Driver The typical application shown on the front page shows the CLC452 driving 10m of 75 coaxial cable. The CLC452 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at Vo. Single Supply Lowpass Filter Figures 9 and 10 illustrate a lowpass filter and design equations. The circuit operates from a single supply of +5V. The voltage divider biases the non-inverting input to 2.5V. And the input is AC coupled to prevent the need for level shifting the input signal at the source. Use the design equations to determine R1, R2, C1, and C2 based on the desired Q and corner frequency.
+5V 0.1F 5k Vin 0.1F R1 5k R2 C2 100pF
3 2
Magnitude (dB)
The readme file that accompanies the diskette lists released models, and provides a list of modeled parameters. The application note OA-18, Simulation SPICE Models for Comlinear's Op Amps, contains schematics and a reproduction of the readme file.
Frequency (Hz)
Figure 11: Lowpass Response Twisted Pair Driver The high output current and low distortion, of the CLC452, make it well suited for driving transformers. Figure 12 illustrates a typical twisted pair driver utilizing the CLC452 and a transformer. The transformer provides the signal and its inversion for the twisted pair.
Vin Rt V= Rm 1:n n A v Vin 4 Zo RL UTP Req R A v = 1+ f Rg V= -n A v Vin 4
3 2
+
CLC452
V = Av Vin
6
IL
Rf
+ -
7
C1
6
+ Vo -
158 158
0.1F
CLC452
4
Vo 100
Rg
Vo =
Rf 1k
1n A v Vin 2
Figure 12: Twisted Pair Driver To match the line's characteristic impedance (Zo) set:
s s
1.698k Rg 0.1F
Figure 9: Lowpass Filter Topology
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RL = Zo Rm = Req
10
Where Req is the transformed value of the load impedance, (RL), and is approximated by: Req = RL n2
The load current (IL) and voltage (Vo) are related to the CLC452's maximum output voltage and current by: Vo n Vmax IL I max n
Select the transformer so that it loads the line with a value close to Zo, over the desired frequency range. The output impedance, Ro, of the CLC452 varies with frequency and can also affect the return loss. The return loss, shown below, takes into account an ideal transformer and the value of Ro. Return Loss(dB) - 20log10 n2 Ro Zo
From the above current relationship, it is obvious that an amplifier with high output drive capability is required.
11
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CLC452, Single Supply, Low-Power, High Output, Current Feedback Amp
Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018.
Life Support Policy National's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of National Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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