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INTEGRATED CIRCUITS
DATA SHEET
PCF8570 256 x 8-bit static low-voltage RAM with I2C-bus interface
Preliminary specification File under Integrated Circuits, IC12 August 1994
Philips Semiconductors
Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
FEATURES * Operating supply voltage 2.5 to 6.0 V * Low data retention voltage; minimum 1.0 V * Low standby current; maximum 15 A * Power saving mode; typical 50 nA * Serial input/output bus (I2C-bus) * Address by 3 hardware address pins * Automatic word address incrementing * Available in DIP8 and SO8L packages. APPLICATIONS * Telephony: - RAM expansion for stored numbers in repertory dialling (e.g. PCD33XX applications) * General purpose RAM for applications requiring extremely low current and low-voltage RAM retention (i.e. battery or capacitor backed) * Radio, television and video cassette recorder: - channel presets * General purpose: - RAM expansion for the microcontroller families PCD33XX, PCF84CXX, P80CLXXX and most other microcontrollers. QUICK REFERENCE DATA SYMBOL VDD IDD IDDR Tamb Tstg supply voltage supply current (standby) supply current (power-saving mode) operating ambient temperature storage temperature fSCL = 0 Hz Tamb = 25 C PARAMETER CONDITIONS MIN. 2.5 - - -40 -65 GENERAL DESCRIPTION
PCF8570
The PCF8570 is a low power static CMOS RAM. The PCF8570 is organized as 256 words by 8-bits. Addresses and data are transferred serially via a two-line bidirectional bus (I2C-bus). The built-in word address register is incremented automatically after each written or read data byte. Three address pins, A0, A1 and A2 are used to define the hardware address, allowing the use of up to 8 devices connected to the bus without additional hardware.
MAX. 6.0 15 400 +85 +150
UNIT A nA C C
ORDERING INFORMATION PACKAGE TYPE NUMBER PINS PCF8570P PCF8570T 8 8 PIN POSITION DIP8 SO8L MATERIAL plastic plastic CODE SOT97-1 SOT176-1
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
BLOCK DIAGRAM
PCF8570
handbook, full pagewidth
PCF8570C
A0 A1 A2 SCL SDA 5 1 2 3 6 INPUT FILTER
WORD ADDRESS REGISTER
7
ROW SELECT
MEMORY CELL ARRAY
I C BUS CONTROL
2
COLUMN SELECT
MULTIPLEXER
VDD VSS TEST
8 4 7
POWER ON RESET
SHIFT REGISTER
8
R/W CONTROL
MLB928
Fig.1 Block diagram.
PINNING SYMBOL A0 A1 A2 VSS SDA SCL TEST PIN 1 2 3 4 5 6 7 DESCRIPTION hardware address input 0 hardware address input 1 hardware address input 2 negative supply serial data input/output serial clock input test output for test speed-up; must be connected to VSS when not in use (power saving mode, see Figs 13 and 14) positive supply
page
A0 A1 A2 VSS
1 2
8 7
VDD TEST SCL SDA
PCF8570C
3 4
MLB929
6 5
Fig.2 Pin configuration.
VDD
8
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
CHARACTERISTICS OF THE I2C-BUS The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. Bit transfer
PCF8570
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as a control signal.
SDA
SCL data line stable; data valid change of data allowed
MBA607
Fig.3 Bit transfer.
Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P).
SDA
SDA
SCL S START condition P STOP condition
SCL
MBA608
Fig.4 Definition of start and stop conditions.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
System configuration
PCF8570
A device generating a message is a `transmitter', a device receiving a message is the `receiver'. The device that controls the message is the `master' and the devices which are controlled by the master are the `slaves'.
SDA SCL MASTER TRANSMITTER / RECEIVER SLAVE TRANSMITTER / RECEIVER MASTER TRANSMITTER / RECEIVER
MBA605
SLAVE RECEIVER
MASTER TRANSMITTER
Fig.5 System configuration.
Acknowledge The number of data bytes transferred between the start and stop conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is a HIGH level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
handbook, full pagewidth
START condition SCL FROM MASTER 1 2 8
clock pulse for acknowledgement 9
DATA OUTPUT BY TRANSMITTER S DATA OUTPUT BY RECEIVER
MBA606 - 1
Fig.6 Acknowledgement on the I2C-bus.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
I2C-bus protocol
PCF8570
Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. The I2C-bus configuration for the different PCF8570 WRITE and READ cycles is shown in Figs 7, 8 and 9.
handbook, full pagewidth
acknowledgement from slave
acknowledgement from slave
acknowledgement from slave
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
DATA
A
P
R/W
n bytes auto increment memory word address
MBD822
Fig.7 Master transmits to slave receiver (WRITE) mode.
handbook, full pagewidth
acknowledgement from slave
acknowledgement from slave
acknowledgement from slave
acknowledgement from master
S
SLAVE ADDRESS
0A
WORD ADDRESS
A
S
SLAVE ADDRESS
1A
DATA
A
R/W
at this moment master transmitter becomes master - receiver and PCF8570C slave receiver becomes slave - transmitter
R/W
n bytes auto increment memory word address
no acknowledgement from master
DATA
1
P
last byte
MLB930
auto increment memory word address
Fig.8 Master reads after setting word address (WRITE word address; READ data).
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
PCF8570
andbook, full pagewidth
acknowledgement from slave
acknowledgement from slave
acknowledgement from slave
S
SLAVE ADDRESS
1A
DATA
A
DATA
1
P
R/W
n bytes auto increment word address
last bytes auto increment word address
MBD824
Fig.9 Master reads slave immediately after first byte (READ mode).
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI II IO IDD ISS Ptot PO Tamb Tstg HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices (see "Handling MOS Devices"). PARAMETER supply voltage (pin 8) input voltage (any input) DC input current DC output current positive supply current negative supply current total power dissipation per package power dissipation per output operating ambient temperature storage temperature -0.8 -0.8 - - - - - - -40 -65 MIN. MAX. +8.0 VDD + 0.8 10 10 50 50 300 50 +85 +150 V V mA mA mA mA mW mW C C UNIT
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
DC CHARACTERISTICS VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL Supply VDD IDD supply voltage supply current standby mode VI = VDD or VSS; fSCL = 0 Hz; Tamb = -25 to +70 C VI = VDD or VSS; fSCL = 100 Hz note 1 - - 5 2.5 - PARAMETER CONDITIONS MIN. TYP.
PCF8570
MAX.
UNIT
6.0
V A
operating mode VPOR VIL VIH IOL |ILI| |ILI| Cl power-on reset voltage
- 1.5 -0.8 0.7VDD 3 - - -
- 1.9 - - - - - - - - -
200 2.3
A V
Inputs, input/output SDA LOW level input voltage HIGH level input voltage LOW level output current input leakage current note 2 note 2 VOL = 0.4 V VI = VDD or VSS VI = VDD or VSS VI = VSS 0.3VDD VDD + 0.8 - 1 250 V V mA A
Inputs A0, A1, A2 and TEST input leakage current nA
Inputs SCL and SDA input capacitance 7 pF
Low VDD data retention VDDR IDDR supply voltage for data retention supply current VDDR = 1 V VDDR = 1 V; Tamb = -25 to +70 C Power saving mode (see Figs 13 and 14) IDDR tHD2 Notes 1. The power-on reset circuit resets the I2C-bus logic when VDD < VPOR. The status of the device after a power-on reset condition can be tested by sending the slave address and testing the acknowledge bit. 2. If the input voltages are a diode voltage above or below the supply voltage VDD or VSS an input current will flow; this current must not exceed 0.5 mA. supply current recovery time TEST = VDD; Tamb = 25 C - - 50 50 400 - nA s 1 - - 6 5 2 V A A
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
PCF8570
AC CHARACTERISTICS All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and VIH with an input voltage swing of VSS to VDD. SYMBOL I2C-bus timing (see Fig.10; note 1) fSCL tSP tBUF tSU;STA tHD;STA tLOW tHIGH tr tf tSU;DAT tHD;DAT tVD;DAT tSU;STO Note 1. A detailed description of the I2C-bus specification, with applications, is given in brochure "The I2C-bus and how to use it". This brochure may be ordered using the code 9398 393 40011. SCL clock frequency tolerable spike width on bus bus free time start condition set-up time start condition hold time SCL LOW time SCL HIGH time SCL and SDA rise time SCL and SDA fall time data set-up time data hold time SCL LOW-to-data out valid stop condition set-up time - - 4.7 4.7 4.0 4.7 4.0 - - 250 0 - 4.0 - - - - - - - - - - - - - 100 100 - - - - - 1.0 0.3 - - 3.4 - kHz ns s s s s s s s ns ns s s PARAMETER MIN. TYP. MAX. UNIT
handbook, full pagewidth
PROTOCOL
START CONDITION (S)
BIT 7 MSB (A7)
BIT 6 (A6)
BIT 0 LSB (R/W)
ACKNOWLEDGE (A)
STOP CONDITION (P)
t
SU;STA
t
LOW
t HIGH
1 / f SCL
SCL
t
BUF
tr
t
f
SDA
t HD;STA
t
SU;DAT
t
HD;DAT
t
VD;DAT
MBD820
t SU;STO
Fig.10 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
APPLICATION INFORMATION Slave address The PCF8570 has a fixed combination 1 0 1 0 as group 1, while group 2 is fully programmable (see Fig.11).
PCF8570
handbook, halfpage
1
0
1
0
A2
A1
A0 R/W
group 1
group 2
MLB892
Fig.11 Slave address.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
Application example
PCF8570
handbook, full pagewidth
VDD
SDA
MASTER TRANSMITTER/ RECEIVER SCL
VDD
0 0 0
A0 A1 A2 TEST
SCL
PCF8570C
'1010' V SS SDA
VDD
VDD
1 0 0
A0 A1 A2 TEST
SCL
up to 8 PCF8570C
PCF8570C
'1010' V SS SDA
V DD
VDD VDD VDD
1 1 1
A0 A1 A2 TEST
SCL
PCF8570C
'1010' V SS SDA R R R: pull up resistor tr R= C BUS
MLB931
V DD
SDA
SCL
(I 2 C bus)
It is recommended that a 4.7 F/10 V solid aluminium capacitor (SAL) be connected between VDD and VSS.
Fig.12 Application diagram.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
Power saving mode
PCF8570
With the condition TEST = VDD or VDDR the PCF8570 goes into the power saving mode and I2C-bus logic is reset.
handbook, full pagewidth
power saving mode (1) TEST = VDDR
operating mode
power saving mode (2) TEST = VDD
VDD
TEST
SCL
SDA
,, ,, ,, ,,
t SU (3)
,,, ,,, ,,, ,,,
t HD1 (3)
t SU (3)
,,, ,,, ,,, ,,,
t HD2 (3)
MLB932
VDDR 0V VDD VDDR 0V VDD VDDR 0V VDD VDDR 0V I DD
VDD
I DD I DDS
(1) Power saving mode without 5 V supply voltage. (2) Power saving mode with 5 V supply voltage. (3) tSU and tHD1 4 s and tHD2 50 s.
Fig.13 Timing for power saving mode.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
PCF8570
handbook, full pagewidth
5V VDD SDA SCL 8 5 3 A2 A1 VDDR 1.2 V (NiCd)
6 PCF8570C 2
MICROCONTROLLER
TEST
(1)
7 4 VSS
1
A0
MLB933
It is recommended that a 4.7 F/10 V solid aluminium capacitor (SAL) be connected between VDD and VSS. (1) In the operating mode TEST = 0 V; in the power saving mode TEST = VDDR.
Fig.14 Application example for power saving mode.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
PACKAGE OUTLINES
PCF8570
handbook, full pagewidth
9.8 9.2
8.25 7.80
seating plane
3.2 max 4.2 max
3.60 3.05
0.51 min
1.15 max
2.54 (3x) 1.73 max
0.53 max
0.254 M
0.38 max 7.62 10.0 8.3
MSA252 - 1
8
5
6.48 6.20
1
4
Dimensions in mm.
Fig.15 Plastic dual in-line package; 8 leads (300 mil); DIP8, SOT97-1.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
PCF8570
7.65 7.55
7.6 7.4
A
S
0.1 S
10.65 10.00
1.95 1.85 (4x)
8
5 2.45 2.25
1.1 1.0 0.32 0.23
2.65 2.35
pin 1 index 1 4 0.3 0.1 1.1 0.5 0 to 8
o
detail A 1.27 0.49 0.36
MBC179 - 3
0.25 M (8x)
Dimensions in mm.
Fig.16 Plastic small outline package; 8 leads; large body (SO8L, SOT176-1).
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low-voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 C, it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s. Plastic small-outline packages BY WAVE During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 C within 6 s. Typical dwell time is 4 s at 250 C. A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. BY SOLDER PASTE REFLOW
PCF8570
Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 C. (Pulse-heated soldering is not recommended for SO packages.) For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCF8570
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
August 1994
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
NOTES
PCF8570
August 1994
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Philips Semiconductors
Preliminary specification
256 x 8-bit static low-voltage RAM with I2C-bus interface
NOTES
PCF8570
August 1994
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Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD34 (c) Philips Electronics N.V. 1994
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
493061/1500/01/pp20 Document order number: Date of release: August 1994 9397 738 20011
Philips Semiconductors

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