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54AC16640, 74AC16640 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS240A - JULY 1990 - REVISED APRIL 1996
D D D D D D
Members of the Texas Instruments WidebusTM Family Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
54AC16640 . . . WD PACKAGE 74AC16640 . . . DL PACKAGE (TOP VIEW)
description
The 'AC16640 are inverting 16-bit transceivers designed for asynchronous communication between data buses. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (1DIR and 2DIR) inputs. The output-enable (1OE and 2OE) inputs can be used to disable the device so that the buses are effectively isolated.
1DIR 1B1 1B2 GND 1B3 1B4 VCC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCC 2B5 2B6 GND 2B7 2B8 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1OE 1A1 1A2 GND 1A3 1A4 VCC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE
The 74AC16640 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16640 is characterized for operation over the full military temperature range of -55C to 125C. The 74AC16640 is characterized for operation from -40C to 85C.
FUNCTION TABLE (each section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright (c) 1996, Texas Instruments Incorporated
* DALLAS, TEXAS 75265
1
54AC16640, 74AC16640 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS240A - JULY 1990 - REVISED APRIL 1996
logic symbol
1OE 1DIR 2OE 2DIR 48 1 25 24 G3 3 EN1 [BA] 3 EN2 [AB] G6 6 EN4 [BA] 6 EN5 [AB] 1 1 1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 46 44 43 41 40 38 37 36 4 1 1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 35 33 32 30 29 27 26 5 14 16 17 19 20 22 23 2B2 2B3 2B4 2B5 2B6 2B7 2B8 2 3 5 6 8 9 11 12 13 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2 1B1
1A1
47
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1OE 48 2OE 25
1DIR
1
2DIR
24
1A1
47
2
1B1
2A1
36
13
2B1
To Seven Other Channels
To Seven Other Channels
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
54AC16640, 74AC16640 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS240A - JULY 1990 - REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA Maximum power dissipation at TA = 55C (in still air)(see Note 2): DL package . . . . . . . . . . . . . . . . . . . . 1.2 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
54AC16640 MIN VCC VIH Supply voltage High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V IOL t/v Low-level output current Input transition rise or fall rate VCC = 4.5 V VCC = 5.5 V 0 -55 VCC = 4.5 V VCC = 5.5 V 0 0 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC -4 -24 -24 12 24 24 10 125 0 -40 0 0 NOM 5 MAX 5.5 74AC16640 MIN 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC -4 -24 -24 12 24 24 10 85 ns/V C mA mA V V V V NOM 5 MAX 5.5 UNIT V
TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
POST OFFICE BOX 655303
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3
54AC16640, 74AC16640 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS240A - JULY 1990 - REVISED APRIL 1996
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 3V IOH = -50 A VOH IOH = -4 mA IOH = -24 mA 24 A IOH = -75 mA IOL = 50 A VOL IOL = 12 mA IOL = 24 mA IOL = 75 mA VI = VCC or GND VO = VCC or GND VI = VCC or GND, VI = VCC or GND VO = VCC or GND IO = 0 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 3V 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 5V 4.5 16 0.1 0.5 8 0.1 0.1 0.1 0.36 0.36 0.36 MIN 2.9 4.4 5.4 2.58 3.94 4.94 TA = 25C TYP MAX 54AC16640 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 1 5 80 MAX 74AC16640 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 1 5 80 A A A pF pF V V MAX UNIT
II IOZ ICC Ci Cio
Control inputs A or B ports Control inputs A or B ports
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. For I/O ports, the parameter IOZ includes the input leakage current.
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B MIN 2.2 3 3 3.9 5.1 4.3 TA = 25C TYP MAX 6.9 8.5 8.2 10.9 8.3 7.8 9.1 11 11 14 10.6 10.1 54AC16640 MIN 2.2 3 3 3.9 5.1 4.3 MAX 10 11.9 12.3 15.5 11.2 10.6 74AC16640 MIN 2.2 3 3 3.9 5.1 4.3 MAX 10 11.9 12.3 15.5 11.2 10.6 UNIT ns ns ns
OE OE
switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A or B TO (OUTPUT) B or A A or B A or B MIN 1.8 2.6 2.4 3 5 4.1 TA = 25C TYP MAX 4.7 5.7 5.6 6.6 7.5 6.5 54AC16640 MIN 1.8 2.6 2.4 3 5 4.1 MAX 7.3 8.6 8 9.9 9.9 9 74AC16640 MIN 1.8 2.6 2.4 3 5 4.1 MAX 7.3 8.6 8 9.9 9.9 9 UNIT ns ns ns
OE OE
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
54AC16640, 74AC16640 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SCAS240A - JULY 1990 - REVISED APRIL 1996
operating characteristics, VCC = 5 V, TA = 25C
PARAMETER Cpd d Power dissipation capacitance per transceiver Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF pF, f = 1 MHz TYP 55 8 UNIT pF
PARAMETER MEASUREMENT INFORMATION
2 x VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND
LOAD CIRCUIT VCC 50% tPLH In-Phase Output tPHL Out-of-Phase Output 50% VCC 50% VCC 50% 0V tPHL VOH 50% VCC VOL tPLH VOH 50% VCC VOL Output Waveform 2 S1 at GND (see Note B) Output Waveform 1 S1 at 2 x VCC (see Note B) tPZH Output Control (low-level enabling) VCC 50% tPZL tPLZ 50% VCC tPHZ 80% VCC VOH 20% VCC 50% 0V
Input
[ VCC
VOL
50% VCC
[0V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveform
POST OFFICE BOX 655303
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5
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Copyright (c) 1998, Texas Instruments Incorporated

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