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| CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 D D D D D D D D Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Drive Outputs (- 48-mA IOH, 48-mA IOL) State-of-the-Art EPIC-BTM BiCMOS Design Significantly Reduces Power Dissipation Packaged in Plastic Small-Outline Package D PACKAGE (TOP VIEW) GND 1Y2 1Y3 GND 2Y1 2Y2 GND 3Y1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1Y1 1T/C VCC 2T/C A VCC 3T/C OE description The CDC391 contains a clock-driver circuit that distributes one input signal to six outputs with minimum skew for clock distribution. Through the use of the polarity-control (T/C) inputs, various combinations of true and complementary outputs can be obtained. The output-enable (OE) input is provided to disable the outputs to a high-impedance state. The CDC391 is characterized for operation from - 40C to 85C. FUNCTION TABLE INPUTS OE H L L L L T/C X L L H H A X L H L H OUTPUT Y Z L H H L Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-B is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1995, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 logic symbol OE 9 EN 16 2 3 5 6 8 1 A 1T/C 2T/C 3T/C 12 15 13 10 N1 N2 N3 1 1 2 2 3 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 1Y1 1Y2 1Y3 2Y1 2Y2 3Y1 logic diagram (positive logic) OE 1T/C 9 15 16 1Y1 2 1Y2 3 A 12 5 13 2T/C 6 1Y3 2Y1 2Y2 3T/C 10 8 3Y1 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO . . . . . . . - 0.5 V to VCC + 0.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 50 mA Maximum power dissipation at TA = 55C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.77 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 300 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B. recommended operating conditions (see Note 3) MIN VCC VIH VIL VI IOH IOL t / v fclock TA Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Input clock frequency Operating free-air temperature - 40 0 4.75 2 0.8 VCC - 48 48 5 100 85 NOM 5 MAX 5.25 UNIT V V V V mA mA ns / V MHz C NOTE 3: Unused inputs must be held high or low to prevent them from floating. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II IOZ IO ICC Ci Co VCC = 4.75 V, VCC = 4.75 V, VCC = 4.75 V, VCC = 5.25 V, VCC = 5.25 V, VCC = 5.25 V, VCC = 5 25 V 5.25 V, VI = VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V TEST CONDITIONS II = -18 mA IOH = - 48 mA IOL = 48 mA VI = VCC or GND VO = VCC or GND VO = 2.5 V Outputs high IO = 0, 0 Outputs low Outputs disabled 3 5 - 15 MIN 2 0.5 1 50 - 100 10 40 10 pF pF mA TYP MAX -1.2 UNIT V V V A A mA All typical values are at VCC = 5 V, TA = 25C. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figures 1 and 2) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tsk(o) k( ) tsk(p) tr tf FROM (INPUT) A TO (OUTPUT) Any Y Any Y Any Y Any Y Any Y (same phase) Any Y (any phase) Any Y MIN 1.5 1.5 1.5 1.5 1.5 3 MAX 5 5 5 5 5 7 5 5 0.5 1 1 1.5 1.5 UNIT ns ns ns ns ns ns ns ns T/C OE OE A A 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open LOAD CIRCUIT FOR OUTPUTS Output Control (low-level enabling) tPZL 3V 3V 1.5 V 1.5 V 0V tPLZ 3.5 V 1.5 V tPHZ tPZH 1.5 V VOH VOH - 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL + 0.3 V VOL Input 1.5 V tPLH 1.5 V 0V tPHL 2V 0.8 V tr 1.5 V 2V 0.8 V VOH VOL Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) Output tf VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 CDC391 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND 3-STATE OUTPUTS SCAS334A - DECEMBER 1992 - REVISED NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION A 1T/C 1Y1 tPLH1 1Y2 tPLH2 2T/C tPHL2 tPLH6 tPHL6 tPHL1 tPLH5 tPHL5 2Y1 tPLH3 2Y2 tPLH4 tPHL4 tPHL8 tPLH8 tPHL3 tPHL7 tPLH7 NOTES: A. Output skew, tsk(o), from A to any Y (same phase), can be measured only between outputs for which the respective polarity-control inputs (T/C) are at the same logic level. It is calculated as the greater of: - The difference between the fastest and slowest of tPLH from A to any Y (e.g., tPLHn, n = 1 to 4; or tPLHn, n = 5 to 6) - The difference between the fastest and slowest of tPHL from A to any Y (e.g., tPHLn, n = 1 to 4; or tPHLn, n = 5 to 6) - The difference between the fastest and slowest of tPLH from A to any Y (e.g., tPLHn, n = 7 to 8) - The difference between the fastest and slowest of tPHL from A to any Y (e.g., tPHLn, n = 7 to 8) B. Output skew, tsk(o), from A to any Y (any phase), can be measured between outputs for which the respective polarity-control inputs (T/C) are at the same or different logic levels. It is calculated as the greater of: - The difference between the fastest and slowest of tPLH from A to any Y or tPHL from A to any Y (e.g., tPLHn, n = 1 to 4; or tPLHn, n = 5 to 6, and tPHLn, n = 7 to 8) - The difference between the fastest and slowest of tPHL from A to any Y or tPLH from A to any Y (e.g., tPHLn, n = 1 to 4; or tPHLn, n = 5 to 6, and tPLHn, n = 7 to 8) Figure 2. Waveforms for Calculation of tsk(o) 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 1998, Texas Instruments Incorporated |
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