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| SN74CBT1G66 SINGLE FET BUS SWITCH SCDS110 - JULY 2000 D D D 5- Switch Connection Between Two Ports CMOS-Compatible Control Input Levels Package Options Include Plastic Small-Outline Transistor (DBV, DCK) Packages DBV OR DCK PACKAGE (TOP VIEW) A B GND 1 2 3 5 4 VCC OE description The SN74CBT1G66 features a single high-speed line switch. The switch is disabled when the output-enable (OE) input is low. The SN74CBT1G66 is characterized for operation from -40C to 85C. FUNCTION TABLE INPUT OE H L FUNCTION A port = B port Disconnect logic diagram (positive logic) 1 A 2 B 4 OE Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. Copyright (c) 2000, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 PRODUCT PREVIEW SN74CBT1G66 SINGLE FET BUS SWITCH SCDS110 - JULY 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 3) MIN VCC VI/O VIH VIL VIN tr/tf Supply voltage I/O port voltage High-level input voltage Low-level input voltage Control input voltage Control input transition rise/fall time VCC = 2.3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 2.3 0 0.7 x VCC 0.3 x VCC 5.5 10 5 MAX 5.5 VCC UNIT V V V V V ns PRODUCT PREVIEW TA Operating free-air temperature -40 85 C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II Ioff IOZ II = -18 mA 0 VI 5.5 V 0 A or B 4.5 V 0 A or B VCC VI = 0 VI = 2.3 V ron VI = 0 VI = 3 V VI = 0, VI = 2.4 V, ICC Ci VI = 4.5 V, VI = VCC or GND II = 8 mA II = 24 mA II = 30 mA II = 15 mA II = 30 mA IO = 0 TEST CONDITIONS VCC 4.5 V 0 to 5.5 V VCC = 0 2.3 V to 5.5 V 2.3 23V 3V 5 13 4 10 3 4.5 V 5.5 V 0 5V 5 7 MIN TYP MAX -1.2 1 10 10 12 30 9 20 7 12 15 10 A pF pF UNIT V A A A Cio All typical values are at VCC = 5 V, TA = 25C. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN74CBT1G66 SINGLE FET BUS SWITCH SCDS110 - JULY 2000 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER tpd ten tdis FROM (INPUT) A or B OE TO (OUTPUT) B or A A or B VCC = 2.5 V 0.2 V MIN MAX VCC = 3.3 V 0.3 V MIN MAX VCC = 5 V 0.5 V MIN MAX ns ns UNIT PARAMETER MEASUREMENT INFORMATION 2 x VCC From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 Output Control (low-level enabling) tPZL VCC Input VCC/2 VCC/2 0V tPLH tPHL VOH Output VCC/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCC/2 VOL Output Waveform 2 S1 at GND (see Note B) Output Waveform 1 S1 at 2 x VCC (see Note B) tPZH TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open 2 x VCC GND VCC VCC/2 VCC/2 0V tPLZ VCC VCC/2 VOL + 0.3 V VOL tPHZ VOH VOH - 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOAD CIRCUIT VCC/2 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The output is measured with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 PRODUCT PREVIEW IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 2000, Texas Instruments Incorporated |
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