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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
D D D
D D D D D D D D
Meet or Exceed the Requirements of TIA/EIA-422-B, TIA/EIA-485-A and ITU Recommendations V.11 and X.27 Operate at Data Rates up to 35 Mbaud Four Skew Limits Available: SN65ALS176 . . . 15 ns SN75ALS176 . . . 10 ns SN75ALS176A . . . 7.5 ns SN75ALS176B . . . 5 ns Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments Low Supply-Current Requirements . . . 30 mA Max Wide Positive and Negative Input/Output Bus-Voltage Ranges Thermal Shutdown Protection Driver Positive and Negative Current Limiting Receiver Input Hysteresis Glitch-Free Power-Up and Power-Down Protection Receiver Open-Circuit Fail-Safe Design
D OR P PACKAGE (TOP VIEW)
R RE DE D
1 2 3 4
8 7 6 5
VCC B A GND
description
The SN65ALS176 and SN75ALS176 series differential bus transceivers are designed for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendations V.11 and X.27. The SN65ALS176 and SN75ALS176 series combine a 3-state, differential line driver and a differential input line receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be connected together externally to function as a direction control. The driver differential outputs and the receiver differential inputs are connected internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus when the driver is disabled or VCC = 0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications. The SN65ALS176 is characterized for operation from -40C to 85C. The SN75ALS176 series is characterized for operation from 0C to 70C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. These devices meet or exceed the requirements of TIA/EIA-485-A, except for the Generator Contention Test (para. 3.4.2) and the Generator Current Limit (para. 3.4.3). The applied test voltage ranges are -6 V to 8 V for the SN75ALS176, SN75ALS176A, and SN75ALS176B and -4 V to 8 V for the SN65ALS180.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2000, Texas Instruments Incorporated
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
AVAILABLE OPTIONS PACKAGED DEVICES TA tsk(lim) 10 7.5 5 SMALL OUTLINE (D) SN75ALS176D SN75ALS176AD SN75ALS176BD PLASTIC DIP (P) SN75ALS176P SN75ALS176AP SN75ALS176BP
0C to 70C
-40C to 85C 15 SN65ALS176D SN65ALS176P This is the maximum range that the driver or receiver delay times vary over temperature, VCC, and process (device to device). The D package is available taped and reeled. Add the suffix R to the device type (e.g., SN75ALS176DR).
Function Tables
DRIVER INPUT D H L X ENABLE DE H H L OUTPUTS A H L Z B L H Z
H = high level, L = low level, X = irrelevant, Z = high impedance RECEIVER DIFFERENTIAL INPUTS A-B VID 0.2 V -0.2 V < VID < 0.2 V VID -0.2 V X Inputs open ENABLE RE L L L H L OUTPUT R H ? L Z H
H = high level, L = low level, X = irrelevant, Z = high impedance
logic symbol
DE RE 3 2 EN1 EN2 1 1 1 2 6 7 A B
logic diagram (positive logic)
DE D RE R 3 4 2 6 1 7 A B Bus
D
4
R
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT VCC R(eq) TYPICAL OF A AND B I/O PORTS VCC 180 k NOM Connected on A Port 3 k NOM A or B Output TYPICAL OF RECEIVER OUTPUT 85 NOM VCC
Input
18 k NOM Driver Input: R(eq) = 3 k NOM Enable Inputs: R(eq) = 8 k NOM R(eq) = equivalent resistor 180 k NOM Connected on B Port
1.1 k NOM
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage range at any bus terminal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7 V to 12 V Enable input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
recommended operating conditions (unless otherwise noted)
MIN Supply voltage, VCC Input voltage at any bus terminal (separately or common mode), VI or VIC mode) High-level input voltage, VIH Low-level input voltage, VIL Differential input voltage, VID (see Note 3) High-level High level output current, IOH current Low-level Low level output current IOL current, Operating free-air temperature, TA free air temperature Driver Receiver Driver Receiver SN65ALS176 SN75ALS176 series -40 0 D, DE, and RE D, DE, and RE 2 0.8 12 -60 -400 60 8 85 70 4.75 NOM 5 MAX 5.25 12 -7 UNIT V V V V V mA A mA C
NOTE 3: Differential input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VO |VOD1| |VOD2| VOD3 |VOD| VOC |VOC| IO IIH IIL Input clamp voltage Output voltage Differential output voltage g Differential output voltage Differential output voltage Change in magnitude of differential output voltage Common-mode output voltage Change in magnitude of common-mode output voltage Output current High-level input current Low-level input current II = -18 mA IO = 0 IO = 0 RL = 100 , RL = 54 , Vtest = -7 V to 12 V, RL = 54 or 100 , RL = 54 or 100 , RL = 54 or 100 , Outputs disabled (see Note 4) VI = 2.4 V VI = 0.4 V VO = -4 V VO = -6 V IOS Short-circuit output current# VO = 0 VO = VCC VO = 8 V ICC Supply current No load Outputs enabled Outputs disabled 23 19 SN65ALS176 SN75ALS176 See Figure 1 See Figure 1 See Figure 2 See Figure 1 See Figure 1 See Figure 1 VO = 12 V VO = -7 V TEST CONDITIONS MIN 0 1.5 1/2VOD1 or 2 1.5 1.5 2.5 5 5 0.2 3 -1 0.2 1 -0.8 20 -400 -250 -250 -150 250 250 30 26 mA mA TYP MAX -1.5 6 6 UNIT V V V V V V V V V mA A A
The power-off measurement in TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs. All typical values are at VCC = 5 V and TA = 25C. The minimum VOD2 with a 100- load is either 1/2 VOD1 or 2 V, whichever is greater. |VOD| and |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from one logic state to the other. # Duration of the short circuit should not exceed one second for this test. NOTE 4: This applies for power on and power off. Refer to TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a combined driver and receiver terminal.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
switching characteristics over recommended ranges of supply voltage and operating free-air temperature range (unless otherwise noted)
SN65ALS176
PARAMETER td(OD) tsk(p) tsk(lim) tt(OD) tPZH tPZL tPHZ tPLZ Differential output delay time Pulse skew Pulse skew Differential output transition time Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level RL = 54 , RL = 54 , RL = 54 , RL = 54 , RL = 110 , RL = 110 , RL = 110 , RL = 110 , TEST CONDITIONS CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 4 See Figure 5 See Figure 4 See Figure 5 8 80 30 50 30 0 MIN TYP MAX 15 2 15 UNIT ns ns ns ns ns ns ns ns
All typical values are at VCC = 5 V, TA = 25C. Pulse skew is defined as the |tPLH - tPHL| of each channel of the same device. Skew limit is the maximum difference in propagation delay times between any two channels of any two devices.
SN75ALS176, SN75ALS176A, SN75ALS176B
PARAMETER 'ALS176 td(OD) ( ) tsk(p) Differential output Diff ti l t t delay time Pulse skew 'ALS176 tsk(lim) Pulse skew () tt(OD) tPZH tPZL tPHZ 'ALS176A 'ALS176B Differential output transition time Output enable time to high level Output enable time to low level Output disable time from high level RL = 54 , RL = 110 , RL = 110 , RL = 110 , CL = 50 pF, CL = 50 pF, CL = 50 pF, CL = 50 pF, See Figure 3 See Figure 4 See Figure 5 See Figure 4 8 23 14 20 8 50 20 35 17 RL = 54 , CL = 50 pF, See Figure 3 'ALS176A 'ALS176B RL = 54 , CL = 50 pF, See Figure 3 RL = 54 , CL = 50 pF, See Figure 3 TEST CONDITIONS MIN 3 4 5 TYP 8 7 8 0 MAX 13 11.5 10 2 10 7.5 5 ns ns ns ns ns ns ns ns UNIT
tPLZ Output disable time from low level RL = 110 , CL = 50 pF, See Figure 5 All typical values are at VCC = 5 V, TA = 25C. Pulse skew is defined as the |tPLH - tPHL| of each channel of the same device. Skew limit is the maximum difference in propagation delay times between any two channels of any two devices. SYMBOL EQUIVALENTS DATA-SHEET PARAMETER VO |VOD1| |VOD2| |VOD3| |VOD| VOC |VOC| IOS IO TIA/EIA-422-B Voa, Vob Vo Vt (RL = 100 ) None ||Vt| - |Vt|| |Vos| |Vos - Vos| |Isa|, |Isb| |Ixa|, |Ixb| TIA/EIA-485-A Voa, Vob Vo Vt (RL = 54 ) Vt (test termination measurement 2) ||Vt| - |Vt|| |Vos| |Vos - Vos| None Iia, Iib
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature range (unless otherwise noted)
PARAMETER VIT+ VIT- Vhys VIK VOH VOL IOZ VI IIH IIL rI IOS ICC Positive-going input threshold voltage Negative-going input threshold voltage Hysteresis voltage (VIT+ - VIT-) Enable-input clamp voltage High-level High level output voltage Low-level output voltage High-impedance-state output current Line input current High-level-enable input current Low-level-enable input current Input resistance Short-circuit output current Supply current VID = 200 mV, No load VO = 0 Outputs enabled Outputs disabled II = -18 mA VID = 200 mV, , See Figure 6 VID = -200 mV, See Figure 6 VO = 0.4 V to 2.4 V Other input = 0 V (see Note 5) VIH = 2.7 V VIL = 0.4 V 12 -15 23 19 20 -85 30 26 VI = 12 V VI = -7 V IOH = -400 , A, IOL = 8 mA, 2.7 27 0.45 20 1 -0.8 20 -100 VO = 2.7 V, VO = 0.5 V, TEST CONDITIONS IO = -0.4 mA IO = 8 mA MIN -0.2 60 -1.5 TYP MAX 0.2 UNIT V V mV V V V A mA A A k mA mA
All typical values are at VCC = 5 V, TA = 25C. The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 5: This applies for power on and power off. Refer to TIA/EIA-485-A for exact conditions.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
switching characteristics over recommended ranges of supply voltage and operating free-air temperature range (unless otherwise noted)
SN65ALS176
PARAMETER tpd tsk(p) tsk(lim) tPZH tPZL tPHZ tPLZ Propagation time Pulse skew Pulse skew Output enable time to high level Output enable time to low level Output disable time from high level TEST CONDITIONS VID = -1.5 V to 1.5 V, See Figure 7 VID = -1.5 V to 1.5 V, See Figure 7 RL = 54 , See Figure 3 CL = 15 pF, CL = 15 pF, CL = 15 pF, CL = 15 pF, CL = 15 pF, CL = 50 pF, See Figure 8 See Figure 8 See Figure 8 11 11 MIN TYP MAX 25 0 2 15 18 18 50 30 UNIT ns ns ns ns ns ns ns
Output disable time from low level CL = 15 pF, See Figure 8 All typical values are at VCC = 5 V, TA = 25C. Pulse skew is defined as the |tPLH - tPHL| of each channel of the same device. Skew limit is the maximum difference in propagation delay times between any two channels of any two devices.
SN75ALS176, SN75ALS176A, SN75ALS176B
PARAMETER 'ALS176 tpd Propagation time 'ALS176A 'ALS176B tsk(p) Pulse skew 'ALS176 tsk(lim) () tPZH tPZL tPHZ tPLZ Pulse skew 'ALS176A 'ALS176B Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level CL = 15 pF, CL = 15 pF, CL = 15 pF, CL = 15 pF, See Figure 8 See Figure 8 See Figure 8 See Figure 8 7 20 20 8 VID = -1.5 V to 1.5 V, See Figure 7 RL = 54 , See Figure 3 CL = 15 pF, VID = -1.5 V t 1 5 V 1 5 to 1.5 V, See Figure 7 CL = 15 pF, F TEST CONDITIONS MIN 9 10.5 11.5 TYP 14 14 13 0 MAX 19 18 16.5 2 10 CL = 50 pF, F 7.5 5 14 35 35 17 ns ns ns ns ns ns ns UNIT
All typical values are at VCC = 5 V, TA = 25C. Pulse skew is defined as the |tPLH - tPHL| of each channel of the same device. Skew limit is the maximum difference in propagation delay times between any two channels of any two devices.
PARAMETER MEASUREMENT INFORMATION
RL 2 RL 2 VOC
VOD2
Figure 1. Driver VOD2 and VOC
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
375
VOD3
60
375
Vtest
Figure 2. Driver VOD3
3V Input CL = 50 pF (see Note A) Output Output 3V TEST CIRCUIT 50% 10% tt(OD) td(ODH) (see Note C) 90% 90% 1.5 V 1.5 V 0V td(ODL) (see Note C) 2.5 V 50% 10% -2.5 V tt(OD)
RL = 54 Generator (see Note B) 50
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 . C. td(OD) = td(ODH) or td(ODL)
Figure 3. Driver Test Circuit and Voltage Waveforms
Output S1 0 V or 3 V CL = 50 pF (see Note A) Generator (see Note B) 50 Output 2.3 V VOLTAGE WAVEFORMS RL = 110 Input tPZH 1.5 V 1.5 V 0V tPHZ VOH Voff 0 3V
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 4. Driver Test Circuit and Voltage Waveforms
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
5V RL = 110 S1 0 V or 3 V CL = 50 pF (see Note A) Generator (see Note B) 50 Output 2.3 V tPZL tPLZ 5V 0.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS Output Input 1.5 V 1.5 V 0V 3V
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 5. Driver Test Circuit and Voltage Waveforms
VID
VOH + IOL VOL -IOH
Figure 6. Receiver VOH and VOL Test Circuit
3V Input 1.5 V 1.5 V 0V Generator (see Note B) 51 1.5 V Output CL = 15 pF (see Note A) Output 0V TEST CIRCUIT VOLTAGE WAVEFORMS 1.3 V 1.3 V VOL tPLH (see Note C) tPHL (see Note C) VOH
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 . C. tpd = tPLH or tPHL
Figure 7. Receiver Test Circuit and Voltage Waveforms
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
PARAMETER MEASUREMENT INFORMATION
5V
S2 1.5 V - 1.5 V CL = 15 pF (see Note A) S1 2 k Output
5 k
1N916 or Equivalent
Generator (see Note B)
50 S3
TEST CIRCUIT
3V Input 1.5 V 0V tPZH VOH Output 1.5 V 0V 3V Input 1.5 V 0V tPHZ VOH Output 0.5 V 1.3 V VOLTAGE WAVEFORMS Output 0.5 V tPLZ Output 1.5 V tPZL S1 to 1.5 V S2 Open S3 Closed Input
3V
S1 to -1.5 V 1.5 V S2 Closed S3 Open 0V
4.5 V VOL 3V Input 1.5 V 0V S1 to -1.5 V S2 Closed S3 Closed
S1 to 1.5 V S2 Closed S3 Closed
1.3 V VOL
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 .
Figure 8. Receiver Test Circuit and Voltage Waveforms
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
TYPICAL CHARACTERISTICS
DRIVER DRIVER
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VOH - High-Level Output Voltage - V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 -20 -40 -60 -80 -100 IOH - High-Level Output Current - mA -120 VCC = 5 V TA = 25C
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
5 4.5 VOL - Low-Level Output Voltage - V 4 3.5 3 2.5 2 1.5 1 0.5 0 0 20 40 60 80 100 IOL - Low-Level Output Current - mA 120 VCC = 5 V TA = 25C
Figure 9
Figure 10
DRIVER
DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT
4 3.5 3 2.5 2 1.5 1 0.5 0 VCC = 5 V TA = 25C
VOD - Differential Output Voltage - V
0
10
20
30 40 50 60 70 80 IO - Output Current - mA
90
100
Figure 11
Operation of the device at these or any other conditions beyond those indicated under ``recommended operating conditions" is not implied.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
RECEIVER TYPICAL CHARACTERISTICS
RECEIVER RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
5 VOH - High-Level Output Voltage - V VOH - High-Level Output Voltage - V 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 IOH - High-Level Output Current - mA VCC = 4.75 V VCC = 5 V VCC = 5.25 V VID = 0.3 V TA = 25C
HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 -40 VCC = 5 V VID = 300 mV IOH = -440 A
-20
0 20 40 60 80 TA - Free-Air Temperature - C
100
120
Figure 12
Figure 13
RECEIVER
RECEIVER
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
0.6 VOL - Low-Level Output Voltage - V VCC = 5 V TA = 25C VID = -300 mV
LOW-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
0.6 VCC = 5 V VID = - 300 mA IOL = 8 mA
VOL - Low-Level Output Voltage - V
0.5
0.5
0.4
0.4
0.3
0.3
0.2
0.2
0.1
0.1
0 0 15 20 25 10 IOL - Low-Level Output Current - mA 5 30
0 -40
-20
80 100 0 20 40 60 TA - Free-Air Temperature - C
120
Figure 14
Figure 15
Operation of the device at these or any other conditions beyond those indicated under ``recommended operating conditions" is not implied.
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SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS
SLLS040H - AUGUST 1987 - REVISED JUNE 2000
TYPICAL CHARACTERISTICS
RECEIVER RECEIVER
OUTPUT VOLTAGE vs ENABLE VOLTAGE
5 VID = 0.3 V Load = 8 k to GND TA = 25C VO - Output Voltage - V 6
OUTPUT VOLTAGE vs ENABLE VOLTAGE
VID = 0.3 V Load = 1 k to VCC TA = 25C VCC = 5.25 V
4 VO - Output Voltage - V
VCC = 5.25 V
5
4 VCC = 5 V 3
VCC = 4.75 V
3
VCC = 4.75 V
VCC = 5 V
2
2
1
1
0 0 0.5 1 1.5 2 2.5 3 VI(en) - Enable Voltage - V
0 0 0.5 1 1.5 2 2.5 3 VI(en) - Enable Voltage - V
Figure 16
Figure 17
Operation of the device at these or any other conditions beyond those indicated under ``recommended operating conditions" is not implied.
APPLICATION INFORMATION
RT RT
Up to 53 Transceivers
NOTE A: The line should terminate at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible.
Figure 18. Typical Application Circuit
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated

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