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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
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Single-Chip Switching-Power-Supply Control With Limited External Components Built-In PWM Control Circuit Open-Collector Output for Direct Drive of Transformer Variable Dead-Time Control Overvoltage and Undervoltage Detection and Latch-Up for Each Supply Voltage: 5 V, 12 V, - 5 V, and - 12 V System Overcurrent Protection Wide Supply Range From 7 V to 40 V Power-Good Indicator Function
N PACKAGE (TOP VIEW)
REF PGO SVP5 SVP12 CPR DT CUV SVN5 SVN12 D1
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
CPG PGI EA + EA - EAO VCC SC CT D2 GND
description
The TPS5206CN is a bipolar monolithic integrated circuit designed for push-pull-type switching-power-supply (SPS) control in desktop PC applications. It offers pulse-width-modulation (PWM) control and power-supply supervisor functions, including detection of undervoltage and overvoltage conditions on 5 V and 12 V system supplies. It also detects overcurrent conditions on the SPS system output. This single chip reduces the total component count and provides additional design flexibility, which minimizes cost and printed-circuit-board (PCB) space requirements in present and new SPS designs. overvoltage-protection lockout feature The overvoltage-protection lockout feature monitors four different supply voltages. When an overvoltage (OV) condition is detected, the power-good output (PGO) is set low and the PWM function is disabled. The OV condition is detected on the SVP5, SVP12, SVN5, and SVN12 inputs. Threshold voltages are typically 5.9 V, 14.1 V, - 8.4 V, and - 15.3 V, respectively. undervoltage-protection lockout feature The undervoltage-protection lockout feature monitors four different supply voltages. When an undervoltage (UV) condition is detected, the power-good output (PGO) is set low and the PWM function is disabled. The UV condition is detected on the SVP5, SVP12, SVN5, and SVN12 inputs. Threshold voltages are typically 3.9 V, 9.5 V, - 3.4 V, and - 9.3 V, respectively. overcurrent-protection lockout feature The overcurrent (OC) protection lockout feature is designed to protect the SPS from excessive load or short-circuit conditions. The circuit converts the output current of the SPS to a voltage, which is then monitored at SC. It sets PG low and shuts down the PWM circuit when the sensed voltage is higher than 5 V. reference regulator The internal 5-V reference regulator is designed primarily to provide the internal circuitry with a stable supply rail for varying input voltages. The regulator employs a band-gap circuit as its primary reference to maintain thermal stability of less than 100-mV variation over the operating free-air temperature range of 0C to 70C. In addition to supplying an internal reference, the regulator provides a precision 5-V reference that can support 5 mA of load current for external bias circuits. The regulated voltage has a margin of error of 2%. Short-circuit protection is provided to protect the internal circuit from overload or short-circuit conditions.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1994, Texas Instruments Incorporated
POST OFFICE BOX 655303 POST OFFICE BOX 1443
* DALLAS, TEXAS 75265 * HOUSTON, TEXAS 77251-1443
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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
oscillator The timing capacitor (CT) is charged by the oscillator with a 350-A current source set by the timing resistor (RT) (10 k), internally. This produces a linear-ramp voltage waveform across CT. When the voltage across CT reaches 3 V, it is discharged by the oscillator circuit and the charging cycle is reinitiated. The frequency of the oscillator is programmable over a range of 1 kHz to 300 kHz by the selection of CT. The programmed frequency of the oscillator can be calculated with the equation f = 1/ (104 x CT). The PWM output frequency is one-half of the oscillator frequency. dead-time (DT) control The DT input provides control of minimum dead time (off time). An input offset of 110 mV ensures a minimum dead time of 3% with the DT input grounded. Additional dead time can be imposed by applying voltage to the DT input. This provides a linear control of the dead time from its minimum of 3% to its maximum of 100% as the DT input voltage varies from 0 V to 3.3 V. The DT input is a relatively high-impedance input and is used where additional control of the output duty cycle is required. The input must be terminated; leaving this terminal open causes an undefined condition. pulse-width modulation The ramp voltage across CT is compared to the output of the error amplifier. The CT input incorporates a series diode, which is omitted from the DT control input. This requires the error-amplifier output to be 0.7-V greater than the voltage across CT to inhibit the PWM output. This also ensures PWM maximumduty-cycle operation without requiring the control voltage to sink to true ground potential. The output pulse width varies from 97% of the period to 0 as the voltage at the error-amplifier output varies from 0.5 V to 3.5 V. error amplifier The high-gain error amplifier receives bias from the VCC power rail. The inverting input, EA -, is biased by Vref /2 internally. The amplifier output is biased low by a current sink to provide PWM maximum duty cycle when the amplifier is off. Since the amplifier output is biased low only through IO(sink) of 300 A (see functional block diagram), bias current required by external circuitry into the amplifier output for feedback must not exceed the capability of IO(sink); otherwise, the PWM maximum duty cycle is limited.
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443
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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
functional block diagram
1 14 3 8 4 9 5 7 19 Vref 2 20 110 mV DT CT 6 13 OSC EA + EA - 18 17 Vref 2 + _ + _ _ 0.7 V + 12 300 A D2 D CLK 11 GND + _ + _ + _ Overvoltage/ Undervoltage Protection Reference Regulator 15 REF VCC
SC SVP5 SVN5 SVP12 SVN12 CPR CUV PGI
Vref 2
2 10
PGO D1
CPG
16 EAO Internally generated voltage Fixed-voltage offset
Terminal Functions
TERMINAL NAME CPG CPR CT CUV D1 D2 DT EA - EA + EAO GND PGI PGO REF SC NO. 20 5 13 7 10 12 6 17 18 16 11 19 2 1 14 I O O I I/O O O O O O O I I I I/O DESCRIPTION Power-good-capacitor connection. Connects a capacitor to power-good signal delay. Protection-delay-capacitor connection. Connects a capacitor to protection-delay circuit to bypass high-frequency noise. Timing capacitor. Connects a capacitor to sawtooth oscillator circuit for programming the operating frequency. UV capacitor connection. Connects a capacitor to UV power-on delay circuit to avoid malfunction in the initial state. PWM driver-1 output PWM driver-2 output Dead time. Control input to control the PWM minimum dead time (off time). Error-amplifier inverting input Error-amplifier noninverting input Error-amplifier output Ground Power-good input Power-good output 5-V reference voltage output Overcurrent sense input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443
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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
Terminal Functions (Continued)
TERMINAL NAME SVN5 SVN12 SVP5 SVP12 VCC NO. 8 9 3 4 15 I/O I I I I DESCRIPTION - 5-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low. - 12-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low. 5-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low. 12-V OV/UV detection input. When an OV/UV condition is sensed, the TLS1206 output is locked and PGO is set to low. Supply voltage
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V Amplifier input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3 V Collector output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V Collector output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA Total power dissipation at (or below) 25C free-air temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 70C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE N TA 25C POWER RATING 1150 mW OPERATING FACTOR ABOVE TA = 25C 9.2 mW/C TA = 70C POWER RATING 736 mW
recommended operating conditions
MIN Supply voltage, VCC Collector output voltage, VO(D1), VO(D2) Collector output current, IO(D1), IO(D2) Timing capacitor, CT Operating free-air temperature, TA 0.47 0 7 MAX 40 40 150 10 000 70 UNIT V V mA nF C
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443
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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V
PARAMETER Vref VIH(SC) Reference output voltage High-level input voltage, SC overcurrent protection Low-level input voltage, SC overcurrent protection SVP5 SVP12 SVN5 SVN12 SVP5 SVP12 SVN5 SVN12 VOL(D1), VOL(D2) VO(DT) VIH(PGI) VIL(PGI) VIH(CPG) VIL(CPG) VOH(PGO) VOL(PGO) ICC fosc Low-level Low level output voltage output drivers voltage, Dead-time output voltage High-level input voltage, PGI Low-level input voltage, PGI High-level input voltage, CPG Low-level input voltage, CPG High-level output voltage, PGO Low-level output voltage, PGO Standby supply current Oscillator frequency TEST CONDITIONS IO = 5 mA SVP5 = 5 V, SVN5 = - 5 V, VO(DT) 3.5 V SVP5 = 5 V, SVN5 = - 5 V, VO(DT) 0.4 V SVP12 = 12 V, SVN12 = - 12 V, SVP5 = 5 V, SVN12 = - 12 V, SVP5 = 5 V, SVN12 = - 12 V, SVP5 = 5 V, SVN5 = - 5 V, SVP12 = 12 V, SVN12 = - 12 V, SVP5 = 5 V, SVN12 = - 12 V, SVP5 = 5 V, SVN12 = - 12 V, SVP5 = 5 V, SVN5 = - 5 V, VO(DT) 3 5 V 3.5 SVP5 = 7 V, VO(PGO) 4 V, VO(PGO) 0.4 V, VI(PGI) = 4 V, See Figure 4 VI(PGI) = 4 V, See Figure 4 VCPG = 4 V, See Figure 5 VCPG = 0 V, See Figure 6 SVP12 = 12 V, SVN12 = - 12 V, SVP12 = 12 V, SVN12 = - 12 V, SVN5 = - 5 V, VO(DT) 0.4 V SVN5 = - 5 V, VO(DT) 0.4 V SVP12 = 12 V, VO(DT) 0.4 V SVP12 = 12 V, VO(DT) 0.4 V SVN5 = - 5 V, VO(DT) 0.4 V SVN5 = - 5 V, VO(DT) 0.4 V SVP12 = 12 V, VO(DT) 0.4 V SVP12 = 12 V, VO(DT) 0.4 V IOL = 0 IOL = 150 mA IO(DT) = -250 A See Figure 3 See Figure 3 VO(PGO) 4 V, VO(PGO) 0.4 V, IO(PGO) = - 240 A, IO(PGO) = 9.6 mA, 4.75 0.4 32 80 2.95 2.6 3.5 2.8 2.42 MIN 4.9 5.1 TYP 5 MAX 5.1 UNIT V V
VIL(SC)
4.9
V
3.5 9 -3 -8 5.5 13.5 -7 - 14
3.9 9.5 - 3.4 - 9.3 5.9 14.1 - 8.4 - 15.3
4.5 10.5 V -4 - 10 6.3 14.8 V -9 - 16 0.4 V V V V V V V V mA kHz
VIT(UV)
Input threshold voltage, g, undervoltage sense
VIT(OV)
g, Input threshold voltage, overvoltage sense
1.6
2.5
All other inputs and outputs open CT = 1200 pF
switching characteristics over recommended ranges of supply voltage and operating free-air temperature
PARAMETER tr td Rise time of power good Delay time of power good TEST CONDITIONS VCPG L H, VO(PGO) L H, RL = 150 k, CPG = 2.2 F, VI(PGI) H L, VO(PGO) H L, See Figures 4 and 6 See Figures 4 and 6 500 MIN TYP MAX 100 600 UNIT ns s
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443
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TPS5206CN SWITCHING-POWER-SUPPLY CONTROL CIRCUIT
SLVS082A - APRIL 1994 - REVISED SEPTEMBER 1994
APPLICATION INFORMATION
VCC = 15 V DT EAO CT EA + EA - CS PGO PGI REF SVP5 SVP12 SVN5 SVN12 D1 D2 CUV CPR CPG 1 k 1 k Test Input VCC = 15 V
Test Output
1500 pF Open Test Input Test Output Test Input 1 k
Open Open Open
Figure 1. Test Circuit
2.5 V PGI _ + + _ 2.5 V CPG (open) PGO 2.5 V PGI = 4 V _ + + _ 2.5 V PGO
CPG
Figure 2. PGI Input Voltage Test Circuit
Figure 3. CPG Input Voltage and PGO Output Voltage Test Circuit
5V
2.5 V PGI
_ + 2.2 F + _ 2.5 V PGO
Figure 4. PG Delay Time and Rise Time Test Circuit
Internally biased at Vref /2 or 2.5 V VIH PGI 10% VIL VOH 10% tr td VOL
PGO
90% 10%
Figure 5. PG Output Voltage Waveform
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443
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Copyright (c) 1998, Texas Instruments Incorporated

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