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| TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 20-W MONO CLASS-D AUDIO POWER AMPLIFIER FEATURES D 20 W Into 8- Load From 18-V Supply D D (10% THD+N) Short Circuit Protection (Short to VCC, Short to GND, Short Between Outputs) Third-Generation Modulation Technique: - Replaces Large LC Filter With Small, Low-Cost Ferrite Bead Filter in Most Applications - Improved Efficiency - Improved SNR Low Supply Current . . . 8 mA Typ at 12 V Shutdown Control . . . <1 A Typ Space-Saving, Thermally-Enhanced PowerPAD Packaging DESCRIPTION The TPA3001D1 is a 20-W mono bridge-tied load (BTL) class-D audio power amplifier with high efficiency, eliminating the need for heat sinks. The TPA3001D1 can drive 4- or 8- speakers with only a ferrite bead filter required to reduce EMI. The gain of the amplifier is controlled by two input terminals, GAIN1 and GAIN0. This allows the amplifier to be configured for a gain of 12, 18, 23.6, and 36 dB. The differential input stage provides high common mode rejection and improved power supply rejection. The amplifier also includes depop circuitry to reduce the amount of pop at power-up and when cycling SHUTDOWN. The TPA3001D1 is available in the 24-pin thermally enhanced TSSOP package (PWP) which eliminates the need for an external heat sink. D D D APPLICATIONS D LCD Monitors/TVs D Hands-Free Car Kits D Powered Speakers EFFICIENCY vs OUTPUT POWER 90 80 70 Efficiency - % 60 50 40 30 20 10 0 0 4 8 12 PO - Output Power - W 16 20 VCC = 18 V 8 4 MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE 21 19 PO - Output Power - W 17 15 13 11 9 7 TA = 25C, 10% THD Maximum 5 6 7 8 9 RL - Load Impedance - 10 VCC = 12 V VCC = 15 V VCC = 18 V 5 3.6 4 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2002-2003, Texas Instruments Incorporated www.ti.com 1 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 AVAILABLE OPTIONS TA PACKAGED DEVICES TSSOP (PWP) - 40C to 85C TPA3001D1PWP The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA3001D1PWPR). PWP PACKAGE (TOP VIEW) INN INP GAIN0 GAIN1 SHUTDOWN PGND VCLAMP BSN PVCC OUTN OUTN PGND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC VREF BYPASS COSC ROSC AGND AGND BSP PVCC OUTP OUTP PGND Terminal Functions TERMINAL NAME AGND BSN BSP BYPASS COSC GAIN0 GAIN1 INN INP OUTN OUTP PGND PVCC ROSC SHUTDOWN VCC VCLAMP VREF NO. 18, 19 8 17 22 21 3 4 1 2 10, 11 14, 15 6, 12, 13 9, 16 20 5 24 7 23 I I I I O O I I I I I I I I O O I/O Analog ground terminal Bootstrap terminal for high-side gate drive of negative BTL output (connect a 0.22-F capacitor with a 51- resistor in series from OUTN to BSN) Bootstrap terminal for high-side gate drive of positive BTL output (connect a 0.22-F capacitor with a 51- resistor in series from OUTP to BSP) Connect 1-F capacitor to ground for BYPASS voltage filtering Connect a 220-pF capacitor to ground to set oscillation frequency Bit 0 of gain control (see Table 1 for gain settings) Bit 1 of gain control (see Table 1 for gain settings) Negative differential input Positive differential input Negative BTL output, connect Schottky diode from PGND to OUTN for short-circuit protection Positive BTL output, connect Schottky diode from PGND to OUTP for short-circuit protection Power ground High-voltage power supply (for output stages) Connect 120 k resistor to ground to set oscillation frequency Shutdown terminal (negative logic), TTL compatible, 21-V compliant Analog high-voltage power supply Connect 1-F capacitor to ground to provide reference voltage for H-bridge gates 5-V internal regulator for control circuitry (connect a 0.1-F to 1-F capacitor to ground) DESCRIPTION 2 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 functional block diagram VREF VREF AGND VCC VCC VCLAMP Clamp Reference BSN PVCC + _ INN Gain Adjust _ + + _ + _ _ + Deglitch Logic Gate Drive OUTN PGND BSP PVCC _ + Deglitch Logic Gate Drive INP Gain Adjust OUTP PGND SHUTDOWN GAIN1 GAIN0 SD Biases and References Ramp Generator Start-Up Protection Logic Short-Circuit Detect 2 Gain COSC ROSC BYPASS Thermal VCC OK absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage: VCC, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 21 V Load impedance, RL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 Input voltage: SHUTDOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VCC + 0.3 V GAIN0, GAIN1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 5.5 V INN, INP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 7 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see Dissipation Rating Table) Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C { Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE PWP TA 25C 4.16 W DERATING FACTOR 33.33 mW/C TA = 70C 2.67 W TA = 85C 2.16 W The PowerPAD must be soldered to a thermal land on the printed circuit board. Please refer to the PowerPAD Thermally Enhanced Package application note (SLMA002). www.ti.com 3 AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAA A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAA A A AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A AA AAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAA AAA A A A AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAA A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A operating characteristics, PVCC = VCC = 12 V, TA = 25C (unless otherwise noted) electrical characteristics at TA = 25C, PVCC = VCC = 12 V (unless otherwise noted) The TPA3001D1 must not be used with any speaker or load (including speaker with output filter) that could vary below 3.6 over the audio frequency band. Zi Vn SNR BOM kSVR THD + N PO G rds(on) fs ICC(SD) ICC |IIL| |IIH| PSRR |VOS| Operating free-air temperature, TA Low-level input voltage, VIL Gain Output transistor on resistance (total) Switching frequency Supply current, shutdown mode Supply current Low-level input current High-level input current Power supply rejection ratio Output offset voltage (measured differentially) Input impedance Noise output voltage Signal-to-noise ratio Supply ripple rejection ratio Maximum output power bandwidth Total harmonic distortion plus noise Continuous out ut power at 1% output ower THD+N Continuous out ut power at 10% output ower THD+N PARAMETER PARAMETER See Table 1, page 21 C(BYPASS) = 1 F, A-weighted filter, C(BYPASS) = 1 F, f = 20 Hz to 22 kHz, No weighting filter used, Gain = 12 dB PO = 10 W, RL = 4 f = 1 kHz, PO = 10 W, RL = 4 , THD = 1% f = 1 kHz, f = 1 kHz, f = 1 kHz, f = 1 kHz, GAIN1 = 2 V, GAIN0 = 2 V GAIN1 = 2 V, GAIN0 = 0.8 V GAIN1 = 0.8 V, GAIN0 = 2 V GAIN1 = 0.8 V, GAIN0 = 0.8 V IO = 1 A, TJ = 25C ROSC = 120 k, SHUTDOWN = 0.8 V SHUTDOWN = VCC, VCC = 18 V, PO = 20 W, RL = 8 PVCC = 12 V, VI = 0 V SHUTDOWN = 2.0 V, No load PVCC = 11.5 V to 12.5 V PVCC = 12 V, VI = PVCC VI = 0 V, VI = 0 V, TEST CONDITIONS TEST CONDITIONS GAIN0, GAIN1, SHUTDOWN C(BYPASS) = 1 F RL = 8 RL = 4 RL = 8 RL = 4 f = 20 Hz to 20 kHz f = 20 Hz to 22 kHz, Gain = 12 dB AV = 12 dB, 18, 23.6 dB AV = 36 dB COSC = 220 pF MIN 33.9 17.1 10.9 MIN 0.2AAA 0.7AAA 0.3AAA 23 0.2% TYP 10.3 12.8 TYP 23.6 -84 -81 -70 >23 - 40 250AAAkHz -73AAA dB 7.2 1.3 66 86 95 20 36 18 12 9 1 8 MAX MAX 36.5 24.3 18.5 12.8 100 0.8 15 50 85 2 1 1 V(rms) V(rms) UNIT UNIT dBV dBV kHz mA mV k dB dB A A A dB dB dB dB C W A V AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAA A SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 4 TPA3001D1 recommended operating conditions High-level input voltage, VIH Load impedance, RL Supply voltage, VCC, PVCC www.ti.com GAIN0, GAIN1, SHUTDOWN RL 3.6 MIN 3.6 8 2 MAX 18 UNIT V V TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 operating characteristics, PVCC = VCC = 18 V, TA = 25C (unless otherwise noted) AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA AAAA A A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A MIN TYP MAX UNIT f = 1 kHz, f = 1 kHz, f = 1 kHz, f = 1 kHz, Output power at 10% THD+N Output power at 1% THD N THD+N RL = 4 RL = 8 RL = 4 RL = 8 12.8 20 16 10.3 1% PO W THD + N BOM kSVR SNR Total harmonic distortion plus noise Maximum output power bandwidth Supply ripple rejection ratio Signal-to-noise ratio PO = 15 W, RL = 8 PO = 2 W, RL = 8 THD = 1% f = 1 kHz, f = 20 Hz to 20 kHz f = 20 Hz to 20 kHz 0.3% 20 -70 102 86 kHz dB dB CBYPASS = 1 F PO = 15 W, RL = 8 C(BYPASS) = 1 F, f = 20 Hz to 20 kHz, No weighting filter used, Gain = 12 dB C(BYPASS) = 1 F, A-weighted filter, f = 20 Hz to 22 kHz, Gain = 12 dB V(rms) dBV V(rms) dBV k Vn Noise output voltage -81 66 -84 >23 Zi Input impedance See Table 1, page 21 PARAMETER TEST CONDITIONS TYPICAL CHARACTERISTICS Table of Graphs FIGURE Efficiency PO ICC ICC(SD) Output power Supply current Shutdown current vs Supply voltage vs Output power vs Load Impedance 1 2, 3, 4 5 6 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18 19, 20, 21, 22, 23, 24, 25 26 vs Frequency vs Common-mode input voltage 27 28 29 vs Output power THD+N Total harmonic distortion + noise vs Frequency kSVR CMRR VIO Supply voltage rejection ratio Gain and phase Common-mode rejection ratio Input offset voltage www.ti.com 5 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS EFFICIENCY vs OUTPUT POWER 90 80 70 Efficiency - % 60 50 40 30 20 VCC = 12 V 10 0 0 2 4 6 8 10 12 14 8 4 17 PO - Output Power - W 15 13 11 VCC = 12 V 9 7 TA = 25C, 10% THD Maximum 5 6 7 8 9 10 21 19 VCC = 18 V MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE VCC = 15 V 5 3.6 4 PO - Output Power - W Load Impedance - Figure 1 MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE 21 TA = 45C 19 PO - Maximum Output Power - W VCC = 18 V 17 15 13 11 9 7 5 3.6 4 VCC = 12 V VCC = 15 V PO - Maximum Output Power - W 19 17 15 13 11 9 7 5 3.6 4 21 TA = 60C Figure 2 MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE VCC = 18 V VCC = 15 V VCC = 12 V 5 6 7 8 ZL - Load Impedance - 9 10 5 6 7 8 ZL - Load Impedance - 9 10 Figure 3 Figure 4 6 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE 11 5 SHUTDOWN CURRENT vs SUPPLY VOLTAGE 10 ICC(SD) - Shutdown Current - A SHUTDOWN = 0.8 V 4 ICC - Supply Current - mA 9 3 8 2 7 1 6 8 10 12 14 16 18 VCC - Supply Voltage - V 0 8 10 12 14 16 18 VCC - Supply Voltage - V Figure 5 Figure 6 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % VCC = 18 V, RL = 8 , Gain = 12 dB 1 THD+N - Total Harmonic Distortion Plus Noise - % 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10 VCC = 18 V, RL = 8 , Gain = 36 dB 1 1 kHz 20 kHz 0.1 1 kHz 0.1 20 kHz 0.01 20 Hz 0.001 0 5 10 15 20 PO - Output Power - W 20 Hz 0.01 0 5 10 15 PO - Output Power - W 20 Figure 7 Figure 8 www.ti.com 7 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % THD+N - Total Harmonic Distortion Plus Noise - % 10 VCC = 15 V, RL = 8 , Gain = 12 dB 1 1 kHz 20 kHz 0.1 20 Hz TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10 VCC = 15 V, RL = 8 , Gain = 36 dB 1 20 kHz 1 kHz 0.1 20 Hz 0.01 0.001 0 5 10 15 PO - Output Power - W 20 0.01 0 5 10 15 PO - Output Power - W 20 Figure 9 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % VCC = 15 V, RL = 4 , Gain = 12 dB THD+N - Total Harmonic Distortion Plus Noise - % 10 Figure 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10 VCC = 15 V, RL = 4 , Gain = 36 dB 1 1 1 kHz 0.1 20 Hz 20 kHz 0.01 0 5 10 PO - Output Power - W 1 kHz 0.1 20 Hz 20 kHz 0.01 0 5 10 PO - Output Power - W Figure 11 Figure 12 8 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % VCC = 12 V, RL = 8 , Gain = 12 dB 1 1 kHz THD+N - Total Harmonic Distortion Plus Noise - % 10 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER VCC = 12 V, RL = 8 , Gain = 36 dB 1 1 kHz 20 kHz 20 Hz 0.1 20 kHz 0.1 20 Hz 0.01 0.001 0 5 10 PO - Output Power - W 15 0.01 0 5 10 PO - Output Power - W 15 Figure 13 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % 10 VCC = 12 V, RL = 4 , Gain = 12 dB 1 THD+N - Total Harmonic Distortion Plus Noise - % Figure 14 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10 VCC = 12 V, RL = 4 , Gain = 36 dB 1 1 kHz 0.1 1 kHz 0.1 20 kHz 20 Hz 0.01 0 5 PO - Output Power - W 10 20 Hz 20 kHz 0.01 0.001 0 5 10 PO - Output Power - W Figure 15 Figure 16 www.ti.com 9 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER THD+N - Total Harmonic Distortion Plus Noise - % 10 VCC = 8 V, RL = 4 , Gain = 12 dB THD+N - Total Harmonic Distortion Plus Noise - % 10 VCC = 8 V, RL = 4 , Gain = 36 dB TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 1 1 1 kHz 1 kHz 0.1 20 Hz 20 kHz 0.01 0.1 20 kHz 20 Hz 0.01 0 2 4 PO - Output Power - W 6 0 2 4 PO - Output Power - W 6 Figure 17 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion Plus Noise - % THD+N - Total Harmonic Distortion Plus Noise - % 1 VCC = 18 V RL = 8 PO = 10 W Figure 18 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 1 VCC = 15 V RL = 8 PO = 10 W PO = 500 mW 0.1 0.1 PO = 500 mW PO = 2 W 0.01 0.01 PO = 2 W 0.001 20 100 1k f - Frequency - Hz 10 k 20 k 0.001 20 100 1k f - Frequency - Hz 10 k 20 k Figure 19 Figure 20 10 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion Plus Noise - % 1 THD+N - Total Harmonic Distortion Plus Noise - % VCC = 15 V RL = 4 PO = 10 W 0.1 PO = 500 mW TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 1 VCC = 12 V RL = 8 PO = 5 W 0.1 PO = 250 mW 0.01 PO = 2 W 0.01 PO = 1 W 0.001 20 100 1k f - Frequency - Hz 10 k 20 k 0.001 20 100 1k f - Frequency - Hz 10 k 20 k Figure 21 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion Plus Noise - % THD+N - Total Harmonic Distortion Plus Noise - % 1 VCC = 12 V RL = 4 Figure 22 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10 VCC = 8 V RL = 8 1 PO = 3 W PO = 250 mW 0.1 0.1 PO = 2 W PO = 500 mW 0.01 PO = 7.5 W PO = 1 W 0.01 0.001 20 100 1k f - Frequency - Hz 10 k 20 k 0.001 20 100 1k f - Frequency - Hz 10 k 20 k Figure 23 Figure 24 www.ti.com 11 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion Plus Noise - % 10 kSVR - Supply Voltage Rejection Ratio - dB VCC = 8 V RL = 4 PO = 5 W 1 PO = 1 W -50 C(Bypass) = 1 F RL = 8 -60 VCC = 8 V -70 VDD = 15 V -80 SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY 0.1 PO = 250 mW 0.01 0.001 20 100 1k f - Frequency - Hz 10 k 20 k -90 20 100 1k f - Frequency - Hz 10k Figure 25 GAIN and PHASE vs FREQUENCY 14 Gain 12 10 Gain - dB 30 20 10 0 -10 -20 Phase 6 4 2 0 20 VCC = 8 V RL = 8 Gain = 12 dB 100 1k f - Frequency - Hz 10k -30 -40 -50 -60 -70 -80 100k Phase - 8 CMRR - Common-Mode Rejection Ratio - dB -40 Figure 26 COMMON-MODE REJECTION RATIO vs FREQUENCY VCC = 8 V to 18 V RL = 8 -41 -42 -43 -44 -45 -46 20 100 1k f - Frequency - Hz 10 k Figure 27 Figure 28 12 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 6 5 VIO - Input Offset Voltage - mV 4 3 2 1 0 -1 -2 -3 -4 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VIC - Common-Mode Input Voltage - V VCC = 8 V to 18 V Figure 29 www.ti.com 13 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION application circuit U1 TPA3001D1 IN- IN+ GAIN SELECT GAIN SELECT SHUTDOWN CONTROL C2 C1 0.47 F 1 2 0.47 F 3 4 5 6 7 C10 1 F VCC C7 10 F R2 C8 0.22 F C5 1 F 51 8 9 10 11 12 D2 INN INP GAIN0 GAIN1 SHUTDOWN PGND VCLAMP BSN PVCC OUTN OUTN PGND PowerPAD VCC VREF BYPASS COSC ROSC AGND AGND BSP PVCC OUTP OUTP PGND 24 23 22 21 20 19 18 17 16 15 14 13 D1 R3 51 C9 0.22 F C6 1 F VCC C3 1 F C4 1 F C11 1 F VCC C12 220 pF R1 120 k L2 (Ferrite Bead) L1 (Ferrite Bead) C15 1 nF C14 1 nF L1, L2: Fair-Rite, Part Number 2512067007Y3 D1, D2: Diodes, Inc., Part Number B130 Figure 30. Typical Application Circuit 14 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION class-D operation This section focuses on the class-D operation of the TPA3001D1. traditional class-D modulation scheme The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, VCC. Therefore, the differential prefiltered output varies between positive and negative VCC, where filtered 50% duty cycle yields 0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 31. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high, causing high loss, thus causing a high supply current. OUTP OUTN +12 V Differential Voltage Across Load 0V -12 V Current Figure 31. Traditional Class-D Modulation Scheme's Output Voltage and Current Waveforms Into an Inductive Load With No Input TPA3001D1 modulation scheme The TPA3001D1 uses a modulation scheme that still has each output switching from ground to VCC. However, OUTP and OUTN are now in phase with each other with no input. The duty cycle of OUTP is greater than 50% and OUTN is less than 50% for positive output voltages. The duty cycle of OUTP is less than 50% and OUTN is greater than 50% for negative output voltages. The voltage across the load is 0 V throughout most of the switching period, greatly reducing the switching current, which reduces any I2R losses in the load. (See Figure 32 on the following page.) www.ti.com 15 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION TPA3001D1 modulation scheme (continued) OUTP OUTN Differential Voltage Across Load Output = 0 V +12 V 0V -12 V Current OUTP OUTN Differential Voltage Across Load -12 V +12 V 0V Output > 0 V Current Figure 32. The TPA3001D1 Output Voltage and Current Waveforms Into an Inductive Load 16 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION maximum allowable output power (safe operating area) The TPA3001D1 can drive load impedances as low as 3.6 from power supply voltages ranging from 8 V to 18 V. To prevent device failure, however, the output power of the TPA3001D1 must be limited. Figure 33 shows the maximum allowable output power versus load impedance for three power supply voltages at an ambient temperature of 25C. (For ambient temperatures of 45C and 60C, see Figures 3 and 4 on page 6.) MAXIMUM OUTPUT POWER vs LOAD IMPEDANCE 21 19 PO - Output Power - W 17 15 13 11 9 7 TA = 25C, 10% THD Maximum 5 6 7 8 Load Impedance - 9 10 VCC = 12 V VCC = 15 V VCC = 18 V 5 3.6 4 Figure 33. Output Power driving a low-impedance load from a high power supply voltage When driving low-impedance loads (e.g., a 4- speaker), the output power can be limited by reducing the maximum audio input signal level or by reducing the gain of the TPA3001D1. The maximum input voltage may be calculated with equation 1. 8P V in(pp),max + where PO(avg), max = maximum continuous output power (W) RL = load impedance () Av = voltage gain (V/V) = 10 G(dB) 20 O(avg),max Av R L (1) For example, consider an application in which the TPA3001D1 drives a 4- speaker from an 18-V power supply. The gain is selected to be 18 dB. The maximum allowable output power for a 4- load impedance is 12.8 W. From equation 1, the input voltage must not exceed 2.54 Vpp. In this same example, however, if the maximum output voltage of audio signal source is 5 Vpp, then the gain of the TPA3001D1 should be reduced to 12 dB to eliminate the need for limiting the input signal. www.ti.com 17 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION The input voltage may be limited using a variety of methods, depending on what is known about the audio signal source. If the maximum output voltage of the source is known, a resistive voltage divider in conjunction with proper TPA3001D1 gain selection may be used to prevent distortion. If the maximum audio source voltage is unknown, diodes may be used to clamp the input voltage, at the cost of distortion when the input signal level exceeds the required clamping voltage. driving the output into clipping The output of the TPA3001D1 may be driven into clipping to attain a higher output power than is possible with no distortion. Clipping is typically quantified by a THD measurement of 10%. The amount of additional power into the load may be calculated with equation 2. P O(10% THD) + P O(1% THD) 1.25 (2) For example, consider an application in which the TPA3001D1 drives an 8- speaker from an 18-V power supply. The maximum output power with no distortion (less than 1% THD) is 16 W, which corresponds to a maximum peak output voltage of 16 V. For the same output voltage level driven into clipping (10% THD), the output power is increased to 20 W. output filter considerations A ferrite bead filter (shown in Figure 34) should be used in order to pass FCC and/or CE radiated emissions specifications and if a frequency sensitive circuit operating higher than 1 MHz is nearby. The ferrite filter reduces EMI around 1 MHz and higher (FCC and CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies. Use an additional LC output filter if there are low frequency (<1 MHz) EMI sensitive circuits and/or there are long wires (greater than 11 inches) from the amplifier to the speaker, as shown in Figure 35 and Figure 36. Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF 4 or Greater Figure 34. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3) Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF 1 F 15 H 1 F 4 15 H Figure 35. Typical LC Output Filter for 4- Speaker, Cutoff Frequency of 41 kHz 18 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION Ferrite Chip Bead OUTP 1 nF Ferrite Chip Bead OUTN 1 nF 0.47 F 33 H 0.47 F 8 33 H Figure 36. Typical LC Output Filter for 8- Speaker, Cutoff Frequency of 41 kHz short-circuit protection The TPA3001D1 has short circuit protection circuitry on the outputs that prevents damage to the device during output-to-output shorts, output-to-GND shorts, and output-to-VCC shorts. When a short-circuit is detected on the outputs, the part immediately disables the output drive and enters into shutdown mode. This is a latched fault and must be reset by cycling the voltage on the SHUTDOWN pin to a logic low and back to the logic high state for normal operation. This will clear the short-circuit flag and allow for normal operation if the short was removed. If the short was not removed, the protection circuitry will again activate. Two Schottky diodes are required to provide short-circuit protection. The diodes should be placed as close to the TPA3001D1 as possible, with the anodes connected to PGND and the cathodes connected to OUTP and OUTN as shown in the application circuit schematic. The diodes should have a forward voltage rating of 0.5V at a minimum of 1A output current and a DC blocking voltage rating of at least 30 V. The diodes must also be rated to operate at a junction temperature of 150C. If short-circuit protection is not required, the Schottky diodes may be omitted. thermal protection Thermal protection on the TPA3001D1 prevents damage to the device when the internal die temperature exceeds 150C. There is a 15C tolerance on this trip point from device to device. Once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 15C. The device begins normal operation at this point with no external system interaction. www.ti.com 19 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION thermal considerations: output power and maximum ambient temperature To calculate the maximum ambient temperature, the following equation may be used: TAmax = TJmax - JAPDissipated where: TJmax = 150C JA = 1 / derating factor = 1 / 0.03333 = 30C/W (The derating factor for the 24-pin PWP package is given in the dissipation rating table on page 3.) To estimate the power dissipation, the following equation may be used: PDissipated = PO(average) x ((1 / Efficiency) - 1) Efficiency = ~85% for an 8- load = ~75% for a 4- load Example. What is the maximum ambient temperature for an application that requires the TPA3001D1 to drive 10 W into an 8- speaker? PDissipated = 10 W x ((1 / 0.85) - 1) = 1.76 W TAmax = 150C - (30C/W x 1.76 W) = 97.2C This calculation shows that the TPA3001D1 can drive 10 W into an 8- speaker up to the absolute maximum ambient temperature rating of 85C, which must never be exceeded. Also, refer to Figures 2, 3, and 4 to determine the minimum load impedance for the desired output power. (4) (3) gain setting via GAIN0 and GAIN1 inputs The gain of the TPA3001D1 is set by two input terminals, GAIN0 and GAIN1. The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This causes the input impedance (Zi) to be dependent on the gain setting. The actual gain settings are controlled by ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by 30% due to shifts in the actual resistance of the input resistors. For design purposes, the input network (discussed in the next section) should be designed assuming an input impedance of 23 k, which is the absolute minimum input impedance of the TPA3001D1. At the lower gain settings, the input impedance could increase as high as 313 k. Table 1. Gain Settings GAIN1 0 0 1 1 GAIN0 0 1 0 1 AMPLIFIER GAIN (dB) TYP 12 18 23.6 36 INPUT IMPEDANCE (k) TYP 241 168 104 33 20 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION input resistance Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB or cutoff frequency also changes by over six times. Zf Ci Input Signal IN Zi The -3-dB frequency can be calculated using equation 5. Use Table 1 for Zi values. f+ 1 2p Z iC i (5) input capacitor, Ci In the typical application an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a high-pass filter with the corner frequency determined in equation 6. -3 dB fc + 1 2 p Zi Ci (6) fc The value of Ci is important, as it directly affects the bass (low frequency) performance of the circuit. Consider the example where Zi is 241 k and the specification calls for a flat bass response down to 20 Hz. Equation 6 is reconfigured as equation 7. Ci + 1 2p Z i f c (7) In this example, Ci is 33 nF, so one would likely choose a value of 0.1 F as this value is commonly used. If the gain is known and will be constant, use Zi from Table 1 to calculate Ci. A further consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. www.ti.com 21 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION power supply decoupling The TPA3001D1 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1 F placed as close as possible to the device VCC lead works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 F or greater placed near the audio power amplifier is recommended. BSN and BSP capacitors The full H-bridge output stage uses only NMOS transistors. It therefore requires bootstrap capacitors for the high side of each output to turn on correctly. A 0.22-F ceramic capacitor, rated for at least 25 V, must be connected from each output to its corresponding bootstrap input. Specifically, one 0.22-F capacitor must be connected from OUTP to BSP, and one 0.22-F capacitor must be connected from OUTN to BSN. (See Figure 30.) BSN and BSP resistors To limit the current when charging the bootstrap capacitors, a resistor with a value of approximately 50 (+/-10% maximum) must be placed in series with each bootstrap capacitor. The current will be limited to less than 500 A. VCLAMP capacitor To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal regulator clamps the gate voltage. A 1-F capacitor must be connected from VCLAMP (pin 7) to ground and must be rated for at least 25 V. The voltage at VCLAMP (pin 7) varies with VCC and may not be used for powering any other circuitry. midrail bypass capacitor The midrail bypass capacitor (C11 of Figure 30) is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, CBYPASS determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor (C11) values of 0.47-F to 1-F ceramic or tantalum low-ESR capacitors are recommended for the best THD noise, and depop performance. The bypass capacitor must be a value greater than the input capacitors for optimum depop performance. VREF decoupling capacitor The VREF terminal (pin 23) is the output of an internally-generated 5-V supply, used for the oscillator and gain setting logic. It requires a 0.1-F to 1-F capacitor to ground to keep the regulator stable. The regulator may not be used to power any additional circuitry. 22 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION differential input The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To use the TPA3001D1 EVM with a differential source, connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input. To use the TPA3001D1 with a single-ended source, ac ground the INN input through a capacitor and apply the audio signal to the INP input. In a single-ended input application, the INN input should be ac-grounded at the audio source instead of at the device input for best noise performance. switching frequency The switching frequency is determined using the values of the components connected to ROSC (pin 20) and COSC (pin 21) and may be calculated with the following equation: fs + 6.6 R OSC C OSC (8) The frequency may be varied from 225 kHz to 275 kHz by adjusting the values chosen for ROSC and COSC. SHUTDOWN operation The TPA3001D1 employs a shutdown mode of operation designed to reduce supply current (ICC) to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, ICC(SD) = 1 A. SHUTDOWN should never be left unconnected, because amplifier operation would be unpredictable. Ideally, the device should be held in shutdown when the system powers up and brought out of shutdown once any digital circuitry has settled. However, if SHUTDOWN is to be left unused, the terminal may be connected directly to VCC. using low-ESR capacitors Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor. www.ti.com 23 TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 APPLICATION INFORMATION printed circuit board (PCB) layout Because the TPA3001D1 is a class-D amplifier that switches at a high frequency, the layout of the printed circuit board (PCB) should be optimized according to the following guidelines for the best possible performance. D Decoupling capacitors -- As described on page 22, the high-frequency 0.1-uF decoupling capacitors should be placed as close to the PVCC (pin 9 and pin 16) and VCC (pin 24) terminals as possible. The BYPASS (pin 22) capacitor, VREF (pin 23) capacitor, and VCLAMP (pin 7) capacitor should also be placed as close to the device as possible. The large (10 uF or greater) bulk power supply decoupling capacitor should be placed near the TPA3001D1. D Grounding -- The VCC (pin 24) decoupling capacitor, VREF (pin 23) capacitor, BYPASS (pin 22) capacitor, COSC (pin 21) capacitor, and ROSC (pin 20) resistor should each be grounded to analog ground (AGND, pin 18 and pin 19). The PVCC (pin 9 and pin 16) decoupling capacitors should each be grounded to power ground (PGND, pin 12 and pin 13). Analog ground and power ground may be connected at the PowerPAD, which should be used as a central ground connection or star ground for the TPA3001D1. D Output filter -- The ferrite filter (Figure 34, page 18) should be placed as close to the output terminals (pins 10, 11, 14, and 15) as possible for the best EMI performance. The LC filter (Figure 35, page 18 and Figure 36, page 19) should be placed close to the ferrite filter. The capacitors used in both the ferrite and LC filters should be grounded to power ground. D PowerPAD -- The PowerPAD must be soldered to the PCB for proper thermal performance and optimal reliability. The dimensions of the PowerPAD thermal land should be 1.6 mm by 6.0 mm (63 mils by 236.2 mils). Two rows of solid vias (four vias per row, 0.3302 mm or 13 mils diameter) should be equally spaced underneath the thermal land. The vias should connect to a solid copper plane, either on an internal layer or on the bottom layer of the PCB. The vias must be solid vias, not thermal relief or webbed vias. For additional information, please refer to the PowerPAD Thermally Enhanced Package application note, TI literature number SLMA002. For an example layout, please refer to the TPA3001D1 Evaluation Module (TPA3001D1EVM) User Manual, TI literature number SLOU156. Both the EVM user manual and the PowerPAD application note are available on the TI web site at http://www.ti.com. 24 www.ti.com TPA3001D1 SLOS398A - DECEMBER 2002 - REVISED APRIL 2003 MECHANICAL DATA PWP (R-PDSO-G**) 20 PINS SHOWN PowerPAD PLASTIC SMALL-OUTLINE 0,65 20 0,30 0,19 11 0,10 M Thermal Pad (See Note D) 4,50 4,30 6,60 6,20 0,15 NOM Gage Plane 1 A 10 0- 8 0,25 0,75 0,50 Seating Plane 1,20 MAX 0,15 0,05 PINS ** DIM A MAX A MIN 0,10 14 5,10 4,90 16 5,10 4,90 20 6,60 6,40 24 7,90 7,70 28 9,80 9,60 4073225/F 10/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments. www.ti.com 25 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2003, Texas Instruments Incorporated |
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