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 U6812B
Single-Ended Bus Transceiver with Triple Buffer
Description
The U6812B is a bipolar monolithic K-line bus transceiver designed to provide bidirectional serial communication in automotive diagnostic applications. The standard K-line is ISO 9141 compatible for Baud rates up to 250 kBaud. The IC provides additionally three universally applicable 40-mA open collector buffers, which can be used for signal decoupling. The U6812B is built on Atmel Wireless & Microcontrollers' bipolar process and has been developed and approved in line with the automotive industry specifications.The U6812B is an ideal grouping of low-power drivers in an SO package, thus meeting user demand for space-saving and cost-reduction in the area of circuit board assembly.
Features
D Wide power-supply voltage range D Short-circuit protected K-interface ISO9141 compatible D Three short-protected 40-mA open-collector buffers D All low-power outputs with built-in 28-V clamping D CMOS compatible digital inputs with hysteresis D Digital 1-mA push-pull "RxD" K-line output D Channel-specific over-temperature switch off in event of short circuit D Load-dump protection and interference protection similar to ISO 7637-1/4 (DIN 40839)
Block Diagram
Vs Vcc
K-Diagnosis ISO 9141
Vs
RxD TxD
Vcc/2
K
Vs/2
Vcc
GND
OUT 1 IN 1
Vcc/2 Vcc
Temperature control
GND OUT 2
IN 2
DIS
GND OUT 3
IN 3 GND
14169
Figure 1. Block diagram
Ordering Information
Extended Type Number U6812B Package SO16/ 150 mil Remarks
Rev. A3, 27-Mar-01
1 (8)
U6812B
Pin Desciption
GND OUT 2 IN 2 DIS VCC IN 3 OUT 3 GND 1 2 3 4 U6812B 5 6 7 8
Figure 2. Pinning
16 GND 15 K 14 TxD 13 RxD 12 VS 11 IN 1 10 OUT 1 9 GND
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Name GND OUT 2 IN 2 DIS VCC IN 3 OUT 3 GND GND OUT 1 IN 1 VS RxD TxD K GND
Type Supply Open-collector output Digital input Digital input Supply Digital input Open-collector output Supply Supply Open-collector output Digital input Supply / reference Digital output Digital input 12-V input & O.C. output Supply
Function Ground; all ground pins are directly connected to the lead frame Protected output of driver #2 (faced to: outside) Input of protected driver #2 (faced to: P) Disable input for OUT 2 and OUT 3, "H"=enable, "L"=disable +5-V supply Input of protected driver #3 (faced to: P) Protected output of driver #3 (faced to: outside) Ground Ground Protected output of driver #1 (faced to: outside) Input of protected driver #1 (faced to: P) +12-V reference for K-line level Diagnosis receive line (faced to: P) Diagnosis transmit line (faced to: P) Bidirectional diagnosis line (faced to: outside) Ground
2 (8)
Rev. A3, 27-Mar-01
U6812B
Basic Application Circuit
VBatt
D1
C1 + 10m
R1 1k K C2
TxD RxD IN 1 OUT 1
VS 16 15 14 13 12 11 10 9
U6812B
1
2
3
4
5
6
7
8
IN 2 OUT 3 DIS OUT 2 VCC IN 3
Figure 3. Basic application circuit
Functional Description
K-Interface
The K-interface is equipped with a 40-mA open-collector driver. The current is determined by the external pull-up resistor. The saturation voltage is below 0.6 V The open-collector output is protected by a 28-V Z-diode. The collector current is permanently monitored for short circuits via a built-in shunt. In the event of a short circuit occurring at VBatt, collector current is held at approx. Icreg = 80 mA; accompanied by a rise in chip temperature due to power loss. This status is maintained until the detection of over temperature causes the K-line output to be disabled and stored to memory. The internal short-circuit detection threshold is Isc > 0.8 Icreg. The output remains disabled until a falling edge of a pulse is available to its input. Any further attempt to connect with the short circuit still present causes the above sequence to be repeated. The output can be activated normally once the
short circuit has been removed. The maximum Baud rate is 250 kBaud. The K-line permits bidirectional communication with the C. When output K is disabled, information can be transferred to the processor via the input comparator at Pin RxD. The digital output RxD is a push-pull output stage with a driver power of 1 mA. In the event of a line break at the K-line, output K is connected to GND via the built-in 85-k pull-down resistor, thus allowing the C to detect this fault. The maximum sampling frequency is 250 kBaud.
Open-Collector Driver OUT x
The outputs are designed for a maximum static current of 40 mA, which is determined by the external pull-up resistor. The saturation voltage is below 0.6 V The three OUTx-driver outputs are activated with "active low" at the corresponding input. Outputs OUT2 and OUT3 can also be disabled with "active low" at the dis-
Rev. A3, 27-Mar-01
3 (8)
U6812B
able input, regardless of their input signal. The outputs are released with open disable input or use of high potential. The open-collector outputs are connected to a 28-V Zdiode. The collector current is permanently monitored via a built-in shunt circuit to permit the detection of short circuits. In the event of a short circuit occurring at VBatt, collector current is held at approx. Icreg = 80 mA; accompanied with a rise of chip temperature due to power loss. This status is maintained until the detection of over temperature causes the output affected by the short circuit to be selectively disabled and stored to memory. The internal short-circuit detection threshold is Isc > 0.8 Icreg. The affected output remains disabled until a falling edge of a pulse is available to its input. Any further attempt to connect with the short circuit still present causes the above sequence to be repeated. The output can be activated normally once the short circuit has been removed. shown in figure 3 with reverse battery protection diode D1 and buffer capacitor C1 = 10 mF.
Digital Inputs (DIS, IN 1, IN 2, IN 3 and TxD)
The digital inputs are CMOS-compatible and equipped with a built-in pull-up resistor with a typical rating of 85 k to VCC. The input threshold totals VTH = 0.57 VCC with a typical hysteresis of 100 mV. The inputs are designed for an input voltage of -0.2 V to VCC + 0.6 V. For a proper activation of the output stages it is mandatory that the inputs are kept low as long as the supply voltage not applied. After supply voltage is on, all inputs need to have a falling edge (see timing diagram).
Power Supply
The IC must be equipped with external R/C circuitry to limit voltage in the event of power surges (see figure 3). This prevents the circuit from being damaged or destroyed and provides a buffer in the event of power fluctuations at VBatt. The RxD comparator is powered via Pin VS, producing its reference voltage of 1/2 VS, while all other blocks are supplied via VCC. Operating voltage can vary between VS= 7 V and 26 V. Resistor R1 at Pin VS limits the current via the built-in 28-V Z-diode between VS and GND. Application note: It is recommended to use the external components as
Digital Output (RxD)
The digital output RxD is a push-pull output stage with driver power of IRxD = 1 mA
Interference Voltages and Load Dump (defined in DIN40839 or ISO7637)
The U6812B is protected from the interference pulses usually present in the wiring by the recommended R1 /C1 circuitry and the integrated elements (28-V Z-diodes, both at the supply pin and at the output pins and two diodes connected to VCC and GND at the digital inputs). All transient pulses which appear on the supply line (VBatt), should not effect the function of the IC (see table 1).
Table 1 Transient-test conditions
Name DIN/ISO 1 DIN/ISO 2 DIN/ISO 3a DIN/ISO 3b DIN/ISO 5
Table 2 Truth table
Voltage -110 V 110 V -160 V 150 V 55 V (total)
Source Resistance 10 10 50 50 2
Rise Time 100 V/s 100 V/s 30 V/ns 20 V/ns 10 V/ms
Pulse Duration 2 ms 0.05 ms 0.1 s 0.1 s 500 ms
Pulse Amount 15000 15000 1 h (ref. ISO) 1 h (ref. ISO) 20
WSI-1 L H L X X X
WSI-2 L H L X X X
WSI-R X X X H L X
EN H X L X X X
TXD X X X H L X
K X X X Open L H
WSO-1 L Open Open X L X
WSO-2 L Open Open X X X
WSO-R X X X Open L X
RXD X X X H L H
4 (8)
Rev. A3, 27-Mar-01
U6812B
Timing Diagrams
VS
IN2/ IN3 DIS
OUT2/ OUT3 Short 150C Temperature 140C
Figure 4. IN2 / IN3 - pulse diagram
VS IN1
OUT1
Short 150C Temperature 140C
Figure 5. IN1 - pulse diagram
VS
TxD K
RxD Short 150C Temperature 140C
Figure 6. K-interface pulse diagram
Rev. A3, 27-Mar-01
5 (8)
U6812B
Absolute Maximum Ratings
Parameters Operating voltage Operating voltage Voltage at Pins IN1,2,3; RxD, TxD, DIS Voltage at Pins OUT1,2,3; K Static collector current at Pins OUT1,2,3; K Ambient temperature Storage temperature range Max. junction temperature Symbol VS VCC Vi Vo Ix Tamb Tstg Tj Value 26 3 to 6 -0.2 to 6 -1 to 26 45 -40 to 125 -55 to 150 150 Unit V V V V mA _C _C _C
Thermal Resistance
Parameters Junction to case Junction to ambient; strongly depending on the assembly Symbol RthJC RthJA Value 36 65 to 80 Unit K/W K/W
Electrical Characteristics
Tamb = - 40 to 125C, VCC = 4.75 V to 5.25 V (unless otherwise specified), reference point is GND (Pin 1,7,8,16). IC with recommended external components (see figure 3). Parameters Supply Supply voltage Supply voltage Reduced supply voltage Current consumption
Vsat = 0.6 V @ IX = 20 mA
Test Conditions / Pins Pins 5 and 12
Symbol VS VCC VCC IS IS R1 C1
Min. 7 4.5 3.0
Typ.
Max. 26 5.5 4.5 6 20
Unit V V V mA mA k F
All inputs open or high @ VCC = 5.25 V All inputs on (= low) @ VCC = 5.25 V
Protective resistor Smoothing capacitor Integrated Z-Diode Quiescent current IS = 20 mA
1 10 26 28 30 0.75
VS
V mA
All outputs low or open @ IVS VS = 18 V Inputs IN 1, IN 2, IN 3, DIS, TxD Pins 11, 3, 6, 4, 14 Input voltage Int. pull-up resistor Switchover threshold Hysteresis Outputs OUT 1, OUT 2, OUT 3 Integrated Z-diode Current regulation Saturation voltage IOUTx = 40 mA Pins 10, 2 and 7 VO IO VOSAT 26 45 28 IOUTx = 20 mA Vi Ri ViTH ViHYS -0.2 30 85
0.57xVCC
VCC+0.6 170
V k V mV
100 30 130 0.6
V mA V
6 (8)
Rev. A3, 27-Mar-01
U6812B
Electrical Characteristics (continued)
Parameters Maximum voltage Leakage current Output RxD Integrated Z-diode Output current Saturation voltage Rise time Fall time K-Line Threshold Internal pull-down resistor Integrated Z-diode Current regulation Saturation voltage Maximum voltage Maximum Baud rate IK = 40 mA, C2 = 20 nF C2 = 470 pF IK = 40 mA IK = 20 mA Pin 15 VK RK VK IK VKsat Vout - 1.0 14.4 250 30 26 45 0.57xVS 85 28 170 30 130 0.6 26 V k V mA V V kBaud kBaud IRxD = 1 mA Output open, VS = 21 V Pin 13 IRxD = 20 mA VRxD IRxD VRxDSAT tR tF 0.01 0.01 26 28 30 1 0.5 5 5 V mA V ms ms Test Conditions / Pins Symbol Vout ILeak Min. - 1.0 Typ. Max. 26 2 Unit V A
Package Information
Package SO16
Dimensions in mm
10.0 9.85 5.2 4.8 3.7
1.4 0.4 1.27 8.89 16 9 0.25 0.10 0.2 3.8 6.15 5.85
technical drawings according to DIN specifications
13036
1
8
Rev. A3, 27-Mar-01
7 (8)
U6812B
Ozone Depleting Substances Policy Statement
It is the policy of Atmel Germany GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel-wm.com
Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
8 (8)
Rev. A3, 27-Mar-01


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