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U840B Digital Interval Wipe/Wash Control for Rear or Front Wiper Description The circuit U840B is designed as interval wipe/ wash timer for automotive applications. The interval pause can be set in a range from 0.8 s to 22 s by an external 30 kW potentiometer. All other time periods are determined by the basic frequency of the oscillator. The wipe/ wash (WIWA) mode has priority over the interval mode. The program Pin PP controls, whether the wiper immediately starts to wipe, or with a delay time of 0.8 s. Immunity against glitches by dual edge debounce stages is provided at inputs WASH and INT. The PARK switch keeps the relay energized until the motor end position is reached. The integrated relay driver is protected against short circuits and is switched to conductive condition in the case of a load-dump. The circuit is protected with the recommended external circuitry against load-dump and RF interference, refer to ISO 7637-1/3 (DIN 40839). Features D Interval-switch to GND D Wipe/ wash push button to VBatt D Output driver protected against short circuit digital debounced: t6 = 10 ms D Program Pin PP determines turn-on delay t4 during wipe-wash mode PP to GND: t4 = 0.8 s PP to VS: t4 = 0 s Interval mode: t4 = 0 s D D D D All time periods determined by RC-oscillator Turn-on time of relay t2 = 375 ms Adjustable interval pause, t3 = 0.8 to 22 s Dry wiping time t5 = 3.7 s D Inputs WASH and INT digital debounced, t1 = 100 ms D All inputs with integrated RF protection D Load-dump protected and interference protection according to ISO 7637-1/3 (DIN 40839) Ordering Information Extended Type Number U840B U840B-FP Package DIP8 SO8 Remarks Pin Description Pin 1 2 3 4 5 6 7 8 Symbol INT CO RO PP WASH VS GND OUT Function Interval input C oscillator R oscillator Program pin Wash signal Supply voltage Ground Output INT 1 8 OUT CO RO 2 7 GND U840B 3 6 Vs WASH 13299 PP 4 5 Figure 1. Pinning Rev. A2, 07-Jun-99 1 (8) U840B Block Diagram VS GND CP- comparator WASH + - Stabilization POR Load-dump - detection OUT Logic PP + - PP- comparator Interval comparator +- IO II Short-circuit comparator Shunt Oscillator INT 1.2 k CO RO C2 100 nF R6 39 k 13285 Figure 2. Block Diagram Circuit Description Power Supply The operation voltage is between VBatt = 9 to 16 V. For reasons of interference protection and surge immunity, the VS-Pin must be provided with an RC-circuit for current limitation in the event of overvoltages and for buffering in the event of voltage dips. Suggested dimensioning: R4 = l80 W C1 = 47 mF, refer to figure 4. 5%-capacitance with a TC of a MKT or MKS2 capacitance is suggested. The debouncing time t1, the turn-on time of the relay t2, the delay time t4, the dry wiping time t5 and the debouncing time t6 (short circuit detection) depend on the oscillator frequency f0 as follows: Debouncing time INT, WASH Turn-on time relay Interval pause Delay time wipe/wash mode Dry wiping time Debouncing time SC t1 = 24 to 32 l/f0 t2 = 120 l/f0 t3 = 296 1/fint t4 = 256 l/f0 t5 = 1184 l/f0 t6 = 2 to 3 1/f0 A smaller capacitance (10 mF) is sufficient if a diode against reversed battery is used. Oscillator In the circuit all timing sequences are derived from an RC oscillator which is charged by an internal current source and discharged by an integrated 500-W resistor. The basic frequency f0 is determined by the resistor R6 between Pin RO and GND and by the capacitance C2 between Pin CO and GND. The basic frequency is adjusted to f0 = 320 Hz (3.125 ms) by R6 = 39 kW and C2 = l00 nF. The tolerances and the temperature coefficients of the external devices determine the precision of the oscillator frequency. A l%-metallic-film resistor and a 2 (8) SC (short circuit) = collector current of relay driver IC > 500 mA. The clock counts of the debouncing times are not fixed because the switching of the signals and the system clock are asynchronous. The cause of the clock count variation is shown by the example of the short circuit debouncing (figure 3). The relay output is activated. The internal logic of the IC queries the short-circuit detection SC during the positive slope of the system clock CL. A 3-stage shift register is loaded by the positive slope of clock 1, 2 and 3 and the relay output is switched off. A short circuit signal which happened after the positive slope of clock 0 is just Rev. A2, 07-Jun-99 U840B recognized by the positive slope of clock l. Therefore the debouncing of the short signal continues two to three clock periods. CL The reset of the short-circuit buffer is possible if the switches interval and wipe/ wash are opened. A new attempt to switch on from INT or WASH cause again a switch off of the relay output, if the short-circuit still exists, otherwise the normal function is possible. The short-circuit detection is digital debounced about a period of l0 ms, so that shorter interference peaks at the power supply do not disable the output transistor because the interference peaks cause a higher current and pretend a short-circuit. During a load-dump impulse the output transistor is switched to conductive condition to prevent destruction. The short circuit detection is suppressed during the loaddump. SC t6 REL ON Figure 3. The debouncing of the short circuit detection These times can be adjusted (except t3) by variation of the external frequency determined devices. The oscillator frequency is calculated approximately with the following formula: f0 Interference Voltages and Load Dump The IC supply is protected by R4, C1 and an integrated Z-diode, the inputs are protected by a series resistor, integrated 14-V Z-diode and RF capacitor. The RC-configuration stabilizes the supply of the circuit during negative interference voltages so that the power-on reset (POR) does not arise and reset the function of the circuit. The relay output is protected against short interference peaks by an intergrated 28-V Z-diode, and during load-dump the relais output is switched to conductive condition for a battery voltage of greater than approximately 30 V. The output transistor is dimensioned so that it can absorb the current, produced by the load-dump pulse. [ 1 (0.832 C2 (300 ) R )) 6 The resistor between the interval switch and Pin INT determines the interval pause. During the interval pause the oscillator current source is switched to II, the frequency is determined by the interval resistors R1, R2 and R3. After the end of the interval pause, the oscillator switches again to the basic frequency f0. This procedure allows analog interval pause times between 0.8 s to 22 s. The dependence of the interval pause t3 from the interval resistor and therefore from the position of the switch A and B is shown in table 1. Table 1. Function table WASH L X L L L H B 1 X 2 3 X X A 1 X 1 1 2 X INT OFF X R1+R2 R1 GND X C 1 2 1 1 1 1 OUT OFF ON INT1 INT2 INT3 WIWA Continuous 11 cycles/min 27 cycles/min 44 cycles/min WASH Note Power-on Reset When the operating voltage is switched on, an internal power-on reset pulse (POR) is generated which sets the logic of the circuits to defined intinial condition. The relay output is disabled, the short circuit buffer is reset. Functional Description Interval Function By closing the interval switch A and/or B to GND (refer to function table l) for a time longer than the debouncing time t1 = l00 ms the relay is activated for a time of t2 = 375 ms, whereafter the interval pause begins. The park switch causes the wiper motor to move to its end position. The oscillator switches to a frequency which is determined by R1 to R3. At the end of the interval pause, t3, the relay is activated for a time t2. If, during the turn-on time of the relay, the switches A and B are opened (also the opening is debounced), then the time t2 runs off, one turn of the wiper arm is finished. Relay Output The relay output is an open-collector Darlington transistor with integrated 28-V Z-diode for limitation of the inductive cut-out pulse of the relais coil. The maximum static collector current must not exceed 300 mA and saturation voltage is typically 1.2 V for a current of 200 mA. The collector current is permanently measured by an integrated shunt and in the case of a short-circuit (IC > 500 mA) to VBatt, the relay output is disabled and latched in this status. Rev. A2, 07-Jun-99 3 (8) U840B Afterwards it the interval mode can be immediatly activated. The resistor between the interval switch and Pin INT determines the interval pause. The circuit U840B is so dimensioned, that a linear resistor-time-characteristic is used. Therefore, a doubling of the resistor evokes a doubling ot the interval pause. With the help of the resistor R3 the characteristic can be shifted parallel to its axis. The resistors R1 and R2 keep their values. An increasing of R3 shifts the characteristic to longer interval pauses. With it the interval pause can be adjusted to the demanded values by the dimensioning of R3 (see time diagram figure 5). The resistor R3 must not be smaller than l kW, otherwise the linearity of the resistor-time-characteristic cannot be guaranteed and too great a current flows from the input INT to GND. is sprayed on the windscreen before the wiper begins its job. PP to GND: 0.8 s delay time PP to VS: 0.1 s delay time Interval Wipe/Wash Mode The interval function is interrupted when the wash button is operated. In this case, the 0.8 s delay time t4 is reduced to the 100 ms debouncing time. Interval function begins after the wipe/ wash function is finished. Switch Contact Currents The contact current of the interval switch is 0.6 to 3 mA. Of course the current depends on the position of the interval switches. The contact current of the wash button is fixed by the internal resistance of the water pump. A pull-down resistor is integrated at the input WASH. Therefore, the input is connected to ground in the case of an open wash push button and a pump which is not connected. Wipe/ Wash Releasing and Program Pin PP When the wash button is activated, the relay is energized after the debouncing (Pin PP connects to VS). As long as the button is pushed, water is sprayed on the windscreen by the water pump. After releasing the wash button and after 100 ms reverse debouncing, the dry-wiping time t5 starts. At the end of the dry-wiping time, the relay output is disabled and the wiper motor is supplied via the park switch until park position is reached. If the input PP is connected to ground, the debouncing time of the WIWA mode is extended to 800 ms. The water V Batt Input Leakage Resistance With a resistor of more than 40 kW between INT to GND, the interval function is not activated. The wipe/ wash function is not activated by a leakage resistance > 10 kW and recommended external circuitry. R 4 180 R 5 10 k 8 7 6 5 C 1 47 F U840B Water pump M R 3 1.4 k R 1 1.3 k R 2 4.7 k 2 1 C 2 1 A 3 2 1 B 13286 1 2 3 4 R 6 39 k C 2 100 n F Wiper motor M Park switch Figure 4. Application circuit with interval and WIWA operation 4 (8) Rev. A2, 07-Jun-99 U840B Absolute Maximum Ratings Parameters Supply voltage Ambient temperature range Storage temperature range max. junction temperature t = 60 s t=1h Symbol VBatt VBatt Tamb Tstg TJ Value 24 18 -40 to +100 -55 to +125 150 Unit V V C C C Thermal Resistance Parameters Junction ambient DIP8 SO8 Symbol RthJA RthJA Value 120 160 Unit K/W K/W Electrical Characteristics VBatt = 13.5 V, Tamb = 25C, reference point ground (Pin 7) circuit with recommended external circuitry Parameters Test Conditions / Pin Symbol Supply Supply voltage range VBatt Supply current, all pushI6 buttons open Undervoltage threshold V6 POR Series resistance R4 Filter capacitance C1 Internal Z-diode I6 = 10 mA V6 INT input (Pin 1) Protective diode I1 = 10 mA V1 Internal capacitance CINT External resistance R3 Leakage resistance No interval function RL PP input (Pin 4) Protective diode I4 = 10 mA V4 Internal capacitance C4 Threshold V4 Pull-down resistance R4 WASH-input (Pin 5) Protective diode I5 = 10 mA V5 Internal capacitance CINT Threshold V5 Leakage resistance No Wash function RL Pull-down resistance Rpd Relay output with limitation of short circuit current (Pin 8) Saturation voltage I8 = 100 mA V8 Saturation voltage I8 = 200 mA V8 Relay coil resistance RREL Leakage current V8 = 22 V I8 Rev. A2, 07-Jun-99 Min. 9 Typ. Max. 16 3 4 180 47 14 14 25 1 40 14 13 0.5 VS 120 14 25 0.5 VS 10 20 1.0 1.2 60 10 60 Unit V mA V W mF V V pF kW kW V pF V kW V pF V kW kW V V W mA 5 (8) U840B Parameters Test Conditions / Pin Output current Normal operation Output pulse current Load dump Internal Z-diode I8 = 10 mA Short circuit current limitation Oscillator input Oscillator capacitance, Pin 2 ( 5%, TC MKT, MKS2) Oscillator resistance, Pin 3 ( 1% TC) Oscillator frequency Upper switching point Lower switching point Internal discharge resistance Times (external circuitry see oscillator input) Debouncing time WASH, INT Interval turn-on time Interval pause Depends on R1, R2 and R3 Turn-on delay Wipe/ wash mode, PP to GND Dry wiping time Debouncing time short circuit 1. Interval cycle time 2. Interval cycle time 1. Interval cycle time 16 14 12 t3 ( s ) 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 22 R ( kW ) R = RX + R3 R3 = 1.5 kW Tamb = 25C Symbol I8 I8 V8 I8 Min. Typ. Max. 300 1.5 Unit mA A V mA 28 500 C2 100 nF R6 f0 V2 V2 R2 39 320 3 1 500 kW Hz V V W t1 t2 t3 t4 + tD 67 300 0.8 800 110 450 22 1000 ms ms s ms t5 + tD t6 t2 + t3,1 t2 + t3,2 t2 + t3,3 3.4 6 1.2 1.98 4.9 4.2 11 1.5 2.45 6.1 s ms s s s Figure 5. Interval pause time vs. RPin1 C2 = 100 nF NP0, R6 = 39 kW metal film resistor 6 (8) Rev. A2, 07-Jun-99 U840B Package Information Package DIP8 Dimensions in mm 9.8 9.5 1.64 1.44 7.77 7.47 4.8 max 6.4 max 0.5 min 0.58 0.48 7.62 8 5 2.54 3.3 0.36 max 9.8 8.2 technical drawings according to DIN specifications 13021 1 4 Package SO8 Dimensions in mm 5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7 technical drawings according to DIN specifications 13034 1 4 Rev. A2, 07-Jun-99 7 (8) U840B Ozone Depleting Substances Policy Statement It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423 8 (8) Rev. A2, 07-Jun-99 |
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