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PD - 93982
REPETITIVE A ALANCHE AND dv/dt RATED V
HEXFET TRANSISTORS SURFACE MOUNT (LCC-18)
Product Summary
Part Number IRFE024 BVDSS 60V RDS(on) 0.15 ID 6.7A
IRFE024 60V, N-CHANNEL
The leadless chip carrier (LCC) package represents the logical next step in the continual evolution of surface mount technology. Desinged to be a close replacement for the TO-39 package, the LCC will give designers the extra flexibility they need to increase circuit board density. International Rectifier has engineered the LCC package to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. The lid of the package is grounded to the source to reduce RF interference.
LCC-18
Features:
! ! ! ! ! ! ! !
Surface Mount Small Footprint Alternative to TO-39 Package Hermetically Sealed Dynamic dv/dt Rating Avalanche Energy Rating Simple Drive Requirements Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C I DM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight For footnotes refer to the last page 6.7 4.2 27 14 0.11 20 110 5.5 -55 to 150 300 (for 5 S) 0.42(typical)
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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IRFE024
Electrical Characteristics
Parameter
BVDSS BV DSS/TJ RDS(on) VGS(th) gfs IDSS
@ Tj = 25C (Unless Otherwise Specified) Min
60 -- -- -- 2.0 4.3 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.068 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 -- -- 0.15 0.17 4.0 -- 25 250 100 -100 26 5.0 13 14 70 37 45 -- V V/C V S( ) A nA nC
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 10V, ID = 4.2A VGS =10V, ID =6.7A VDS = VGS, ID =250A VDS > 15V, IDS =4.2A VDS=48V, VGS=0V VDS =48V VGS = 0V, TJ = 125C VGS =20V VGS =-20V VGS =10V, ID= 6.7A VDS =30V VDD =30V, ID =6.7A, RG =7.5
Drain-to-Source Breakdown Voltage Temperature Coefficient of Breakdown Voltage Static Drain-to-Source On-State Resistance Gate Threshold Voltage Forward Transconductance Zero Gate Voltage Drain Current
IGSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
ns nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS =25V f = 1.0MHz
Ciss Coss Crss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
640 340 69
-- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr QRR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 6.7 27 2.3 200 1.9
Test Conditions
A
V nS c Tj = 25C, IS =6.7A, VGS = 0V Tj = 25C, IF = 6.7A, di/dt 100A/s VDD 50V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction to Case Junction to PC Board
Min Typ Max Units
-- -- -- -- 9.1 C/W 26" " "
Test Conditions
Soldered to a copper clad PC board
For footnotes refer to the last page
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IRFE024
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance Vs. Temperature
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IRFE024
13 a& b
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRFE024
V DS VGS RG
RD
D.U.T.
+
-V DD
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFE024
15V
VDS
L
DRIVER
RG
D.U.T
IAS tp
+ V - DD
A
10V 20V
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b.
Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRFE024
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 25V, starting TJ = 25C, Peak IL =6.7A,
Foot Notes:
ISD 6.7A, di/dt 110A/s,
VDD 60V, TJ 150C Suggested RG =7.5 Pulse width 300 s; Duty Cycle 2%
Case Outline and Dimensions -- LCC-18
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936 Data and specifications subject to change without notice. 1/01
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