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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
January 2007
HCPL0600, HCPL0601, HCPL0611, HCPL0637, HCPL0638, HCPL0639 High Speed-10 MBit/s Logic Gate Optocouplers
Single Channel: HCPL0600, HCPL0601, HCPL0611 Dual Channel: HCPL0637, HCPL0638, HCPL0639 Features
Compact SO8 package
tm
Description
The HCPL06XX optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output (single channel devices). The devices are housed in a compact small-outline package. This output features an open collector, thereby permitting wired OR outputs. The HCPL0600, HCPL0601 and HCPL0611 output consists of bipolar transistors on a bipolar process while the HCPL0637, HCPL0638, and HCPL0639 output consists of bipolar transistors on a CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of -40C to +85C. An internal noise shield provides superior common mode rejection.
Very high speed-10 MBit/s Superior CMR Logic gate output Strobable output (single channel devices) Wired OR-open collector U.L. recognized (File # E90700) VDE approval pending
Applications
Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface
Package Dimensions
0.164 (4.16) 0.144 (3.66)
SEATING PLANE
Pin 1
0.202 (5.13) 0.182 (4.63)
0.019 (0.48) 0.010 (0.25) 0.006 (0.16)
0.143 (3.63) 0.123 (3.13)
0.021 (0.53) 0.011 (0.28)
0.008 (0.20) 0.003 (0.08) 0.050 (1.27) TYP
0.244 (6.19) 0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
Note: All dimensions are in inches (millimeters)
(c)2006 Fairchild Semiconductor Corporation
1
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HCPL06XX Rev. 1.0.7
HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
N/C 1
8 VCC
+1 V
F1
8 VCC
+2 VF _ 3
7 VE
_2
7 V01
6 VO
_ V
3
6 V02
F2
N/C 4
5 GND
+4
5 GND
Single-channel circuit drawing (HCPL0600, HCPL0601 and HCPL0611)
Dual-channel circuit drawing (HCPL0637, HCPL0638 and HCPL0639)
TRUTH TABLE (Positive Logic)
Input
H L H L H* L*
Enable
H H L L NC* NC*
Output
L H H H L* H*
*Dual channel devices or single channel devices with pin 7 not connected. A 0.1F bypass capacitor must be connected between pins 8 and 5. (See note 1)
2 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (No derating required up to 85C)
Symbol
TSTG TOPR EMITTER IF VE VR PI DETECTOR Supply Voltage VCC (1 minute max) IO VO PO Output Current (each channel) Output Voltage (each channel) Collector Output Power Dissipation Single Channel Dual Channel Single Channel Dual Channel 7.0 50 15 7.0 85 85 V mW V mA DC/Average Forward Input Current (each channel) Enable Input Voltage Not to exceed VCC by more than 500mV Reverse Input Voltage (each channel) Power Dissipation Single Channel Dual Channel Single Channel Dual Channel Single Channel 5.5 5.0 45 V V mW 50 mA Storage Temperature Operating Temperature
Parameter
Value
-40 to +125 -40 to +85
Units
C C
Recommended Operating Conditions
Symbol
IFL IFH VCC VEL VEH TA N RL
Parameter
Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Operating Temperature Fan Out (TTL load) Output Pull-up Single Channel Dual Channel Single Channel only Single Channel only
Min.
0 *6.3 4.5 0 2.0 -40
Max.
250 15 5.5 0.8 VCC +85 8 5
Units
A mA V V V C TTL Loads
330
4K
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less
3 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = -40C to +85C Unless otherwise specified.)
Individual Component Characteristics
Symbol
EMITTER VF BVR VF/TA DETECTOR ICCH ICCL IEL IEH VEH VEL High Level Supply Current IF = 0mA, VCC = 5.5V IF = 10mA, VCC = 5.5V VE = 0.5 V Single Channel Dual Channel VE = 0.5 V Single Channel Dual Channel Single Channel Single Channel Single Channel Single Channel 2.0 0.8 10 15 13 21 -1.6 -1.6 mA mA V V mA mA Input Forward Voltage IF = 10mA TA = 25C Input Reverse Breakdown Voltage Input Diode Temperature Coefficient IR = 10A IF = 10mA 5.0 -1.5 1.8 1.75 V mV/C V
Parameter
Test Conditions
Min. Typ.** Max.
Unit
Low Level Supply Current
Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage
VCC = 5.5V, VE = 0.5V VCC = 5.5V, VE = 2.0V VCC = 5.5V, IF = 10mA VCC = 5.5V, IF = 10mA(2)
Switching Characteristics (TA = -40C to +85C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified.)
Symbol
TPLH TPHL
AC Characteristics
Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level (Fig. 20)
Test Conditions
RL = 350, CL = 15pF(3) TA = 25C TA = 25C
Device
All
Min.
20
Typ. Max. Unit
75 100 ns
RL = 350, CL = 15pF(4) (Fig. 20)
All
25
75 100
ns
|TPHL-TPLH| Pulse Width Distortion tr tf tELH
RL = 350, CL = 15pF (Fig. 20)
All Single Ch Dual Ch 50
35
ns ns
Output Rise Time (10-90%) RL = 350, CL = 15pF(5) (Fig. 20) Output Fall Time (90-10%) RL = 350, CL = 15pF(6) (Fig. 20) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(7) (Fig. 21) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15 pF(8) (Fig. 21) RL = 350, TA =25C, IF = 0mA, VOH (Min.) = 2.0 V(9) (Fig. 22, 23) |VCM| = 10V |VCM| = 50V
17
12 ns
Single Ch Dual Ch
5
20 ns
Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level)
HCPL0600 HCPL0601 HCPL0611 HCPL0600 HCPL0601 HCPL0611 HCPL0600 HCPL0637 HCPL0601 HCPL0638 5000
tEHL
20
ns
|CMH|
V/s
|VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000 |CMH| Common Mode Transient Immunity (at Output Low Level) RL = 350, TA =25C, IF = 7.5mA, VOL (Max.) = 0.8 V(10) (Fig. 22, 23) |VCM| = 10V |VCM| = 50V HCPL0600 HCPL0637 HCPL0601 HCPL0638 5000 V/s
|VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000
4 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40C to +85C Unless otherwise specified.) Symbol
IOH VOL IFT
DC Characteristics
High Level Output Current Low Level Output Voltage Input Threshold Current
Test Conditions
VCC = 5.5V, VO = 5.5 V, IF = 250A, VE = 2.0V(2) VCC = 5.5V, IF = 5mA, VE = 2.0V, IOL = 13mA(2) VCC = 5.5V, VO = 0.6V, VE = 2.0V, IOL = 13mA
Min.
Typ.**
Max.
100 0.6 5
Unit
A V mA
Isolation Characteristics (TA = -40C to +85C Unless otherwise specified.) Symbol
II-O
Characteristics
Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Resistance (Input to Output) Capacitance (Input to Output)
Test Conditions
Relative humidity = 45%, TA = 25C, t = 5s, VI-O = 3000 VDC(11) RH < 50%, TA = 25C, II-O 2A, t = 1 min.(11) VI-O = 500V(11) f= 1MHz(11)
Min.
Typ.**
Max.
1.0*
Unit
A
VISO RI-O CI-O
3750 1012 0.6
VRMS pF
** All typical values are at VCC = 5 V, TA = 25C
Notes:
1. The VCC supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device. 2. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 3. tPLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 4. tPHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 5. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 6. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 7. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 8. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 9. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/s). 10. CML - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/s). 11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
5 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only)
Fig. 1 Forward Current vs. Input Forward Voltage
100 6 TA = 25C VCC = 5V
Fig. 2 Output Voltage vs. Forward Current
IF - FORWARD CURRENT (mA)
10 TA = 85C 1 TA = 70C TA = 25C 0.1 TA = 0C TA = -40C
5
Vo - OUTPUT VOLTAGE (V)
4 RL = 350 3 RL = 1k 2
0.01
1
0.001 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7
0 0 1 2 3 4 5
VF - FORWARD VOLTAGE (V)
IF - FORWARD INPUT CURRENT (mA)
Fig. 3 Input Threshold Current vs. Temperature
5
Fig. 4 High Level Output Current vs. Temperature
16
ITH - INPUT THRESHOLD CURRENT (mA)
VCC = 5V VO = 0.6V 4
IOH - HIGH LEVEL OUTPUT CURRENT (A)
14 12 10 8 6 4 2 0 VO = VCC = 5.5V VE = 2V IF = 250 A -40 -20 0 20 40 60 80 100
3 RL = 350 2 RL = 1K
1
0 -40 -20 0 20 40 60 80 100
TA - TEMPERATURE (C)
TA - TEMPERATURE (C)
6 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600, and HCPL0601 and HCPL0611 only)
Fig. 5 Low Level Output Voltage vs. Temperature
0.8 V = 5.5V
Fig. 6 Low Level Output Current vs. Temperature
60
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
CC
IOL - LOW LEVEL OUTPUT CURRENT (mA)
V 55 50 45 40
CC
= 5V
0.7 0.6 0.5
VE = 2V IF = 5mA
VE = 2V VOL = 0.6V
IF = 10-15mA
IO = 12.8mA 0.4 0.3 0.2 0.1 0.0 -40 -20 0 20 40 60 80 100 IO = 6.4mA IO = 9.6mA IO = 16mA
IF = 5mA 35 30 25 20 -40 -20 0 20 40 60 80 100
TA - TEMPERATURE (C)
TA - TEMPERATURE (C)
Fig. 7 Propagation Delay vs. Temperature
100 V 90
CC
Fig. 8 Propagation Delay vs. Pulse Input Current
90 V
CC
= 5V
= 5V
IF = 7.5mA
TP - PROPAGATION DELAY (ns)
80 70 60 50 40 30 20 -40 -20 0 20 40 60 80 100 tPLH RL = 350 tPHL RL = 350 & 1k tPLH RL = 1k
TP - PROPAGATION DELAY (ns)
80
TA = 25C
70
tPLH RL = 1k
60 tPLH RL = 350
50
40
tPHL RL = 350 & 1k
30
20 5 7 9 11 13 15
TA - TEMPERATURE (C)
IF - PULSE INPUT CURRENT (mA)
7 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only)
Fig. 9 Typical Enable Propagation Delay vs. Temparature
90 V = 5V
Fig. 10 Typical Rise and Fall Time vs. Temperature
240 V 200
CC
tE - ENABLE PROPAGATION DELAY (ns)
CC
= 5V
80 70 60 50 40 30 20 10 0 -40
VEH = 3V VEL = 0V IF = 7.5mA
IF = 7.5mA
tELH RL = 1k
tf - FALL TIME (ns)
tr RL = 1k 160
tELH RL = 350
120
80 tr RL = 350 40 tf RL = 350 & 1k -40 -20 0 20 40 60 80 100
tEHL RL = 350 & 1k
0
-20 0 20 40 60 80 100
TA - TEMPERATURE (C)
TA - TEMPERATURE (C)
Fig. 11 Typical Pulse Width Distortion vs. Temperature
40 V = 5V
PWD - PULSE WIDTH DISTORTION (ns)
CC
35 30 25
IF = 7.5mA
RL = 1k 20 15 10 RL = 350 5 0 -40 -20 0 20 40 60 80 100
TA - TEMPERATURE (C)
8 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only)
Fig. 12 Input Forward Current vs. Forward Voltage
100 ITH - INPUT THRESHOLD CURRENT (mA)
Fig. 13 Input Threshold Current vs. Ambient Temperature
2.5
VCC = 5.5V VO = 0.6V
IF - FORWARD CURRENT (mA)
10
TA = 100C
2.0
1
TA = 85C TA = -40C
1.5
RL = 350
0.1
TA = 0C TA = 25C
1.0
RL = 1k
0.01
0.5
RL = 4k
0.001 0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
0.0 -40
-20
0
20
40
60
80
100
VF - FORWARD VOLTAGE (V)
TA - AMBIENT TEMPERATURE (C)
Fig. 14 High Level Output Current vs. Ambient Temperature
20 IOL - LOW LEVEL OUTPUT CURRENT (mA) IOH - HIGH LEVEL OUTPUT CURRENT (nA)
VO = VCC = 5.5V VE = 2V (Single Channel Only) IF = 250 A
Fig. 15 Low Level Output Current vs. Ambient Temperature
40
V
CC
= 5.5V
16
35
VE = 2V (Single Channel Only) VOL = 0.6V IF = 5 - 15mA
30
12
25
8
20
4
15
0 -40 -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C)
10 -40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
Fig. 16 Low Level Output Voltage vs. Ambient Temperature
0.6
CC
Fig. 17 Pulse Width Distortion vs. Ambient Temperature
70
V
PWD - PULSE WIDTH DISTORTION (ns)
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
V
= 5.5V
CC
= 5V
0.5
VE = 2V (Single Channel Only) IF = 5mA
60 50 40 30 20 10 0
IF = 7.5mA
RL = 4k
0.4
IO = 12.8mA
IO = 16mA
0.3
0.2
IO = 6.4mA
IO = 9.6mA
RL = 1k RL = 350
0.1
0.0 -40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
TA - AMBIENT TEMPERATURE (C)
9 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only)
Fig. 18 Propagation Delay vs. Ambient Temperature
120
V
CC
Fig. 19 Rise and Fall Times vs. Ambient Temperature
350 7
V
CC
= 5V
= 5V
TP - PROPAGATION DELAY (ns)
100
IF = 7.5mA
300 250
tPLH RL = 1k tPLH RL = 4k
IF = 7.5mA tr - RL = 4k
6 5 4 3
tf - RL = 350, 1k, 4k
tr - RISE TIME (ns)
80
200 150 100
tr - RL = 1k
60
40
tPHL
tPLH RL = 350 RL = 350, 1k, 4k
2 1
tr - RL = 350
20
50 0
0 -40 -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C)
0 -40 -20 0 20 40 60 80
100
TA - AMBIENT TEMPERATURE (C)
10 HCPL06XX Rev. 1.0.7
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tf - FALL TIME (ns)
HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Pulse Gen. tf = tr = 5 ns ZO = 50 1 2 Input Monitor (IF) 47 3 4 VCC 8 .1f 7 Bypass 6 GND 5
+5V
Pulse Gen. ZO = 50 tf = tr = 5 ns IF 1
I F = 7.5 mA
Dual Channel VCC 8 RL 2 3 7 6 5 0.1F Bypass Output VO Monitoring Node +5 V
Input (I F) t PHL Output (VO ) tPLH
I F = 3.75 mA
RL Output (VO) CL
Input Monitoring Node RM
1.5 V 90% 10% tf tr
CL* 4 GND
Output (VO )
Test Circuit for HCPL0600, HCPL0601 and HCPL0611
Test Circuit for HCPL0637, HCPL0638 and HCPL0639
Fig. 20 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse Generator tr = 5ns Z O = 50
Input Monitor (V E) +5V
3.0 V VCC
1
7.5 mA
8 7 6
CL RL Output (VO )
Input (VE ) t EHL t ELH
1.5 V
2 3 4
.1f bypass
Output (VO ) 1.5 V
GND
5
Fig. 21 Test Circuit tEHL and tELH.
11 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
VCC
1
IF A B VFF
8
+5V
2
7
0.1f bypass
350 Output (VO)
3
6
4
GND VCM Pulse Gen
5
Test Circuit for HCPL0600, HCPL0601, and HCPL0611
Peak VCM 0V
5V Switching Pos. (A), IF = 0 VO VO (Min)
CM H
VO (Max) Switching Pos. (B), IF = 7.5 mA CM L
VO 0.5 V
Fig. 22 Test Circuit Common Mode Transient Immunity (HCPL0600, HCPL0601 and HCPL0611)
12 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
IF Dual Channel B A 1 2 VFF 3 4 GND VCM + - Pulse Generator ZO = 50 Test Circuit for HCPL0637, HCPL0638 and HCPL0639 6 5 VCC 8 RL 7 0.1F Bypass +3.3V Output VO Monitoring Node
VCM 0V
Peak
3.3V Switching Pos. (A), IF = 0 VO VO (Min)
CM H
VO (Max) Switching Pos. (B), IF = 7.5 mA CM L
VO 0.5 V
Fig. 23 Test Circuit Common Mode Transient Immunity (HCPL0637, HCPL0638 and HCPL0639)
13 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
8-Pin Small Outline
0.024 (0.61)
0.060 (1.52) 0.275 (6.99) 0.155 (3.94)
0.050 (1.27)
14 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
Option
No Suffix V R1 R1V R2 R2V
Order Entry Identifier
HCPL0600 HCPL0600V HCPL0600R1 HCPL0600R1V HCPL0600R2 HCPL0600R2V
Description
Shipped in tubes (50 units per tube) VDE0884 (pending approval) Tape and Reel (500 units per reel) VDE0884 (pending approval), Tape and Reel (500 units per reel) Tape and Reel (2500 units per reel) VDE0884 (pending approval), Tape and Reel (2500 units per reel)
Marking Information
1
600 V X YY S
2
6
3
4
5
Definitions
1 2 3 4 5 6 Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) One digit year code, e.g., `3' Two digit work week ranging from `01' to `53' Assembly package code
15 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
Carrier Tape Specifications
8.0 0.10 3.50 0.20 0.30 MAX 4.0 0.10 2.0 0.05 O1.5 MIN 1.75 0.10
5.5 0.05 8.3 0.10 12.0 0.3 5.20 0.20
0.1 MAX
6.40 0.20
O1.5 0.1/-0
User Direction of Feed
Reflow Profile
300 280 260 240 220 200 180 Time above 183C = 90 Sec >245C = 42 Sec 260C
C
160 140 120 100 80 60 40 20 0 0 60 120 180 33 Sec 1.822C/Sec Ramp up rate
270
360
Time (s)
16 HCPL06XX Rev. 1.0.7
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HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers
FAIRCHILD SEMICONDUCTOR TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLT TM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACT(R) FAST(R) FASTrTM FPSTM FRFETTM DISCLAIMER
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FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I22
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
17 HCPL06XX Rev. 1.0.7
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