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| 00W099A T one generator LSI for cellular phones BU8766FV Description The BU8766FV is a tone generator IC for producing a triple chord that has both a RAM and sequencer to reduce the load of CPU soft. Cellular phones can give a musical performance by down-loading melody data from the C-MIDI format. This IC corresponds to three master clocks and has an adjustment function for a parameter needed to generate a chord. Waveform parameter can be selected from sine wave and special square wave. Features 1) Triple chord can be generated by control from CPU. 2) CPU soft load can be decreased by incorporating RAM and sequencer. 3) RAM 1kByte as a buffer for download data. 4) Can adjust parameter needed to generate a chord. 5) DTMF generating function 6) Can select a wave parameter for generating sound. (sine wave/special square wave) 7) Control from CPU by serial data Applications Dimension *i Units : mm*j 5.0*} 0.2 16 6.4*} 0.3 4.4*} 0.2 9 1. 15*} 0.1 1 8 0. 1 0.65 0.22*} 0. 1 0.3Min. 0. 1 SSOP-B16 Cellular phones with a function to register melody at receiving the call *oe Absolute Maximum Ratings*i Ta=25C*j Parameter Pow suppl y vol t age er Pow di ssi pat i on er O at i ng t em at ur e r ange per per St or age t em at ur e r ange per Symbol VDD Pd Topr Tstg Limits *| 0. 3 * *{ 4. 5 450 *| 40 * *{ 85 *| 50 * *{ 125 *- Unit V mW C C *- Derating : 4.5mW*^ C for operation above Ta=25C *oe Recommended Operating Conditions*i Ta=25C*j Parameter Pow suppl y vol t age er Symbol VDD Min. 2. 2 Typ. 2. 5 Max. 3. 6 Unit V November, 2000 0.15*} 0. 1 *oe Electrical characteristics*i Unl ess ot her wi se not ed: Ta=25C*j Parameter H gh l evel i nput vol t age i Low l evel i nput vol t age H gh l evel i nput cur r ent i Low l evel i nput cur r ent H gh l evel out put vol t age i Low l evel out put vol t age VR pi n vol t age EF AN U pi n vol t age OT Symbol VI H VI L IIH IIL VO H VO L VAG D N VO T U ID1 D C r cui t cur r ent i ID2 D ID3 D ID4 D VR pi n r i se t i m EF e tR VR Min. 0. 7VD D *| *| *| 10 VDD*| 0. 3 *| Typ. *| *| *| *| *| *| Max. *| 0. 3VD D 10 *| *| G ND*{ 0. 3 Unit V V E A E A V V V V E A E A E A E A m S VI H D =VD VI H N =G D I O =*| 0. 8m H A IO L=0. 8m A I O T=0A*i N l oad*j U o I O T=0A*i N l oad*j U o R ESET=L R ESET=H O her t O her i nput s=L t M LK=2. 688M z C H M LK=3. 25M z C H Conditions * D gi t al D char act er i st i cs* i C * Anal og D char act er i st i cs* C 0. 475VDD 0. 5VD 0. 525VDD D 0. 47VDD 0. 5VD 0. 53VD D D *| *| *| *| *| *| 1500 1700 2500 25 1 2200 2500 3400 40 * W e char act er i st i cs*i VD =2. 5V*j* hol D N l oad o i nput s=L M LK=4. 92M z C H At C EF=1E R VR F, ESET=L* H Block Diagram SRAM TEST0 1 Test wd adr rd 1k*~ 8bits RAM I/F SI 2 SO 3 TEST1 4 SCLK 5 Serial I/F Timing Gen. Wave Reg. WAVE Gen. setting-data WAVE Gen. setting-data *{ DAC 9bits IPF fc=20kHz 16 ANOUT VDD 6 VDD clksel WAVE Gen. cpuclk 15 VREF setting-data 14 GND GND MCLK 7 CLK Gen. compact*@ MIDI sequencer wavsel wavclk 13 EN 12 PORT 11 INT 10 PAGE RESET 8 BU8766FV 9 PINT |
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