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| AP2623Y Advanced Power Electronics Corp. Low Gate Charge Low On-resistance Surface Mount Package G1 S1 G2 D1 P-CHANNEL ENHANCEMENT MODE POWER MOSFET D2 BVDSS RDS(ON) ID -30V 170m - 2A S2 Description D2 Advanced Power MOSFETs utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. The SOT-26 package is universally used for all commercial-industrial applications. S1 D1 G2 S2 G1 SOT-26 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating -30 20 -2 -1.6 -20 1.2 0.01 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 110 Unit /W Data and specifications subject to change without notice 200614041 AP2623Y Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=-250uA Min. -30 -1 - Typ. -0.02 2 2.8 0.5 1.4 5 6 15 3 150 42 32 Max. Units 170 280 -3 -1 -25 100 4.5 240 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=-1mA RDS(ON) Static Drain-Source On-Resistance2 VGS=-10V, ID=-2A VGS=-4.5V, ID=-1.6A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=-250uA VDS=-5V, ID=-2A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS= 20V ID=-2A VDS=-24V VGS=-4.5V VDS=-15V ID=-1A RG=3.3,VGS=-10V RD=15 VGS=0V VDS=-25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 2 Test Conditions IS=-1A, VGS=0V IS=-2A, VGS=0V, dI/dt=100A/s Min. - Typ. 20 13 Max. Units -1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board, t<5sec ; 180/W when mounted on min. copper pad. AP2623Y 20 12 T A = 25 o C 15 - 10 V -7.0V -ID , Drain Current (A) T A = 150 o C 10 - 10 V -7.0V -ID , Drain Current (A) 8 10 -5.0V -4.5V -5.0V -4.5V 6 4 5 2 VV =-3.0V G =-3.0V G 0 0 1 2 3 4 5 6 7 0 0 1 2 3 4 V G =-3.0V 5 6 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 230 1.8 210 I D = - 1.6 A T A =25 o C 1.6 I D =- 2 A V G = - 10V RDS(ON) (m ) 1.4 190 Normalized RDS(ON) 1.2 170 1.0 150 0.8 130 2 4 6 8 10 0.6 -50 0 50 100 150 -V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 1.6 2.0 1.5 Normalized -VGS(th) (V) 1.4 1.2 -IS(A) T j =150 o C 1.0 T j =25 o C 0.8 0.5 0.0 0 0.2 0.4 0.6 0.8 1 1.2 0.4 -50 0 50 100 150 -V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP2623Y f=1.0MHz 12 1000 -VGS , Gate to Source Voltage (V) 10 V DS =-24V I D =-2A C iss C (pF) 8 6 100 4 C oss C rss 2 0 0 1 2 3 4 5 10 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) -V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (Rthja) Duty factor=0.5 0.2 10 0.1 0.1 0.05 -ID (A) 1ms 1 0.02 0.01 Single Pulse PDM t T Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 180/W 10ms 0.01 0.1 T A =25 o C Single Pulse 100ms 1s DC 10 100 0.01 0.1 1 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG -4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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