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| 54LVTH162245 16-Bit Bus Transceivers with 3-State Outputs / / / / Memory Logic Diagram FEATURES: * A-Port outputs have equivalent 22- series resistors, so no external resistors are required * Support mixed-mode signal operation (5V input and output voltages with 3.3V VCC) * Support unregulated battery operation down to 2.7V * Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25 C * IOFF and power-up 3-state support hot insertion * Bus hold on data inputs eliminates the need for external pullup/pulldown resistors * Distributed VCC and GND pin configuration minimizes highspeed switching noise * Flow-through architecture optimizes PCB layout * Total dose hardness: - > 100 krad (Si), depending upon space mission * Package: 48 pin RAD-PAK(R) flat pack DESCRIPTION: Maxwell Technologies' 54LVTH162245 devices are 16-bit (dual-octal) non-inverting 3-state transceivers designed for low-voltage (3.3V) VCC operation, but with the capability to provide a TTL interface to a 5V system environment. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data transmission from the A bus to the B bus or form the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output enable (OE) input can be used to disable the device so that the buses are effectively isolated. The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot. Maxwell Technologies' patented RAD-PAK(R) packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S. 11.15.02 Rev 2 All data sheets are subject to change without notice 1 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs . 54LVTH162245 TABLE 1. PINOUT DESCRIPTION PIN 1, 24 2, 3, 5, 6, 8, 9, 11, 12 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 13, 14, 16, 17, 19, 20, 22, 23 25, 48 26, 27, 29, 30, 32, 33, 35, 36 37, 38, 40, 41, 43, 44, 46, 47 SYMBOL 1DIR - 2DIR 1B1 - 1B8 GND VCC 2B - 2B8 2OE - 1OE 2A8 - 2A1 1A8 - 1A1 DESCRIPTION Direction Control Output Ground Supply Voltage Output Output Enable Input Input TABLE 2. 54LVTH162245 ABSOLUTE MAXIMUM RATINGS 1 PARAMETER Supply voltage range Input voltage range 2 Memory SYMBOL VCC VI VO VO IO MIN -0.5 -0.5 -0.5 -0.5 --- MAX 4.6 7 7 VCC + 0.5 96 30 UNIT V V V V mA Voltage range applied to any output in the high-impedance or power-off state 2 Voltage range applied to any output in the high state 2 Current into any output in the low state B Port A Port Current into any output in the high state 3 B Port A Port Input clamp current Output clamp current Thermal resistance Operating temperature range Storage temperature range Power Dissipation IO --IIK (VI < 0) IOK (VO < 0) -50 -50 --55 -65 -48 30 --5 125 150 1 mA mA mA C/W JC TA TS PD C C W 1. Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. This current flows only when the output is in the high state and VO > VCC. 11.15.02 Rev 2 All data sheets are subject to change without notice 2 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs TABLE 3. DELTA LIMITS PARAMETER ICC(OL) ICC(OH) ICC(OD) VARIATION 54LVTH162245 10% of specified value in Table 5 10% of specified value in Table 5 10% of specified value in Table 5 TABLE 4. 54LVTH162245 RECOMMENDED OPERATING CONDITIONS 1 PARAMETER Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Power-up ramp rate Operating temperature A port B port A port B port Outputs enabled IOL SYMBOL VCC VIH VIL VI IOH MIN 2.7 2 -------200 -55 MAX 3.6 -0.8 5.5 -12 -24 12 48 10 -125 ns/V s/V C UNIT V V V V mA Memory mA t/v t/VCC TA 1. All unused control inputs of the device must be held at high or low ensure proper device operation. TABLE 5. 54LVTH162245 DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V 10%, TA = -55 TO +125 C, UNLESS OTHERWISE SPECIFIED) PARAMETER Input Clamp Voltage High-Level Output Voltage SYMBOL VIK VOH VCC = 2.7 VCC = 2.7V to 3.6V VCC = 3V VCC = 2.7V to 3.6V VCC = 2.7V VCC = 3V, TEST CONDITIONS II = -18 mA IOH = -100 A IOH = -12 mA IOH = -100 A IOH = -8 mA IOH = -24 mA B Port 1, 2, 3 A Port SUBGROUPS 1, 2, 3 1, 2, 3 MIN -VCC -0.2 2 VCC -0.2 2.4 2 MAX -1.2 ---UNIT V V 11.15.02 Rev 2 All data sheets are subject to change without notice 3 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs 54LVTH162245 SUBGROUPS MIN --MAX 0.2 0.8 0.2 0.5 0.4 0.5 0.55 UNIT V TABLE 5. 54LVTH162245 DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V 10%, TA = -55 TO +125 C, UNLESS OTHERWISE SPECIFIED) PARAMETER Low-Level Output Voltage SYMBOL VOL VCC = 2.7V to 3.6V VCC = 3V VCC = 2.7V VCC = 3V TEST CONDITIONS IOL = 100 A IOL = 12 mA IOL = 100 A IOL = 24 mA IOL = 16 mA IOL = 32 mA IOL = 48 mA Input Current II VCC = 3.6V VCC = 0 or 3.6V VCC = 3.6V VI = VCC or GND VI = 5.5V VI = 5.5V VI = VCC VI = 0 Hold Current Power Up Current Power Down Current Supply Current II(HOLD) VCC = 3V IOZPU ICC 2 A Port 1, 2, 3 B Port 1, 2, 3 ---- Control inputs A or B Ports 1, 2, 3 --- 1 10 20 A 1, 2, 3 --- Memory 5 -10 --100 100 0.19 5 0.19 0.3 8 15 mA pF pF A A mA A 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 75 -75 --------- VI = 0.8V VI = 2V A Inputs VCC = 0 to 1.5V, VO = 0.5V to 3V, OE = don't care VCC = 1.5V to 0, VO = 0.5V to 3V, OE = don't care VCC = 3.6V IO = 0 VI = VCC or GND Outputs high Outputs low Outputs disabled IOZPD2 Delta Supply Current Input Capacitance Input Output Capacitance ICC 1 VCC = 3V to 3.6V, One input at VCC -0.6V, Other inputs at VCC or GND CI2 CO2 VI = 3V or 0 VO = 3V or 0 1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 2. Guaranteed by design. 11.15.02 Rev 2 All data sheets are subject to change without notice 4 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs 54LVTH162245 TABLE 6. 54LVTH162245 AC ELECTRICAL CHARACTERISTICS (VCC = 3.3V 10%, TA = -55 TO +125 C, UNLESS OTHERWISE SPECIFIED) SYMBOL PARAMETER Propagation Delay Time A to B Propagation Delay Time B to A Output Enable Time OE to B Output Enable Time OE to A Output Disable Time OE to B Output Disable Time OE to A Output Skew tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tsk(o) SUBGROUPS MIN 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 1 1 1 1 1 1 1 1 1 1 1 1 -MAX 3.5 3.5 4.3 4.2 4.8 4.8 5.5 5.4 5.5 5.5 5.8 6.3 -MIN -------------MAX 4 3.9 5.3 4.5 5.9 5.5 7.2 6.4 5.8 5.8 6.5 6.3 -ns ns ns ns ns ns ns VCC = 3.3V 0.3 VCC = 2.7V UNIT Memory TABLE 7. FUNTION TABLE (EACH 8-BIT SECTION) INPUTS OE L l H DIR L H X B data to A bus A data to B bus Isolation OPERATION 11.15.02 Rev 2 All data sheets are subject to change without notice 5 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs FIGURE 1. LOAD CIRCUIT 54LVTH162245 Figure Note: 1. CL includes probe and jig capacitance. PARAMETER MEASUREMENT INFORMATION TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open Memory 6V GND FIGURE 2. PULSE DURATION FIGURE 3. SETUP AND HOLD TIMES 11.15.02 Rev 2 All data sheets are subject to change without notice 6 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs 54LVTH162245 FIGURE 4. PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS FIGURE 5. ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Memory Figure Note: 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by The output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 11.15.02 Rev 2 All data sheets are subject to change without notice 7 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs 54LVTH162245 48 LDFP Memory 48 PIN RAD-PAK(R) FLAT PACKAGE SYMBOL MIN A b c D E E1 E2 E3 e L Q S1 N 0.275 0.013 0.005 0.144 0.008 0.004 -0.370 -0.200 0.075 DIMENSION NOM 0.160 0.010 0.006 0.620 0.380 -0.210 0.085 0.025 BSC 0.285 0.019 0.018 48 0.295 0.025 -MAX 0.165 0.014 0.007 0.640 0.390 0.410 0.220 -- Note: All dimensions in inches 11.15.02 Rev 2 All data sheets are subject to change without notice 8 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs Important Notice: 54LVTH162245 These data sheets are created using the chip manufacturer's published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies' liability shall be limited to replacement of defective parts. Memory 11.15.02 Rev 2 All data sheets are subject to change without notice 9 (c)2002 Maxwell Technologies All rights reserved. 16-Bit Bus Transceivers with 3-State Outputs Product Ordering Options Model Number 54LVTH162245 RP F X Feature 54LVTH162245 Option Details Screening Flow Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55C, +25C, +125C) E = Engineering (testing @ +25C) Memory Package F = Flat Pack Radiation Feature RP = RAD-PAK(R) package Base Product Nomenclature 16-Bit Bus Transceivers with 3State Outputs 11.15.02 Rev 2 All data sheets are subject to change without notice 10 (c)2002 Maxwell Technologies All rights reserved. |
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