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ASAHI KASEI [AKD4101A-B] AKD4101A-B AK4101A Evaluation Board Rev.0 GENERAL DESCRIPTION The AKD4101A-B is an evaluation board for the AK4101A, 192kHz DIT. The AKD4101A-B has the interface with AKM's A/D converter evaluation boards and AKM's DIR evaluation boards. Therefore, it is easy to evaluate the AK4101A. The AKD4101A-B also has the digital audio interface and can achieve the interface with digital audio systems via optical link, BNC unbalance or XLR balance connector. Ordering guide AKD4101A-B --Evaluation board for AK4101A (A cable for connecting with printer port of IBM-AT compatible PC and a control software are packed with this. The control software does not operate on Windows NT.) FUNCTION Digital interface Compatible with 2 types of interface - Direct interface with AKM's ADC, DIR evaluation boards by 10pin header - Optical/BNC/XLR output Serial control data I/F - 1 input/output port (10-pin port) 5V GND Control AK4101A Opt TX C,U,V Serial Data in (For DIT) Figure 1. AKD4101A-B Block Diagram *Circuit diagram and PCB layout are attached at the end of this manual. 2005/10 ASAHI KASEI [AKD4101A-B] Evaluation Board Manual Operating sequence (1) Set up the power supply lines. [+ 5V] (Red) = 5V [GND] (Black) = 0V (2) Set up the evaluation mode and jumper pins. (Refer to the following section.) (3) Connect cables. (Refer to the following section.) (4) Power on. The AK4101A should be reset once bringing PDN(SW2) "L" upon power-up. Evaluation modes (1) Evaluation for DIT Serial Data in(10pin port) - AK4101A - S/PDIF out(optical, XLR or BNC) MCLK BICK LRCK DAUX MCLK BICK LRCK DAUX ADC PORT5 (10pin Header) AK4101A (DIT) Optical, XLR or BNC connector S/PDIF AKD4101A-B MCLK, BICK, LRCK and DAUX are input via 10pin header (PORT5: DIT). The AKD4101A-B can be connected with the AKM's ADC evaluation board via 10-line cable. a. Set-up of a Bi-phase output signal Connector JP19 (TXP) Optical (PORT4) OPT XLR (J3) XLR BNC (J4) BNC Table 1. Set-up of TXP a-1. Set-up of TXP/TXN TX TXP1/TXN1 TXP2/TXN2 TXP3/TXN3 TXP4/TXN4 JP21 (TXP) Sub 4-5 pin (short) 3-6 pin (short) 2-7 pin (short) 1-8 pin (short) JP22 (TXN) Sub 4-5 pin (short) 3-6 pin (short) 2-7 pin (short) 1-8 pin (short) Table 2. Set-up of TXP/TXN 2005/10 ASAHI KASEI [AKD4101A-B] b. Set-up of clock input and output The used signals are MCLK, LRCK, BICK and SDTI (DAUX). The signal level outputted and inputted from PORT5 is 5V. Clock PORT MCLK PORT5 BICK PORT5 LRCK PORT5 SDTI PORT5 (DAUX) Table 3. Clock input/output CKS1 pin (SW3_5) CKS1 bit 0 0 1 1 CKS0 pin (Sub_JP20) CKS0 bit MCLK fs (max) Default 0 128fs 28k-192 kHz 1 256fs 28k-108 kHz 0 384fs 28k-54 kHz 1 512fs 28k-54 kHz Table 4. Master Clock Frequency Select b-1. Set-up of input/output of BICK and LRCK Please set up SW 3_8 (DIT_I/O) according to the setup of audio format of AK4101A (Refer to Table 6). Audio format SW3_8 (DIT_I/O) Slave mode 0 Master mode 1 Table 5. Set-up of DIT_I/O c. Set-up of audio data format It sets up by SW 1_2, SW 1_3 and SW1_4 in synchronous mode. Please set up DIF2-0 bit in asynchronous mode. Mode 0 1 2 3 4 5 6 7 DIF2 pin (SW1_4) DIF2 bit 0 0 0 0 1 1 1 1 DIF1 pin (SW1_3) DIF1 bit 0 0 1 1 0 0 1 1 DIF0 pin (SW1_2) DIF0 bit 0 1 0 1 0 1 0 1 SDTI 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S Table 6. Audio format LRCK H/L H/L H/L H/L H/L L/H H/L L/H I/O I I I I I I O O BICK 64fs 64fs 64fs 64fs 64fs 64fs 64-128fs 64-128fs I/O I I I I I I O O Default Default 2005/10 ASAHI KASEI [AKD4101A-B] B, C, U, V Inputs (synchronous mode) At synchronous mode (ANS=1), C(channel status), U(user data) and V(validity) are input via 10pin header (PORT3: BCUV). BLS is output at normal mode (TRANS=0), and is input at audio routing mode (TRANS=1). In case of audio routing mode, BLS, C, U an V can be directly input from the AKD4114 via 10-line flat cable. The pin layout of PORT3 is shown in Figure 2. PORT3 BCUV 9 BLS VD GND C U V 1 GND GND GND 10 Figure 2. PORT3 pin layout Serial control The AK4101A can be controlled by pins at synchronous mode (ANS=1) and by internal register at asynchronous mode (ANS=0). Synchronous/Asynchronous mode is set as Table 7. Mode Synchronous Asynchronous SW1-6 (ANS) JP18 (SDA/CDTO) FS3=1: Short "CDTO/CM0=H" side. ON FS3=0: Short "CM0=L" side. OFF Short "CDTO/CM0=H" side. Table 7. Synchronous/Asynchronous mode Sub_JP20 (ANS) Open. Short. Default At asynchronous mode (ANS=0), the AK4101A can be controlled via printer port (parallel port) of IBM-AT compatible PC. Connect PORT6 (uP-I/F) with PC by 10-line flat cable packed with the AKD4101A-B. Take care of the direction of connector. There is a mark at pin#1. The pin layout of PORT6 is shown in Figure 3. PORT6 uP I/F 2 GND GND GND GND GND 2 GND 10 1 Figure 3. PORT6 pin layout Control software is packed with the AKD4101A-B. The software manual is included in this eva-board manual. CDTO CCLK CSN NC CDTI 9 2005/10 ASAHI KASEI [AKD4101A-B] Toggle switch set-up SW2 PDN Reset switch for AK4101A. Set to "H" during normal operation. Bring to "L" once after the power is supplied. DIP switch (SW1) set-up: -off- means "L" No. Switch Name Function 1 IPS0 Don't care 2 DIF0 Set-up of DIF0 pin. (synchronous mode) 3 DIF1 Set-up of DIF1 pin. (synchronous mode) 4 DIF2 Set-up of DIF2 pin. (synchronous mode) 5 IPS1/IIC Don't care Set-up of ANS pin. 6 ANS "OFF": asynchronous mode, "ON": synchronous mode 7 TEST Don't care 8 ACKS Don't care Default OFF OFF OFF ON OFF OFF OFF OFF DIP switch (SW3) set-up: -off- means "L" No. Switch Name Function 1 FS1 Sampling frequency select at synchronous mode (ANS=1). 2 FS2 (See the datasheet.) 3 FS0 4 PSEL Don't care 5 CKS1 Set-up of CKS1 pin. (synchronous mode) Set-up of TRANS pin. 6 TRANS "OFF": normal mode, "ON": audio routing mode DIR_I/O 7 Don't care Set-up of the transmission direction of 74AC245 8 DIT_I/O "OFF": When inputting from PORT5, "ON": When outputting from PORT5 Default OFF OFF OFF OFF OFF OFF OFF OFF 2005/10 ASAHI KASEI [AKD4101A-B] Jumper set up. No. Jumper Name 1 D3V/VD 18 SDA/CDTO 19 TXP1 19(sub) ANS 20(sub) CKS0 21(sub) TXP 22(sub) TXN Function Set-up of Power supply source for 74AC245. D3V : D3V VD : VD (default) Set-up of FS3 pin Synchronous mode : short CDTO/CM0="H" FS3 pin="H" short CM0="L" FS3 pin="L" Asynchronous mode: short CDTO/CM0="H" (default) Set-up of TXP1 output circuit. OPT : Optical (default) XLR : XLR BNC : BNC Set-up depending synchronous / asynchronous mode Open : synchronous mode Short : asynchronous mode (default) Set-up of CKS0 pin Open : CKS0 pin="H" Short : CKS0 pin="L" (default) Set-up of TXP output 4-5 pin Short: TXP1 (default) 3-6 pin Short: TXP2 2-7 pin Short: TXP3 1-8 pin Short: TXP4 Set-up of TXN output 4-5 pin Short: TXN1 (default) 3-6 pin Short: TXN2 2-7 pin Short: TXN3 1-8 pin Short: TXN4 2005/10 ASAHI KASEI [AKD4101A-B] Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4101A-B according to previous term. 2. Connect IBM-AT compatible PC with AKD4101A-B by 10-line type flat cable (packed with AKD4101A-B). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AKD4101A-B Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "akd4101A.exe" to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button. Explanation of each buttons 1. [Port Reset] : Set up the USB interface board (AKDUSBIF-A) . 2. [Write default] : Initialize the register of AK4101A. 3. [All Write] : Write all registers that is currently displayed. 4. [Function1] : Dialog to write data by keyboard operation. 5. [Function3] : The sequence of register setting can be set and executed. 6. [Function4] : The sequence that is created on [Function3] can be assigned to buttons and executed. 7. [Function5]: The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. 8. [SAVE] : Save the current register setting. 10. [OPEN] : Write the saved values to all register. 11. [Write] : Dialog to write data by mouse operation. Indication of data Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet. 2005/10 ASAHI KASEI [AKD4101A-B] Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". If you want to write the input data to AK4101A, click [OK] button. If not, click [Cancel] button. 2. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Input registers address in 2 figures of hexadecimal. Data Box: Input registers data in 2 figures of hexadecimal. If you want to write the input data to AK4101A, click [OK] button. If not, click [Cancel] button. 3. [Save] and [Open] 3-1. [Save] Save the current register setting data. The extension of file name is "akr". (Operation flow) (1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is "akr". 3-2. [Open] The register setting data saved by [Save] is written to AK4101A. The file type is the same as [Save]. (Operation flow) (1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button. 2005/10 ASAHI KASEI [AKD4101A-B] 4. [Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set "-1" to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of file name is "aks". Figure 4. Window of [F3] 2005/10 ASAHI KASEI [AKD4101A-B] 5. [Function4 Dialog] The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the window as shown in Figure 5 opens. Figure 5. [F4] window 2005/10 ASAHI KASEI [AKD4101A-B] 5-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 6. Figure 6. [F4] window(2) (2) Click [START] button, then the sequence is executed. 5-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The sequence file names can assign be saved. The file name is *.ak4. [OPEN] : The sequence file names assign that are saved in *.ak4 are loaded. 5-3. Note (1) This function doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change. 2005/10 ASAHI KASEI [AKD4101A-B] 6. [Function5 Dialog] The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 7opens. Figure 7. [F5] window 6-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). (2) Click [WRITE] button, then the register setting is executed. 6-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The register setting file names assign can be saved. The file name is *.ak5. [OPEN] : The register setting file names assign that are saved in *.ak5 are loaded. 6-3. Note (1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change. 2005/10 ASAHI KASEI [AKD4101A-B] Revision History Date (YY/MM/DD) 05/10/03 Manual Board Revision Revision KM080100 0 Reason First edition Contents IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. 2005/10 5 4 3 2 1 CN5 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 D 49 D C19 10u VDD + BICK LRCK CN6 FS0/CSN 11 10 U7 1 DIF0 DIF0 C20 0.1u SDTI MCLK CN7 PDN 48 7 9 6 5 4 8 3 SDTI4 SDTI3 SDTI2 SDTI1 MCLK VSS VDD 2 BICK PDN 1 FS0/CSN LRCK TRANS 47 2 FS1/CDTI DIF1 12 FS1/CDTI TRANS 44 CKS1 CKS1 46 3 DIF1 FS2/CCLK 13 FS2/CCLK V34 43 V 45 C 4 PDN PDN FS3/CDTO 14 FS3/CDTO V12 42 44 C 5 DIF2 DIF2 C 15 C1 U4 41 U 43 6 16 C2 U3 40 42 7 17 DAUX C3 AK4101A U2 39 41 8 SDTI 18 JP19 C4 U1 38 FS0/CSN FS0/CSN 40 9 ANS 10 JP20 11 B 19 ANS DIF2 37 DIF2 FS2/CCLK FS2/CCLK 39 20 BLS DIF1 36 DIF1 FS1/CDTI FS1/CDTI 38 21 CKS0 CKS0 VDD 35 C21 + 0.1u VDD FS3/CDTO C22 10u FS3/CDTO B 37 12 22 VSS CKS1 TXN4 TXN3 TXN2 TXN1 TXP4 TXP3 TXP2 TXP1 VDD VSS DIF0 34 DIF0 36 13 35 23 24 25 26 27 28 29 30 31 32 14 CKS1 15 C23 0.1u MCLK 16 10u C24 MCLK 33 LRCK LRCK 34 33 A V U C BLS VDD TXP C U V JP21 TXP TXN + JP22 TXN A 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 BICK BICK Title CN8 Size A3 Date: 5 4 3 2 AKD4101A Document Number Rev SUB Tuesday, September 28, 2004 Sheet 1 A 3 of 3 5 4 3 2 1 CN4 For U6 VD D3V For U1, U2, U5 D3V VD JP1 1 D3V 2 3 VD For U4 D3V/VD 49 50 51 AVDD AVDD 52 D C1 C2 C3 C4 C6 0.1u D 0.1u0.1u0.1u 0.1u P/SN/ANS ACKS L2 1 R4 VD P/SN/ANS 53 54 55 56 57 ACKS +5V 10u 2 TVDD/VDD RXN0 RXP0 short RX1 T3 TA48M033F OUT GND 2 1 + 2 C14 47u IN 1 1 + 3 2 C15 47u AVDD AVDD 58 59 60 61 RX2 C R8 D3V short RP1 9 8 7 6 5 4 3 2 1 47k IPS0 DIF0 DIF1 DIF2/XSEL IPS1/IIC P/SN/ANS TEST ACKS SW1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 D3V RX3 62 63 64 C AVDD AVDD IPS0/RX4 JP8 1 RX5 2 3 DIF0 IPS1/IIC P/SN/ANS TEST ACKS DIF0/RX5 JP9 1 RX6 2 3 DIF1 JP10 1 RX7 2 3 DIF2/XSEL R9 D3V K CN1 1 2 3 4 5 6 B TEST TEST DIF1/RX6 PDN DIF2/XSEL/RX7 D3V 16 U1 B 10k D3V 14 14 DVDD VIN DVDD EMCK1 DAUX1 7 4Y GND 7 2 3 5 6 11 10 14 13 15 1 1A 1B 2A 2B 3A 3B 4A 4B G A/B D3V 1Y 2Y 3Y 4 7 D1 1S1588 A VIN 9 12 100 100 R11 R12 1 U2A 74HC14 2 3 U2B 74HC14 4 7 8 9 R10 DAUX2 DAUX EMCK2 DAUX2 SW2 1 3 H L 100 C16 PDN 0.1u 2 MCKO1 10 11 12 13 8 74LVC157 MCKO2 OVDD OVDD BICK 14 15 16 A SDTO A LRCK Title Size A3 Date: 5 4 3 2 AKD4101A-B Document Number Rev MAIN Wednesday, June 29, 2005 Sheet 1 0 1 of 2 5 4 3 2 1 PORT3 GND T45_BK +5V JP19 T45_BK OPT XLR BNC 1 3 5 TXP1 2 4 6 1 2 3 4 5 10 9 8 7 6 CN2 B C U VOUT VIN R24 R25 R26 R27 100 100 100 100 B 17 18 19 20 D C 1 1 BCUV +5V R29 R30 R31 R32 U D 47k 47k 47k 47k TVDD/VDD VOUT TVDD PORT4 5 6 5 6 IN VCC IF GND 4 3 2 1 VD T4 R34 21 22 23 24 25 26 TX0 TOTX176 R33 1k C17 DA02-F 4 8 TXP1 0.1u 2 R36 4 1 J3 2 3 3 1 5 0.1u 1:1 56 XLR BNC 2 JP14 3 3 1 JP15 TXN1 J4 T5 TX0 2 3 4 5 1 DA02-F 4 8 0.1u 1 1:1 5 R37 330 XLOUT TXN1 MCLK MCKO 2 EMCK R38 1 3 D3V/VD 20 EMCK1 100 4 1 27 28 A0 A1 A2 A3 A4 A5 A6 A7 DIR OE 2 3 4 5 6 7 8 9 1 19 R96 R97 R90 R91 R92 R93 R94 R95 100k GND GND GND GND NC C PORT5 10 9 8 7 6 1 2 3 4 5 DC 2 DAUX1 R42 AC JP16 1 3 R40 R41 DIT ELRCK 100k 100k 100k R84 R85 R86 R87 R88 R89 47k 47k 47k 47k 47k 47k B0 B1 B2 B3 B4 B5 B6 B7 D3V/VD MCLK BICK LRCK DAUX U4 R82 R83 100 100 18 17 16 15 14 13 12 11 47k 47k 47k 47k 47k 47k 100 100 OVDD OVDD 29 30 31 EBICK 32 C GND DIT_I/O 10 74AC245 14 U2C 5 74HC14 7 14 U2D 9 74HC14 7 VD 14 R51 R54 11 74HC14 14 7 U2F 13 74HC14 7 R58 D3V CM1/FS1 OCKS1/FS2 OCKS0/FS0 PSEL XTL0/CKS1 XTL1/TRANS DIR_I/O DIT_I/O RP2 9 8 7 6 5 4 3 2 1 47k 10 10 8 6 4 2 12 PORT6 9 7 5 3 1 U2E R48 U5 CN3 JP17 ELRCK 6 1 3 AC DC 2 EMCK2 EMCK 33 34 35 36 37 38 B ELRCK INT0 8 INT1 D3V 16 CM0/CDTO/CAD1 1Y 2Y 3Y 4Y GND 4 7 9 12 1 74LS07 7 R57 R50 R53 VD U6A OCKS0/CSN/CAD0 2 DVDD DVDD 14 10k 10k R52 R55 470 470 B CSN R56 SCL/CCLK SDA/CDTI 51 SDA(ACK)/CDTO 1A 1B 2A 2B 3A 3B 4A 4B G A/B D3V 10k R49 470 2 3 5 6 11 10 14 13 15 1 100 100 CM1/CDTI/SDA OCKS1/CCLK/SCL 39 40 41 42 P/SN/ANS uP-I/F JP18 1 SDA 3 CDTO/CM0=H 5 D3V 2 4 6 8 74LVC157 10k R60 R59 SW3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 D3V 10k 100 IPS1/IIC IPS1/IIC 43 44 45 46 47 48 12 74LS07 7 A CM0=L SDA/CDTO 100 PSEL D3V/VD XTL0 XTL1 A 3 DIR_I/O DIT_I/O U6B 4 74LS07 7 9 U6D 8 74LS07 7 U6F 13 5 U6C 6 74LS07 7 11 U6E 10 74LS07 7 Title Size A3 Date: 2 AKD4101A-B Document Number Rev MAIN Wednesday, June 29, 2005 Sheet 1 0 2 of 2 5 4 3 AKD4115-A L1 AKD4115-A L1_SILK |
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