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APT6M100K
1000V, 6A, 2.50 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
APT6M100K Single die MOSFET
D G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 6 4 20 30 310 3
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.07 1.2 10 1.1 -55 0.11 150 300 Min Typ Max 225 0.43 Unit W C/W
C
2-2007 050-8110 Rev A
oz g in*lbf N*m
Torque
Mounting Torque ( TO-220 Package), 6-32 or M3 screw
Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 3A VGS = VDS, ID = 1mA VDS = 1000V VGS = 0V TJ = 25C TJ = 125C
APT6M100K
Typ 1.15 2.05 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 1000
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
2.50 5 100 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 3A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 5.6 1410 19 120 48
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 667V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 3A, VDS = 500V Resistive Switching VDD = 667V, ID = 3A RG = 10 6 , VGG = 15V
25 43 8 21 6.4 5.8 22 5.4
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 6
Unit A
G S
20 1.0 1025 17 10 V ns C V/ns
ISD = 3A, TJ = 25C, VGS = 0V ISD = 3A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 3A, di/dt 1000A/s, VDD = 667V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 68.89mH, RG = 10, IAS = 3A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -4.09E-8/VDS^2 + 7.21E-9/VDS + 1.40E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8110
Rev A
2-2007
16 14 ID, DRAIN CURRENT (A)
V
GS
= 10V
6 5 ID, DRIAN CURRENT (A)
APT6M100K
T = 125C
J
12 10 8 6 4 2 0
TJ = -55C
V
GS
= 6, 7, 8 & 9V
4 3 2 1 0
5V
TJ = 25C
TJ = 125C
4.5V
TJ = 150C
30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 3A
0
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0 2.5 2.0 1.5 1.0 0.5
20 18 16 ID, DRAIN CURRENT (A) 14 12 10 8 6 4 2
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
TJ = -55C TJ = 25C TJ = 125C
0 25 50 75 100 125 150 0 -55 -25 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 8 7
TJ = -55C TJ = 25C TJ = 125C
0
0
8 7 6 5 4 3 2 1 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
3,000 1,000 C, CAPACITANCE (pF)
Ciss
gfs, TRANSCONDUCTANCE
6 5 4 3 2 1 0 0 0.5
100
Coss
10
Crss
3.0 2.0 2.5 1.0 1.5 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
3.5
1000 800 600 400 200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 0 20 ISD, REVERSE DRAIN CURRENT (A) 18 16 14 12 10 8 6 4 2 0 0
TJ = 25C
1
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12 10 8 6 4 2
ID = 3A
VDS = 200V
VDS = 500V
TJ = 150C
050-8110
60 50 40 30 20 10 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0
0
1.5 1.2 0.9 0.6 0.3 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev A
2-2007
VDS = 800V
40
40
APT6M100K
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
IDM
10
I
DM
Rds(on)
13s 100s 1ms 10ms TJ = 150C 100ms TC = 25C DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
C
13s
100s
1
Rds(on)
1ms 10ms 100ms
1
0.1
TJ = 125C TC = 75C
DC line
1
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
TJ (C)
0.0654 Dissipated Power (Watts) 0.0023 0.0057 0.0803 0.231
TC (C)
0.266 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction.
Figure 11, Transient Thermal Impedance Model 0.60 Z JC, THERMAL IMPEDANCE (C/W) 0.50 0.40 0.30 0.20 0.10 0
D = 0.9
0.7
0.5
ZEXT
Note:
PDM
t1 t2
0.3 SINGLE PULSE 0.1 0.05
Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t1 = Pulse Duration
t
10
-5
10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
10-4
1.0
TO-220 (K) Package Outline
e3 100% Sn Plated
Drain
2-2007
Gate Drain Source
Rev A
050-8110
Dimensions in Inches and (Millimeters)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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