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CEF08N5
PRELIMINARY
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
6
500V , 4.7A , RDS(ON)=0.85 @VGS=10V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220F full-pak for through hole
D
G
G D S
S
TO-220F
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed Drain-Source Diode Forward Current Maximum Power Dissipation @Tc=25 C Derate above 25 C Operating and Storage Temperautre Range Symbol VDS VGS ID IDM IS PD TJ, TSTG Limit 500 30 4.7 15 4.7 48 0.38 -55 to 150 Unit V V A A A W W/ C C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient R JC R JA
6-142
2.6 65
C/W C/W
CEF08N5
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter
Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current
Symbol
a
Condition
VDD =50V, L=24mH RG=25
Min Typ Max Unit
DRAIN-SOURCE AVALANCHE RATING
EAS IAS
500 8
mJ A
6
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage BVDSS IDSS IGSS VGS(th) RDS(ON) ID(ON) gFS
b
VGS = 0V,ID = 250A VDS = 500V, VGS = 0V VGS = 30V, VDS = 0V VDS = VGS, ID = 250A VGS =10V, ID = 4.8A VGS = 10V, VDS = 10V VDS = 50V, ID = 6A VDD =250V, ID = 8A, VGS = 10V RGEN=9.1
500 25
V A 100 nA
ON CHARACTERISTICS a
Gate Threshold Voltage Drain-Source On-State Resistance On-State Drain Current Forward Transconductance 2 4 0.76 0.85 8 4 18 25 105 38 56 VDS =400V, ID = 8A, VGS =10V
6-143
V A S ns ns ns ns
SWITCHING CHARACTERISTICS
Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
tD(ON) tr tD(OFF) tf Qg Qgs Qgd
65
nC nC nC
6 30
CEF08N5
ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted)
Parameter DYNAMIC CHARACTERISTICS b
Input Capacitance CISS COSS CRSS
a
Symbol
Condition
Min Typ Max Unit
800 110 70
PF PF PF
6
Output Capacitance Reverse Transfer Capacitance Diode Forward Voltage
VDS =25V, VGS = 0V f =1.0MHZ
DRAIN-SOURCE DIODE CHARACTERISTICS
VSD
VGS = 0V, Is =8A
1.5
V
Notes a.Pulse Test:Pulse Width 300 s, Duty Cycle 2%. b.Guaranteed by design, not subject to production testing.
12 VGS=10,9,8,7V 10
10
ID, Drain Current(A)
8 VGS=6V 6 4
ID, Drain Current (A)
150 C
1
VGS=5V
2 0 0 2 4 6 8 10 12
-55 C
0.1 2
25 C
1.VDS=40V 2.Pulse Test
4
6
8
10
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
6-144
CEF08N5
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
1200 1000
2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100
ID=4.8A VGS=10V
C, Capacitance (pF)
Ciss 800 600 400 200 0 0 5 10 15 20 25 Coss Crss
6
-50 0 50 100 150 200
VDS, Drain-to Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage
1.30 1.20 1.10 1.0 0.90 0.80 0.70 0.60 -50 -25 0 25 50 75 100 125 150 VDS=VGS ID=250 A
Figure 4. On-Resistance Variation with Temperature
1.15 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 ID=250 A
0
25
50
75 100 125 150
Tj, Junction Temperature ( C)
Tj, Junction Temperature ( C)
Figure 5. Gate Threshold Variation with Temperature
4
Figure 6. Breakdown Voltage Variation with Temperature
20 10 VGS=0V
gFS, Transconductance (S)
VDS=50V 3
2
Is, Source-drain current (A)
0 1 2 3 4
1
1 0
0.1 0.4 0.6 0.8 1.0 1.2
IDS, Drain-Source Current (A)
VSD, Body Diode Forward Voltage (V)
Figure 7. Transconductance Variation with Drain Current 6-145
Figure 8. Body Diode Forward Voltage Variation with Source Current
CEF08N5
VGS, Gate to Source Voltage (V)
15 12 9 6 3 0 0 20 40 60 80
Qg, Total Gate Charge (nC)
VDS=400V ID=8A
ID, Drain Current (A)
10 1
10 m
S( ON )L im it
10
0 s
1m
s
s
10 0m
RD
s
D C
10 0
6
10
-1
TC=25 C Tj=150 C Single Pulse 10 1 10 2 10
3
10 0
VDS, Drain-Source Voltage (V)
Figure 9. Gate Charge
Figure 10. Maximum Safe Operating Area
VDD t on V IN D VGS RGEN G
90%
toff tr
90%
RL VOUT
td(on) VOUT
td(off)
90% 10%
tf
10%
INVERTED
S
VIN
50% 10%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
r(t),Normalized Effective Transient Thermal Impedance
10 0
D=0.5 0.2
10 -1
0.1 0.05
PDM t1 t2 1. R JC (t)=r (t) * R JC 2. R JC=See Datasheet 3. TJM-TC = P* R JC (t) 4. Duty Cycle, D=t1/t2
0.02 0.01 Single Pulse
10 -2 -5 10
10 -4
10 -3
10 -2
10 -1
10 0
10
1
Square Wave Pulse Duration (sec)
Figure 13. Normalized Thermal Transient Impedance Curve
6-146

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