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| DG2303 New Product Vishay Siliconix High-Speed, Low rON, 1.8-V/2.5-V/3.3-V/5-V, SPST Analog Switch (1-Bit Bus Switch) FEATURES D D D D D D SC-70 5-Lead Package 5-W Switch Connection Between Two Ports Minimal Propagation Delay Through The Switch Low ICC Zero Bounce In Flow-Through Mode Control Inputs Compatible with TTL Level DESCRIPTION The DG2303 is a high-speed, 1-bit, low power, TTL-compatible bus switch. Using sub-micron CMOS technology, DG2303 achieves low on-resistance and negligible propagation delay. The DG2303 consist of a bi-directional input/output pins A and B. When the output enable (OE) is low, the input/output pins are connected. When the OE is high, the switch is open and a high-impedance state exists between input/output pins A and B. FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION TRUTH TABLE SC-70 A B GND 1 2 3 Top View Device Marking: E6 4 OE 5 V+ OE L H B HiZ State A Function Disconnect Connect ORDERING INFORMATION Temp Range -40 to 85C Package SC70-5 Part Number DG2303DL Document Number: 72073 S-03422--Rev. A, 03-Mar-03 www.vishay.com 1 DG2303 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Reference to GND V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6 V OE, A, Ba . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V+ + 0.3 V) Continuous Current (Any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . "50 mA Peak Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "200 mA (Pulsed at 1 ms, 10% duty cycle) Storage Temperature (D Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150C Power Dissipation (Packages)b 5-Pin SC70c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mW Notes: a. Signals on A, or B or OE exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 3.1 mW/_C above 70_C New Product SPECIFICATIONS (V+ = 5.0 V) Test Conditions Otherwise Unless Specified Parameter DC Characteristics V+ = 1.8 V, VA = 0 V, IB = 4 mA V+ = 1.8 V, VA = 1.8 V, IB = 4 mA V+ = 2.3 V, VA = 0 V, IB = 8 mA V+ = 2.3 V, VA = 2.3 V, IB = 8 mA On-Resistance rON V+ = 3.0 V, VA = 0 V, IB = 24 mA V+ = 3.0 V, VA = 3.0 V, IB = 24 mA V+ = 4.5 V, VA = 0 V, IB = 30 mA V+ = 4.5 V, VA = 2.4 V, IB = 15 mA V+ = 4.5 V, VA = 4.5 V, IB = 30 mA V+ = 1.8 V, VA = 0 V to V+, IB = 4 mA rON Flatnessd rON Flatness V+ = 2.5 V, VA = 0 V to V+, IB = 8 mA V+ = 3.3 V, VA = 0 V to V+, IB = 24 mA V+ = 5.0 V, VA = 0 V to V+, IB = 30 mA Switch Off Leakage Current Switchl-On Leakage Current I(off) I(on) V+ = 5.5 V, VA = 1 V/4.5 V, VB = 4.5 V/1 V V+ = 5.5 V, VA = VB = 1 V/4.5 V V+ = 1.65 V to 1.95 V V+ = 2.3 V to 2.7 V Input High Voltage VIH Limits -40 to 85_C Symbol V+ = 1.65 V to 5.5 V, VIN = VIH or VILe Tempa Minb Typc Maxb Unit Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full -1 -10 -10 1.35 1.6 2.0 2.4 125 28 12 6 28.0 60.0 12.0 30.0 9.0 20.0 7.0 12.0 15.0 W 10 10 mA V+ = 3.0 V to 3.6 V V+ = 4.5 V to 5.5 V V+ = 1.65 V to 1.95 V V+ = 2.3 V to 2.7 V 0.4 0.4 0.6 0.8 1 V Input Low Voltage VIL V+ = 3.0 V to 3.6 V V+ = 4.5 V to 5.5 V Input Current IIL or IIH VOE = 0 or V+ mA Dynamic Characteristics VLD = Open, V= 1.65 V to 1.95 V, (Figure 1 and 2) Prop Delay Bus to Busf Bus-to-Bus tPHL, tPLH VLD = Open, V= 2.3 V to 2.7 V, (Figure 1 and 2) VLD = Open, V= 3.0 V to 3.6 V, (Figure 1 and 2) VLD = Open, V= 4.5 V to 5.5 V, (Figure 1 and 2) Full Full Full Full 5 2 1 1 ns www.vishay.com 2 Document Number: 72073 S-03422--Rev. A, 03-Mar-03 DG2303 New Product SPECIFICATIONS (V+ = 5.0 V) Test Conditions Otherwise Unless Specified Parameter Symbol V+ = 1.65 V to 5.5 V, VIN = VIH or VILe Vishay Siliconix Limits -40 to 85_C Tempa Minb Typc Maxb Unit Dynamic Characteristics VLD = 2 x V+, V+ = 1.65 V to 1.95 V (Figure 1 and 2) tPZL Output Enable Timed VLD = 2 x V+, V+ = 2.3 V to 2.7 V (Figure 1 and 2) VLD = 2 x V+, V+ = 3.0 V to 3.6 V (Figure 1 and 2) VLD = 2 x V+, V+ = 4.5 V to 5.5 V (Figure 1 and 2) VLD = 0 V, V+ = 1.65 V to 1.95 V (Figure 1 and 2) tPZH VLD = 0 V, V+ = 2.3 V to 2.7 V (Figure 1 and 2) VLD = 0 V, V+ = 3.0 V to 3.6 V (Figure 1 and 2) VLD = 0 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) VLD = 2 x V+, V+ = 1.65 V to 1.95 V (Figure 1 and 2) tPLZ Output Disable Timed VLD = 2 x V+, V+ = 2.3 V to 2.7 V (Figure 1 and 2) VLD = 2 x V+, V+ = 3.0 V to 3.6 V (Figure 1 and 2) VLD = 2 x V+, V+ = 4.5 V to 5.5 V (Figure 1 and 2) VLD = 0 V, V+ = 1.65 V to 1.95 V (Figure 1 and 2) tPHZ VLD = 0 V, V+ = 2.3 V to 2.7 V (Figure 1 and 2) VLD = 0 V, V+ = 3.0 V to 3.6 V (Figure 1 and 2) VLD = 0 V, V+ = 4.5 V to 5.5 V (Figure 1 and 2) Charge Injectiond Off Isolationd Insertion Lossd Input Capacitanced Channel-Off Capacitanced Channel-On Capacitanced QINJ OIRR Loss Cin Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Room Room Room Room Room 4.2 3.3 2.6 1.8 4.4 3.3 2.7 2.0 14.3 10.5 8.6 7.4 10.7 9.6 8.7 7.5 0.5 -50 >200 4 9 20 p pF pC dB MHz ns ns CL = 1 nF, VGEN = 0 V, RGEN = 0 W, (Figure 3) RL = 50 W, CL = 5 pF, f = 10 MHz RL = 50 W C(off) CON VOE = 0 or V+ f = 1 MHz V+, Room Power Supply Power Supply Range Power Supply Current Notes: a. b. c. d. e. f. Room = 25C, Full = as determined by the operating suffix. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. Typical values are for design aid only, not guaranteed nor subject to production testing. Guarantee by design, nor subjected to production test. VIN = input voltage to perform proper function. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the on-resistance and the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch. V+ I+ VOE = 0 or V+ 1.65 5.5 1.0 V mA Document Number: 72073 S-03422--Rev. A, 03-Mar-03 www.vishay.com 3 DG2303 Vishay Siliconix AC LOADING AND WAVEFORMS New Product VLD Ra = 500 W SWITCH INPUT A B SWITCH OUTPUT CL OE Rb = 500 W CL = 50 pF LOGIC INPUT Input driven by 50-W source terminated in 50 W CL includes load and stray capacitance Input PRR = 1.0 MHz, tW = 50 ns Figure 1. AC Test Circuit tf = 2.5 ns tr = 2.5 ns 90% Switch Input 10% tw tPLH tPHL VOH 1.5 V 1.5 V Output 1.5 V 1.5 V 90% 1.5 V 10% tf = 2.5 ns V+ Logic Input 90% 1.5 V 10% GND tPZL 10% tr = 2.5 ns 90% 1.5 V GND tPLZ VLd 2 V+ VOL + 0.3 V VOL tPZH tPHZ VOH VOH -0.3 V Output VOL Output 1.5 V 0V Figure 2. AC Waveforms www.vishay.com 4 Document Number: 72073 S-03422--Rev. A, 03-Mar-03 DG2303 New Product TEST CIRCUITS V+ Vishay Siliconix Rgen + Vgen V+ B OE GND A VOUT VOUT CL = 0.1 nF IN On DVOUT Off Q = DVOUT x CL On VIN = 0 - V+ IN depends on switch configuration: input polarity determined by sense of switch. Figure 3. Charge Injection V+ 10 nF V+ A OE B RL VB Off Isolation + 20 log V A VIN GND Analyzer Figure 4. Off-Isolation V+ 10 nF V+ B Meter OE VIN A GND HP4192A Impedance Analyzer or Equivalent f = 1 MHz FIGURE 5. Channel Off/On Capacitance Document Number: 72073 S-03422--Rev. A, 03-Mar-03 www.vishay.com 5 |
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