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| www.fairchildsemi.com FAN3506 PC SMPS Secondary Side Control IC Features * * * * * * * * * * * Few External Components Low Voltage Operation (Vcc_min=4.5V) Over Voltage Protection for 3.3V/5V/12V Output Two Protection Inputs (PT1, PT2) Fault Protection Output with Open Collector Power Supply on/off Delay Time Control (PSON) Latch Function Controlled by PSON and Protection Power Good Signal Generator with Hysteresis 300ms(Typ) Power Good Delay Programmable Shunt Regulator Trimmed to 2% 16-Pin Dual In-line Package (16-DIP-300) Description The FAN3506 is complete housekeeping circuitry for use in the secondary side of PC SMPS (Switched Mode Power Supply). It contains various functions, which are over voltage protection including two extra protection inputs, power supply on/off delay control and power good signal generator. Especially, it contains a programmable shunt regulator for output feedback and the reference voltage is trimmed to 2%. The FAN3506 is available in 16-DIP. 16-DIP 1 Block Diagram V33 1 V5 2 V12 3 FPO 5 VCC 4 lchg PG 9 R1 PT1 13 14 PT2 R3 R5 VCC + + + + + _ R7 R9 R11 VCC _ _ _ + COMP4 1.32V~1.26V Q2 3.9V _ Q3 S Q R Q1 R8 R10 R12 + COMP6 R2 R4 R6 1.26V 1.8V~1.2V VCC lil PSON 7 3.2V VCC VCC + _ COMP2 1.4V lon VCC VCC _ + COMP3 1.26V _ _ + COMP5 VCC + loff IK 15 1.32V~1.26V 1.8V~0.6V 16 VREF 8 TPSON 6 Rd 11 PGI 12 GND 10 TPG Rev. 1.0.2 (c)2002 Fairchild Semiconductor Corporation FAN3506 Pin Description No 1 2 3 4 Name V33 V5 V12 VCC I/O I I I I Function +3.3V Output Voltage of SMPS Secondary Side +5V Output Voltage of SMPS Secondary Side +12V Output Voltage of SMPS Secondary Side Supply Voltage. +5Vsb(+5V Standby Supply) is Recommended for Vcc. The Operating Range is 4.5V~15V. Vcc=5V, Ta=25C at test. Fault Protection Output(FPO) With Open Collector Structure. This Signal Controls the Primary Switch(PWM IC) Through an Opto-coupler. Maximum Current Rating is 20mA. When FPO = "Low", the Main SMPS is Operational and if FPO = "High", the Main SMPS is Turned-off. OFF Delay Resistor. This Block is Made up of a Buffer With Vout = 1.258V. A Resistor Should be Connected to the Pin6 for Determination of Off Delay Current. The Recommended Value of Rd Resistor is 28k at Ctpson=0.22uF. The off Delay Time is Gotten by Following Equation. Toff = [ Ctpson * (V8max-VthL) ] / (1.258V/Rrd) Power Supply On/Off (Remote On/Off) Input. It is TTL Operation and its Threshold Voltage is 1.4V. The Maximum Voltage of Pin7 is About 3.9V(Typ), With ABsolutely Maximum Voltage, 5.25v. If Pson Is Low, Fpo Is Low, Too. That Means The main SMPS is Operation(Active). When PSON is High, then FPO is High and the Main SMPS is off. Power Supply On/Off Delay. Ton/Toff = 24ms/8ms(Typ) with Ctpson=0.22uF & Rd=28k. Its High/Low Threshold Voltages 1.8V/0.6V and the Maximum Voltage After Full Charging is About 2.2V. So Vcharge = VthH = 1.8V and Vdischg = V8max - VthL = 1.6V. Each Delay Time is Decided by the Following Equations, Ton = (Ctpson*VthH) / Ion, Toff = [Ctpson*(V8max-VthL)] / (Vrd/Rrd) . Power Good Signal Output with Open Collector. The Maximum Current Rating is 20mA. PG High Means that the Power is Good for Operation and PG low Means Power Fail. PG Delay. Td = 300ms(Typ) with Ctpg=2.2uF. The Threshold Voltage is 1.8V and the Delay Time is Decided by the Following Equation, Td = (Ctpg * Vth) / Ichg = 1.8Ctpg / Ichg. Power Good Signal Input. Its Threshold Voltage is 1.26V When the PGI Voltage Drops From High to Low. Ground Protection Input 1. This can be Used for an Adjustable OVP or Another Protection Input. Protection Input 2. This can be Used for an Adjustable OVP or Another Protection Input. Cathode of the Programmable Shunt Regulator. Absolute Min/Max Current Rating is 1mA/30mA. Reference of Programmable Shunt Regulator. This Circuit is Prepared for Feedback of Output Voltage as it Equals to KA431(LM431). It is Trimmed to 2%. 5 FPO O 6 Rd - 7 PSON I 8 TPSON - 9 10 11 12 13 14 15 16 PG TPG PGI GND PT1 PT2 IK VREF O I I I I I 2 FAN3506 Absolute Maximum Ratings Parameter Supply Voltage FPO (Fault Protection Output) Voltage FPO Maximum Current PGI Maximum Voltage PG Output Maximum Current Cathode Voltage Cathode Current for IK Power Dissipation Operating Temperature Range Storage Temperature Symbol VCC VFPO IFPO Vpgi Io(PG) Vka IK PD TOPR TSTG Value 4.5 ~ 15 20 20 20 20 20 1 ~ 30 1 -25 ~ +80 -65 ~ +150 Unit V V mA V mA V mA W C C Electrical Characteristics (VCC = 5V, Ta = 25C, unless otherwise specified) Parameter PROTECTION SECTION OVP Detecting Voltage for 3.3V OVP Detecting Voltage for 5V OVP Detecting Voltage for 12V Protection Input Voltage 1 Protection Input Voltage 2 POWER SUPPLY ON/OFF SECTION (PSON) PSON Input Threshold Voltage PSON Input Open Voltage PSON Input Low Current PSON Delay Charging Current Buffer Output Voltage Pin8 Clamping Voltage High Threshold for On/Off Delay (Note1) Low Threshold for On/Off Delay (Note2) Power Supply ON Delay Time (Note3) Power Supply OFF Delay Time (Note4) FPO Saturation Voltage FPO Leakage Current Vth Vih lil lon VRd V8max VthH VthL Ton Toff Vsat(FPO) lleak(FPO) PSON=0V : 0V to 2V PSON : Open PSON=0V PSON=TPSON=0V lsink=45uA, 200uA PSON=0V TPSON : 0V to 2.2V TPSON : 2.2V to 0V Cpin8=0.22F, Rd=28k Cpin8=0.22F, Rd=28k lo=10mA FPO=20V 1 2 0 -10 1.21 2.0 1.6 0.4 16 4 0 1.4 -16 1.26 2.2 1.8 0.6 26 8 0.2 0.01 1.8 5.25 -1 -24 1.31 2.4 2.0 0.8 36 14 0.4 1 V V mA uA V V V V msec msec V uA VOVP33 VOVP5 VOVP12 Vpt1 Vpt2 PSON=0V PSON=0V PSON=0V PSON=0V PSON=0V 3.9 5.7 13.6 1.21 1.21 4.1 6.1 14.3 1.26 1.26 4.3 6.5 15.0 1.31 1.31 V V V V V Symbol Test Conditions Min. Typ. Max. Unit 3 FAN3506 Electrical Characteristics (Continued) (VCC= 5V, Ta = 25C, unless otherwise specified) Parameter POWER GOOD SECTION PGI Threshold Voltage V33 Under Voltage Level V5 Under Voltage Level V12 Under Voltage Level Pin10 Clamping Voltage PG Delay Comparator Threshold Voltage PG Delay Comparator Hysteresis Voltage Charging Current for PG Delay PG Delay Time PG Output Rising Time (Note5) PG Output Falling Time (Note6) PG Output Saturation Voltage PG Output Leakage Current Reference Input Voltage Load Regulation Temperature Stability (Note7) Output Sinking Current Capability Gain Bandwidth (Note8) TOTAL DEVICE Supply Current Icc PSON = 2V 3 8 mA Vpgi Vuv33 Vuv5 Vuv12 V10max Vth(TPG) HY lchg Td(PG) Tr Tf Vsat(PG) lleak(PG) Vref Vref Vref/T lsink GBW GV = 1 PGI : 1.5V to 1V V33 : 3.3V to 2V V5 : 5V to 3.5V V12 : 12V to 9V TPG : Open TPG : 0V to 2.5V TPG : 2.5V to 0V TPG = 0V Cpin10 = 2.2uF Cpin9 = 0.1uF Cpin9 = 0.1uF lsink = 15mA V(PG) = 20V IK = VREF, IK = 1mA IK = 1mA to 10mA Ta = -25 ~ +85C 1.21 2.66 4.1 9.8 3.4 1.5 0.3 -9 100 0 2.45 10 1.26 2.8 4.3 10.3 3.9 1.8 0.6 -15 300 1 1 0.2 0.01 2.50 5 4.5 25 1 1.31 2.94 4.5 10.8 4.4 2.1 0.9 -23 500 0.4 1 2.55 15 17 V V V V V V V uA msec usec usec V uA V mV mV mA MHz Symbol Test Conditions Min. Typ. Max. Unit PROGRAMMABLE SHUNT REGULATOR (KA431) SECTION Note : 1. Power Supply ON Delay (PSON :High Low). Power Supply is Active when PSON is Low. 2. Power Supply OFF Delay (PSON :Low High). Power Supply is Off when PSON is High. 3. Ton = (Cpin8 * Von) / lon = (Cpin8 * VthH) / lon 4. Toff = (Cpin8 * Voff) / loff = [Cpin8 * (V8max - VthL)] / (VRd / Rd) 5,6,7,8 : These parameters, although guaranteed, are but not 100% tested in production. 4 FAN3506 Block Description & Application Hints 1. OVP Block V33 1 V5 2 V12 3 R1 R3 R5 + + + + + _ VCC PT1 13 SET of Latch PT2 14 R2 R4 R6 COMP1 1.26V OVP function is simply realized by connecting Pin1, Pin2, Pin3 to each secondary output. R1,2,3,4,5,6 are internal resistors of the IC. Each OVP level is determined by resistor ratio and the typical values are 4V/6.1V/14.2V. - OVP Detecting voltage for +3.3V . Vovp33 = (R1+R2)/R2 * 1.26V = 4.1V(Typ) - OVP Detecting voltage for +5V . Vovp5 = (R3+R4)/R4 * 1.26V = 6.1V(Typ) - OVP Detecting voltage for +12V . Vovp12 = (R5+R6)/R6 * 1.26V = 14.3V(Typ) Especially, Pin13 & Pin14 are prepared for extra OVP inputs or another protection signal, respectively. That is, if you want over voltage protection of extra output voltage, then you can make a function with two external resistors. - Threshold Voltage of Protection Input 1 : Vpt1 = 1.26V - Threshold Voltage of Protection Input 2 : Vpt1 = 1.26V OVP function operates without delay time. In the case of OVP, system designer should know a fact that the main power can be dropped after a little time because of system delay, even if FPO is triggered by OVP. So when the OVP level is tested with a set, you should check the secondary outputs(+3.3V/+5V/+12V) and FPO(Pin5) simultaneously. you can know the each OVP level as checking each output voltage in just time that FPO is triggered from low to high. 5 FAN3506 2. PSON & ON /OFF Delay Block FPO Toff PSON Ton 5 FPO OVP S Q R Q1 VCC lil VCC VCC + _ _ COMP2 + COMP3 1.26V lon VCC VCC loff VCC + _ 3.2V 1.4V PG 1.5V ~ 0.6V 7 PSON 8 11 TPSON C1 103 Rd R1 27K PSON & On/Off Delay Block is controlled by a Microprocessor. If a high signal is supplied to the PSON(Pin7), the output of COMP2 becomes high status. The output signal is transferred to On/Off delay block and PG block. If no signal is supplied to Pin7, Pin7 maintains high status(=3.2V) for the internal pull-up resistor. When PSON is high, it produces FPO(Pin5) "High" signal after OFF delay time (about 8ms) for stabilizing system. Then, all outputs (+3.3V, +5V, +12V) are grounded. When PSON is changed to "Low", it produces FPO "Low" signal after ON delay time (about 26ms) for stabilizing the system. If PSON is low, then FPO is low. That means the main SMPS is Active(operational). When PSON is high, FPO is high and the main SMPS is turned-off. On/Off Delay Time can be calculated by following equation. 0.22uF Capacitor is recommended for following equations. - Ton = (Ctpson*VthH)/Ion=(0.22uF*1.8V)/16uA = 26ms - Toff = [Ctpson*(V8max-VthL)] / Ioff = [Ctpson*(V8max-VthL)] / (VRd/Rd) Because Ion current for charging is fixed by internal current source, On delay time is varied by the capacitor value. On the contrary, Off Delay time is decided by the Rd value. If the Rd is 27K(Recommended) and the Delay capacitor valuse is 0.22uF, Toff is 8ms(Typ). 6 FAN3506 3. Latch & FPO Output OVP L L H H SET L L H H RESET L H L H Qn+1 Qn L H L Qn+1 Qn H L H +5Vsb 7 PWM IC (KA38XX) 1 2 R8 1K FPO Q100 6 PC800-1 OVP PSON PC800-2 Q1 Power Good Signal Generator circuits generate "On & Off" signal depending on the status of output voltage to prevent the malfunctions of following systems like microprocessor and etc. from unstable outputs at power on & off . At Power On, it produces PG "High" signal after some delay (300ms_Typ) for stabilizing outputs. At power Off, it produces PG "Low" signal without delay by sensing the status of power source for protecting following systems. COMP6 creates PG "Low" without delay when +5V output falls to less than 4.3V to prevent some malfunction at transient status, thus it improves system stability. FAN3506 detects the Under Voltage level of three outputs(+3.3V/+5V/+12V) and PGI, respectively. - UV Deducing Level of +3.3V : Vuv33 = 2.8V(Typ) - UV Deducing Level of +5V : Vuv5 = 4.3V(Typ) - UV Deducing Level of +12V : Vuv12 = 10.3V(Typ) - UV Deducing Level of PGI : Vpgi = 1.26V(Typ) When PSON signal is high, it generates PG "Low" signal without delay. It means that PG becomes "Low" before main power is grounded. PG delay time(Td(PG)) is determined by capacitor value, threshold voltage of COMP6 and the charging current and its equation is as following. Td(PG) = (Ctpg * VthH) / Ichg = 300ms(Typ) 7 FAN3506 4. Programmable Shunt Regulator V5 IK V12 15 2 3 PC300-1 16 VREF R1 0.11k R3 10k R4 39k IK PWM IC (KA38XX) 1 2 8 15 C1 103 R2 1k C2 224 16 PC300-2 VREF R5 4.7k R6 1k The core of the circuit equals to KA431(LM431) and Vref1 is trimmed to 2% (2.45V ~ 2.55V) and it is for corrective output voltages (+5V/+12V). + 5V/ + 12V output voltages are determined by the resistor ratio of R3, R4, R5, R6. A photo coupler is used in order to control PWM IC in the primary side. R1 determines the bias current of the shunt regulator and 110 is appropriate value. The resistor value can be changed by set condition and requirements. C1 and R2 , C2 are the compensation circuit for stability. 8 FAN3506 Typical Application Circuit PC300-1 10K 0.11K 39K #1 +3.3V +5Vsb +5V +12V PC800-1 Vcc 1K FPO 27K Rd Micom 224 PSON TPSON FPO V5 IK V33 VREF 224 1K PT2 103 5K 1K V12 F A N 3 5 0 6 PT2 PT1 PT1 Det GND VZ=12V PGI + 2.2uF 20K TPG PG Micom [ Complete Housekeeping Circuit using the FAN3506 ] L IO + +3.3V/+5V/+12V 7 PWM IC 8 (KA38XX) 1 2 PC300-2 Q100 PC800-2 9 FAN3506 Typical Performance Characteristics Figure 1. Temperature Stability for VRd Figure 2. Buffer Output Voltage vs. IRd Figure 3. Temperature Stability for Vref Figure 4. Current Stability of Vref Figure 5. OVP Detecting Voltage for 3.3V Figure 6. OVP Detecting Voltage for 5V 10 FAN3506 Typical Performance Characteristics (Continued) Figure 7. OVP Detecting Voltage for 12V Figure 8. Protection Input Voltage 1,2 Figure 9. PSON Input Threshold Voltage Figure 10. High/Low Threshold of On/Off Delay Figure 11. FPO Saturation Voltage Figure 12. PGI Threshold Voltage 11 FAN3506 Typical Performance Characteristics (Continued) Figure 13. V33 Under Voltage Level Figure 14. V5 Under Voltage Level Figure 15. V12 Under Voltage Level Figure 16. High/Low Threshold of PG Delay COMP Figure 17. PG Saturation Voltage Figure 18. Supply Current of VCC 12 FAN3506 Typical Performance Characteristics (Continued) Figure 19. Power Supply On/Off Delay Time Figure 20. PG Delay Time 13 FAN3506 Mechanical Dimensions Package Dimensions in millimeters 16-DIP ( #1 #16 0.81 ) 0.032 6.40 0.20 0.252 0.008 19.80 MAX 0.780 19.40 0.20 0.764 0.008 #8 #9 7.62 0.300 3.25 0.20 0.128 0.008 0.38 MIN 0.014 5.08 MAX 0.200 3.30 0.30 0.130 0.012 0~15 0.25 -0.05 0.010 -0.002 +0.004 +0.10 14 2.54 0.100 0.46 0.10 0.018 0.004 1.50 0.10 0.059 0.004 FAN3506 Ordering Information Product Number FAN3506 Package 16-DIP Operating Temperature -25C ~ +85C 15 FAN3506 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 11/15/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. |
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