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(R) PRELIMINARY September 1998 r ic m .inte eco ech n No Rt our T or www c RSIL onta or c 8-INTE 1-88 T DUC ent t PRO placemCenter a E LET ed Re pport m/tsc O OBS mend al Su sil.co HFA3667 CDMA/AMPS, UpConverter with Gain Control Description Features * RF Frequency Range . . . . . . . . . . . . 825MHz to 850MHz * IF Operation . . . . . . . . . . . . . . . . . . . . 10MHz to 210MHz * Gain Control Range . . . . . . . . . . . . . . . . . . . . . . . .>40dB * Single Supply Battery Operation . . . . . . . . 2.7V to 3.3V * High Output 1dB Compression . . . . . . . . . . . . +13dBm * High Power Gain . . . . . . . . . . . . . . . . . . . . . . . . . . .30dB * Power Enable/Disable Control Applications * IS95A CDMA/AMPS Dual Mode Handsets * Cellular Data * CDMA/TDMA Packet Protocol Radios * Full Duplex Transceivers * Portable Battery Powered Equipment The HFA3667 UpConverter is a monolithic bipolar upconverter with gain control for CDMA/AMPS cellular applications. Manufactured in the Intersil UHF1X process, the device consists of a double balanced mixer followed by a variable gain power preamplifier. The device is designed for high output compression of +13dBm and requires low drive levels from the local oscillator. The HFA3667 is one of the four chips in the PRISMTM chip set and is housed in a small outline 28 lead SSOP package ideally suited for cellular handset applications. Ordering Information PART NUMBER HFA3667IA HFA3667IA96 TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 28 Ld SSOP Tape and Reel PKG. NO. M28.15 Pinout HFA3667 (SSOP) TOP VIEW IF_IN+ 1 TXM_VCC1 2 GND 3 LO_IN 4 LO_BY 5 GND 6 TX_PE 7 GND 8 GND 9 PRE_OUT 10 PRE_VCC2 11 STG2_IN 12 GND 13 AGC_CTRL 14 28 IF_IN27 TXM_VCC2 26 GND 25 TXM_RF 24 GND 23 TXM_VCC3 22 GND 21 GND 20 PRE_IN 19 GND 18 STG1_OUT 17 PRE_VCC1 16 GND 15 PRE_VCC3 Block Diagram TXM_RF STG1_OUT PRE_IN STG2_IN PRE_OUT IF INPUT AGC AGC_CTRL BIAS NETWORK LO TX_PE CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved 1 File Number 4299.4 PRISMTM and the PRISMTM logo are trademarks of Intersil Corporation HFA3667 Pin Descriptions PIN NUMBER 1 2 4 5 3, 6, 8, 9, 13, 16, 19, 21, 22, 24, 26 7 10 11 12 14 15 17 18 20 23 25 27 28 NAME IF_IN+ TXM_V CC1 LO_IN LO_BY GND DESCRIPTION Transmit Mixer Positive IF Input. Requires DC blocking capacitor. Mixer Power Supply Pin. Local Oscillator Input. Requires DC blocking capacitor. Local Oscillator Input Bypass. Requires high quality decoupling to ground. Internal Circuits Ground Returns. TX_PE PRE_OUT PRE_V CC2 STG2_IN AGC_CTRL PRE_V CC3 PRE_V CC1 STG1_OUT PRE_IN TXM_V CC2 TXM_RF TXM_V CC3 IF_IN- Power Enable Control Input. HIGH for normal operation. LOW for power down. Second Stage Preamplifier Output. Requires DC blocking capacitor. Second Stage Preamplifier Power Supply Pin. Use high quality decoupling capacitors. Second Stage Preamplifier Input. Requires DC blocking capacitor. Preamplifiers Gain control DC Voltage input. Preamplifiers Bias Power Supply Pin. Use high quality decoupling capacitors. First Stage Preamplifier Power Supply Pin. Use high quality decoupling capacitors. First Stage Preamplifier Output. Requires DC blocking capacitor. First Stage Preamplifier Input. Requires DC blocking capacitor. Transmit Mixer Bias Power Supply Pin. Use high quality decoupling capacitors. Transmit Mixer RF Output. Requires DC blocking capacitor. Transmit Mixer Output Buffer Power Supply Pin. Use high quality decoupling capacitors. Transmit Mixer Negative IF Input. Requires DC blocking capacitor. 2 HFA3667 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 3.6V Voltage on Any Other Pin . . . . . . . . . . . . . . . . . . . -0.3 to VCC +0.3V Thermal Information Thermal Resistance (Typical, Note 1) JA ( oC/W) SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Maximum Junction Temperature (Plastic Package) . . . . . . . . . 150oC Maximum Temperature Range . . . . . . . . . . . . . . -40oC TA 85oC Maximum Storage Temperature Range . . . . . ..-65oC TA 150oC Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC (Lead Tips Only) Operating Conditions Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 3.3V CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VCC = 2.7V, LO_IN = -3dBm, AGC_CTRL = 0.7VDC (Max Gain), TXM_IF = -30dBm (NOTE 2) TEST LEVEL TEMP (oC) PARAMETER TEST CONDITION MIN TYP MAX UNITS OVERALL CASCADED PERFORMANCE: LO_IN = -3dBm at 980MHz, TXM_IF = Differential -30dBm, at 130MHz, Interstage Filter Insertion Loss of -3.7dB with an LO rejection of 35dB. Refer to applications diagram Power Gain 250 In, 50 Out Voltage Gain 250 In, 50 oUt SSB NF P1dBO SSB NF P1dBO SSB NF P1dBO SSB NF P1dBO SSB NF P1dBO Gain Flatness Across 825 to 850MHz LO Leakage AGC_CTRL set for 10dB attenuation AGC_CTRL set for 20dB attenuation AGC_CTRL set for 30dB attenuation AGC_CTRL set for 40dB attenuation (0dB Attenuation) (0dB attenuation) Refer to applications diagram and single to differential input network. (0dB Attenuation) AGC_CTRL = 0.7V A B B A B A B A B A B A B A 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 18 11.4 -1.7 31.9 23 15 13.8 15 7.2 15.5 -7.4 17.8 -22 24 -35.9 -43 35 28 +1.7 -30 dB dB dB dBm dB dBm dB dBm dB dBm dB dBm dB dB CASCADED AMPLIFIERS SPECIFICATIONS AT 850MHz RF Frequency Range (typical) Power/Voltage Gain SSB NF P1dBO SSB NF P1dBO SSB NF P1dBO AGC_CTRL set for 10dB attenuation AGC_CTRL set for 20dB attenuation (0dB Attenuation) AGC_CTRL = 0.7V B B B B B B B B 25 25 25 25 25 25 25 25 825 22 7.4 14.5 8.2 9.5 11.8 -8.2 850 MHz dB dB dBm dB dBm dB dBm CASCADED AMPLIFIERS SPECIFICATIONS AT 850MHz SSB NF P1dBO AGC_CTRL set for 30dB attenuation B B 25 25 17.9 -22 dB dBm 3 HFA3667 Electrical Specifications VCC = 2.7V, LO_IN = -3dBm, AGC_CTRL = 0.7VDC (Max Gain), TXM_IF = -30dBm (Continued) (NOTE 2) TEST LEVEL B B A B B B A A B C To 1dB Settling B TEMP (oC) 25 25 25 25 25 25 25 25 25 25 25 PARAMETER SSB NF P1dBO Output Return Loss Input Return Loss Insertion Phase vs AGC Reverse Isolation Gain Control Voltage Gain Control Sensitivity Gain Control Slope Change Gain Control Input Impedance Gain Switching Speed, Full Scale TEST CONDITION AGC_CTRL set for 40dB attenuation Over AGC Range MIN 0.5 - TYP 27 -36 -14 -14 2 -50 76 1 0.5 MAX -7.4 -7.4 2.0 3:1 10 UNITS dB dBm dB dB Deg/dB dB V dB/V M s MIXER SPECIFICATIONS AT TXM_IF = Differential -30dBm at 130MHz, LO_IN = -3dBm at 980MHz RF Output Frequency Range (Typical) IF Input Frequency Range (Typical) LO Frequency Range LO Input Drive Level Power Gain 250 In 50 Out Voltage Gain 250 In 50 Out SSB NF P1dBO LO to RF Leakage RF Input Return Loss LO Input Return Loss IF Differential Input Resistance IF Differential Input Capacitance POWER SUPPLY AND LOGIC SPECIFICATIONS Total Supply Current at GMAX Total Supply Current at GMIN PE Logic Input Low Level PE Logic Input High Level POWER SUPPLY AND LOGIC SPECIFICATIONS PE Logic High Input Bias Current PE Logic Low Input Bias Current Power Enable Time Power Disable Time NOTE: 2. A = Production Tested, B = Based on Characterization, C = By Design VPE = 3.0V VPE = 0.0V 50%(VPE) to 90%(Icc) 50%(VPE) to 10%(Icc) A A B B 25 25 25 25 -200 -200 2.0 0.5 200 200 A A S S A A A A 25 25 25 25 -0.2 2.0 85 35 0.8 VCC mA mA V V B B B B B B B B B B A C C 25 25 25 25 25 25 25 25 25 25 25 25 25 825 10 955 -10 130 -3 11 4 15.0 -1 -26 -9 -14 700 1.8 850 200 980 0 17 -20 dB dB dB dBm dBm dB dB pF MHz MHz MHz 4 HFA3667 Typical Application Circuit MURATA LFSH33 270 1 1000p IF_IN+ TXM_VCC1 GND IF_INTXM_VCC2 GND TXM_RF 1000p NOTE 4 12n 1.8p 1.8p LO IN 100p 0.1 100p LO_IN LO_BY GND PE 100p GND TXM_VCC3 TX_PE GND HFA3667 1000p GND GND 3.0p 294 17.4 3.0p 6.8n 17.4 FUJITSU F5CH-881M50-L2AM TO POWER AMPLIFIER INPUT FILTER 1000p 100p GND PRE_OUT PRE_IN GND STG1_OUT PRE_VCC1 GND PRE_VCC3 1000p 1000p 18n 8.2p PRE_VCC2 STG2_IN GND AGC DC 100p AGC_CTRL BEAD 47p 0.1 VCC TEST INPUT NETWORK SINGLE TO DIFFERENTIAL CONVERTER (0.9dB TRANSFORMER INSERTION LOSS + 0.97dB, 200 TO 250 POWER CONVERSION FACTOR) IF INPUT, 50 MINI CIRCUITS TC 4-1W 270 IF_IN+ IF_IN- NOTES: 3. Suggested filters have no DC coupling paths. DC blocking capacitors are not required at the respective ports. 4. Pi network for gain flatness across the band. 5 HFA3667 Shrink Small Outline Plastic Packages (SSOP) N INDEX AREA E -B1 2 3 0.25 0.010 h x 45o L GAUGE PLANE H 0.25(0.010) M BM M28.15 28 LEAD SHRINK NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 SEATING PLANE -AD -CA MILLIMETERS MIN 1.35 0.10 0.20 0.18 9.81 3.81 MAX 1.75 0.25 1.54 0.30 0.25 10.00 3.98 NOTES 9 3 4 5 6 7 8o Rev. 0 2/95 MIN 0.053 0.004 0.008 0.007 0.386 0.150 MAX 0.069 0.010 0.061 0.012 0.010 0.394 0.157 A2 B C D e B 0.17(0.007) M C A M BS A1 0.10(0.004) A2 C E e H h L 0.025 BSC 0.228 0.0099 0.016 28 0o 8o 0.244 0.0196 0.050 0.635 BSC 5.80 0.26 0.41 28 0o 6.19 0.49 1.27 NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "B" does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm (0.004 inch) total in excess of "B" dimension at maximum material condition. 10. Controlling dimension: INCHES. Converted millimeter dimensions are not necessarily exact. N 6 |
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