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| PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER FEATURES * 8 LVCMOS/LVTTL outputs (19 typical output impedance) * 2 Crystal oscillator input pairs 1 LVCMOS/LVTTL clock input * Crystal input frequencry range: 10MHz - 40MHz * Output frequency: 200MHz (typical) CLK0 * Output Skew: TBD * Part to Part Skew: TBD * RMS phase jitter @ 25MHz (100Hz - 1MHz): 0.22ps (typical) VDD = VDDO = 3.3V Offset Noise Power 100Hz .............. -111.4 dBc/Hz 1kHz .............. -139.9 dBc/Hz 10kHz .............. -157.3 dBc/Hz 100kHz .............. -157.5 dBc/Hz * Supply Voltage Modes: (Core/Output) 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V * 0C to 70C ambient operating temperature * Industrial temperature available upon request GENERAL DESCRIPTION The ICS83908-02 is a low skew, high performance 1-to-8 Crystal Oscillator/3.3V LVCMOS-to-3.3V HiPerClockSTM LVCMOS fanout buffer and a member of the HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS83908-02 has selectable single ended clock or two crystal-oscillator inputs. There is an output enable to disable the outputs by placing them into a high-impedance state. ICS Guaranteed output and part-to-part skew characteristics make the ICS83908-02 ideal for those applications demanding well defined performance and repeatability. BLOCK DIAGRAM OE CLK_SEL0 Pullup Pulldown PIN ASSIGNMENT VDD XTAL_IN0 XTAL_OUT0 VDDO Q0 Q1 GND Q2 Q3 VDDO CLK_SEL0 CLK0 Q0 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND XTAL_IN1 XTAL_OUT1 VDDO Q7 Q6 GND Q5 Q4 VDDO CLK_SEL1 OE CLK_SEL1 Pulldown XTAL_IN0 OSC 00 XTAL_OUT0 ICS83908-02 XTAL_IN1 OSC 01 8 LVCMOS Outputs XTAL_OUT1 Q7 CLK0 Pulldown 24-Lead, 173-MIL TSSOP 4.4mm x 7.8mm x 0.92mm body package G Package Top View 10 11 The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 83908AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Type Power Input Power Output Power Description Core supply pin. Crystal oscillator interface. XTAL_IN0 is the input. XTAL_OUT0 is the output. Output supply pins. Single-ended clock outputs. LVCMOS/LVTTL interface levels. TABLE 1. PIN DESCRIPTIONS Number 1 2, 3 4, 10, 15, 21 5, 6, 8, 9, 16, 17, 19, 20 7, 18, 24 11, 14 12 Name VDD XTAL_IN0, XTAL_OUT0 VDDO Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 GND CLK_SEL0, CLK_SEL1 CLK0 Power supply ground. Clock select inputs. See Table 3, Input Reference Function Table. Input Pulldown LVCMOS / LVTTL interface levels. Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels. Output enable. When LOW, outputs are in HIGH impedance state. 13 OE Input Pullup When HIGH, outputs are active. LVCMOS / LVTTL interface levels. Crystal oscillator interface. XTAL_IN1 is the input. XTAL_OUT1, 22, 23 Input XTAL_OUT1 is the output. XTAL_IN1 NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN RPULLUP RPULLDOWN CPD Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor Power Dissipation Capacitance (per output) VDDO = 3.465V VDDO = 2.625V VDDO = 2V VDDO = 3.3V 5% ROUT Output Impedance VDDO = 2.5V 5% VDDO = 1.8V 0.2V Test Conditions Minimum Typical 4 51 51 7 7 6 19 TBD TBD Maximum Units pF k k pF pF pF TABLE 3. INPUT REFERENCE FUNCTION TABLE Control Inputs CLK_SEL1 CLK_SEL0 0 0 0 1 1 1 0 1 Reference XTAL0 (default) XTAL1 CLK0 CLK0 83908AG-02 www.icst.com/products/hiperclocks.html 2 REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER 4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V 70C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V5%, TA = 0C TO 70C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 25 121 Maximum 3.465 3.465 Units V V mA mA TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 2.5V5%, TA = 0C TO 70C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 2.375 Typical 3.3 2.5 26 82 Maximum 3.465 2.625 Units V V mA mA TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V5%, VDDO = 1.8V0.2V, TA = 0C TO 70C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 1.6 Typical 3.3 1.8 26 53 Maximum 3.465 2.0 Units V V mA mA TABLE 4D. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 2.5V5%, TA = 0C TO 70C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 2.375 2.375 Typical 2. 5 2.5 13 77 Maximum 2.625 2.625 Units V V mA mA TABLE 4E. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V5%, VDDO = 1.8V0.2V, TA = 0C TO 70C Symbol VDD VDDO IDD IDDO 83908AG-02 Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 2.375 1.6 Typical 2.5 1.8 13 51 Maximum 2.625 2.0 Units V V mA mA www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 3 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Test Conditions VDD = 3.3V 5% VDD = 2.5V 5% VDD = 3.3V 5% VDD = 2.5V 5% CLK0, CLK_SEL0:1 OE CLK0, CLK_SEL0:1 OE VDD = 3.3V or 2.5V 5% VDD = 3.3V or 2.5V 5% VDD = 3.3V or 2.5V 5% VDD = 3.3V or 2.5V 5% VDDO = 3.3V 5%; NOTE 1 VDDO = 2.5V 5%; NOTE 1 VDDO = 1.8V 0.2V; NOTE 1 VDDO = 3.3V 5%; NOTE 1 -5 -150 2.6 1.8 1.5 0.5 0.5 0. 4 Minimum 2.0 1.7 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0. 8 0. 7 150 5 Units V V V V A A A A V V V V V V TABLE 4F. LVCMOS/LVTTL DC CHARACTERISTICS, TA = -40C TO 85C Symbol VIH VIL IIH Parameter Input High Voltage Input Low Voltage Input High Current IIL Input Low Current VOH Output HighVoltage VOL Output Low Voltage VDDO = 2.5V 5%; NOTE 1 VDDO = 1.8V 0.2V; NOTE 1 NOTE 1: Outputs terminated with 50 to VDDO/2. See Parameter Measurement section, "Load Test Circuit" diagrams. TABLE 5. CRYSTAL CHARACTERISTICS Parameter Mode of Oscillation / cut Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level 10 Test Conditions Minimum Typical Maximum 40 50 7 1 Units MHz pF mW Fundamental 83908AG-02 www.icst.com/products/hiperclocks.html 4 REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Test Conditions Minimum 10 200 2 TBD TBD 25MHz, (100Hz - 1MHz) 20% to 80% 0.22 457 50 10 8 Typical Maximum 40 Units MHz MHz ns ps ps ps ps % ns ns TABLE 6A. AC CHARACTERISTICS, VDD = VDDO = 3.3V 5%, TA = 0C TO 70C Symbol Parameter fMAX tpLH w/External Output Frequency XTAL w/External CLK Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2 Par t-to-Par t Skew; NOTE 2, 3 RMS Phase Jitter, Random; NOTE 2, 4 Output Rise/Fall Time Output Duty Cycle Output Enable Time; NOTE 5 t sk(o) t sk(pp) tjit(O) tR / tF odc tEN Output Disable Time; NOTE 5 tDIS NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. TABLE 6B. AC CHARACTERISTICS, VDD = 3.3V 5%, VDDO = 2.5V 5%, TA = 0C TO 70C Symbol Parameter fMAX tpLH w/External Output Frequency XTAL w/External CLK Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2 Par t-to-Par t Skew; NOTE 2, 3 RMS Phase Jitter, Random; NOTE 2, 4 Output Rise/Fall Time Output Duty Cycle Output Enable Time; NOTE 5 Test Conditions Minimum 10 200 2.2 TBD TBD 25MHz, (100Hz - 1MHz) 20% to 80% 0.21 463 50 10 8 Typical Maximum 40 Units MHz MHz ns ps ps ps ps % ns ns t sk(o) t sk(pp) tjit(O) tR / tF odc tEN Output Disable Time; NOTE 5 tDIS NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. 83908AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 5 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Test Conditions Minimum 10 200 2.5 TBD TBD 25MHz, (100Hz - 1MHz) 20% to 80% 0.22 487 50 10 8 Typical Maximum 40 Units MHz MHz ns ps ps ps ps % ns ns TABLE 6C. AC CHARACTERISTICS, VDD = 3.3V 5%, VDDO = 1.8V0.2V, TA = 0C TO 70C Symbol Parameter fMAX tpLH w/External Output Frequency XTAL w/External CLK Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2 Par t-to-Par t Skew; NOTE 2, 3 RMS Phase Jitter, Random; NOTE 2, 4 Output Rise/Fall Time Output Duty Cycle Output Enable Time; NOTE 5 t sk(o) t sk(pp) tjit(O) tR / tF odc tEN Output Disable Time; NOTE 5 tDIS NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. TABLE 6D. AC CHARACTERISTICS, VDD = VDDO = 2.5V 5%, TA = 0C TO 70C Symbol Parameter fMAX tpLH w/External Output Frequency XTAL w/External CLK Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2 Par t-to-Par t Skew; NOTE 2, 3 RMS Phase Jitter, Random; NOTE 2, 4 Output Rise/Fall Time Output Duty Cycle Output Enable Time; NOTE 5 Test Conditions Minimum 10 200 2.3 TBD TBD 25MHz, (100Hz - 1MHz) 20% to 80% 0.29 470 50 10 8 Typical Maximum 40 Units MHz MHz ns ps ps ps ps % ns ns t sk(o) t sk(pp) tjit(O) tR / tF odc tEN Output Disable Time; NOTE 5 tDIS NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. 83908AG-02 www.icst.com/products/hiperclocks.html 6 REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER Test Conditions Minimum 10 200 2.6 TBD TBD 25MHz, (100Hz - 1MHz) 20% to 80% 0.3 518 50 10 8 Typical Maximum 40 Units MHz MHz ns ps ps ps ps % ns ns TABLE 6E. AC CHARACTERISTICS, VDD = 2.5V 5%, VDDO = 1.8V0.2V, TA = 0C TO 70C Symbol Parameter fMAX tpLH w/External Output Frequency XTAL w/External CLK Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2 Par t-to-Par t Skew; NOTE 2, 3 RMS Phase Jitter, Random; NOTE 2, 4 Output Rise/Fall Time Output Duty Cycle Output Enable Time; NOTE 5 t sk(o) t sk(pp) tjit(O) tR / tF odc tEN Output Disable Time; NOTE 5 tDIS NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output. NOTE 2: This parameter is defined in accordance with JEDEC Standard 65. NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: These parameters are guaranteed by characterization. Not tested in production. 83908AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 7 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER TYPICAL PHASE NOISE AT 25MHZ @ 3.3V NOISE POWER dBc Hz 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 25MHz RMS Phase Jitter (Random) 100Hz to 1MHz = 0.22ps (typical) Raw Phase Noise Data 83908AG-02 www.icst.com/products/hiperclocks.html 8 100k 1M OFFSET FREQUENCY (HZ) REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER PARAMETER MEASUREMENT INFORMATION 1.65V5% 1.25V5% VDD, VDDO SCOPE Qx VDD , VDDO SCOPE Qx LVCMOS GND LVCMOS GND -1.65V5% -1.25V5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT 2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 2.05V5% 1.25V5% 2.4V0.065V 0.9V0.1V VDD VDDO SCOPE Qx VDD VDDO SCOPE Qx LVCMOS GND LVCMOS GND -1.25V5% -0.9V0.1V 3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 1.6V0.025V 0.9V0.1V 3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT V DD VDDO SCOPE Qx Part 1 Qx V DDO 2 LVCMOS GND Part 2 Qy V DDO 2 tsk(pp) -0.9V0.1V 2.5 CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT 83908AG-02 PART-TO-PART SKEW REV. A JULY 20, 2005 www.icst.com/products/hiperclocks.html 9 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER VDD 80% 20% tR 80% 20% tF CLK0 2 VDDO Q0:Q7 2 tpLH Clock Outputs PROPAGATION DELAY OUTPUT RISE/FALL TIME V DDO Q0:Q7 2 t PW t PERIOD odc = t PW t PERIOD x 100% OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 83908AG-02 www.icst.com/products/hiperclocks.html 10 REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER APPLICATION INFORMATION CRYSTAL INPUT INTERFACE A crystal can be characterized for either series or parallel mode operation. The ICS83908-02 has a built-in crystal oscillator circuit. This interface can accept either a series or parallel crystal without additional components and generate frequencies with accuracy suitable for most applications. Additional accuracy can be achieved by adding two small capacitors C1 and C2 as shown in Figure 1. Typical results using parallel 18pF crystals are shown in Table 5. XTAL_OUT C1 15p X1 18pF Parallel Crystal XTAL_IN C2 15p Figure 1. Crystal Input Interface RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS INPUTS: OUTPUTS: CRYSTAL INPUT: For applications not requiring the use of the crystal oscillator input, both XTAL_IN and XTAL_OUT can be left floating. Though not required, but for additional protection, a 1k resister can be tied from XTAL_IN to ground. CLK INPUT: For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1k resister can be tied from the CLK input to ground. SELECT PINS: All select pins have internal pull-ups and pull-downs; additional resistance is not required but can be added for additional protection. A 1k resister can be used. LVCMOS OUTPUT: All unused LVCMOS output can be left floating. We recommend that there is no trace attached. 83908AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 11 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER RELIABILITY INFORMATION TABLE 7. JAVS. AIR FLOW TABLE FOR 24 LEAD TSSOP JA by Velocity (Meters per Second) 0 Multi-Layer PCB, JEDEC Standard Test Boards 70C/W 1 65C/W 2.5 62C/W TRANSISTOR COUNT The transistor count for ICS83908-02 is: 277 83908AG-02 www.icst.com/products/hiperclocks.html 12 REV. A JULY 20, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER FOR PACKAGE OUTLINE - G SUFFIX 24 LEAD TSSOP TABLE 8. PACKAGE DIMENSIONS SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 7.70 6.40 BASIC 4.50 Millimeters Minimum 24 1.20 0.15 1.05 0.30 0.20 7.90 Maximum REFERENCE DOCUMENT: JEDEC PUBLICATION 95, MO-153 83908AG-02 www.icst.com/products/hiperclocks.html REV. A JULY 20, 2005 13 PRELIMINARY Integrated Circuit Systems, Inc. ICS83908-02 LOW SKEW, 1-TO-8 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER TABLE 9. ORDERING INFORMATION Part/Order Number ICS83908AG-02 ICS83908AG-02T Marking ICS83908AG-02 ICS83908AG-02 Package 24 Lead TSSOP 24 Lead TSSOP Shipping Packaging tube 2500 tape & reel Temperature 0C to 70C 0C to 70C The aforementioned trademark, HiPerClockSTM is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 83908AG-02 www.icst.com/products/hiperclocks.html 14 REV. A JULY 20, 2005 |
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