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PD 9.1407
PRELIMINARY
IRFIZ48N
HEXFET(R) Power MOSFET
D
l l l l l
Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated
U
G
VDSS = 55V RDS(on) = 0.016 ID = 36A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
36 25 210 42 0.28 20 270 32 4.2 5.6 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Typ.
--- ---
Max.
3.6 65
Units
C/W
IRFIZ48N
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS I GSS Qg Q gs Q gd t d(on) tr t d(off) tf LD LS Ciss Coss Crss C
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance
Min. Typ. Max. Units Conditions 55 --- --- V VGS = 0V, ID = 250A --- 0.052 --- V/C Reference to 25C, ID = 1mA --- --- 0.016 VGS = 10V, ID = 22A 2.0 --- 4.0 V VDS = VGS , ID = 250A 22 --- --- S VDS = 25V, I D = 32A --- --- 25 VDS = 55V, VGS = 0V A --- --- 250 VDS = 44V, VGS = 0V, TJ = 150C --- --- 100 VGS = 20V nA --- --- -100 VGS = -20V --- --- 89 I D = 32A --- --- 20 nC VDS = 44V --- --- 39 VGS = 10V, See Fig. 6 and 13 --- 11 --- VDD = 28V --- 78 --- I D = 32A ns --- 32 --- RG = 5.1 --- 48 --- RD = 0.85, See Fig. 10 Between lead, 4.5 --- --- 6mm (0.25in.) nH G from package --- 7.5 --- and center of die contact --- 1900 --- VGS = 0V --- 620 --- VDS = 25V pF --- 270 --- = 1.0MHz, See Fig. 5 --- 12 --- = 1.0MHz
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD t rr Q rr Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 94 360 36 A 210 1.3 140 540 V ns nC
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = 22A, VGS = 0V TJ = 25C, IF = 32A di/dt = 100A/s
D
S
Q Repetitive rating; pulse width limited by
RV SI
max. junction temperature. ( See fig. 11 )
DD = 25V, starting TJ = 25C, L = 530H RG = 25, IAS = 32A. (See Figure 12)
T Pulse width 300s; duty cycle 2%. U t=60s, =60Hz
Uses IRFZ48N data and test conditions
SD 32A, di/dt 250A/s, VDD V(BR)DSS, TJ 175C
IRFIZ48N
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I , Drain-to-Source Current (A) D
I , Drain-to-Source Current (A) D
100
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
10
4.5V
1
1
4.5V
0.1 0.1
20s PULSE WIDTH TC = 25C
10
A
0.1 0.1 1
20s PULSE WIDTH TC = 175C
10 100
A
1
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics, TJ = 25oC
Fig 2. Typical Output Characteristics, TJ = 175oC
1000
2.5
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 53A
I D , Drain-to-Source Current (A)
2.0
100
TJ = 175C
10
1.5
TJ = 25C
1.0
1
0.5
0.1 4 5 6 7
V DS= 25V 20s PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20
VGS = 10V
0 20 40 60
A
8 0 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRFIZ48N
4000
, Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + C gd , Cds SHORTED Crss = Cgd Coss = Cds + C gd
20
I D = 32A V DS 44V = V DS 28V =
16
C, Capacitance (pF)
3000
Ciss
12
2000
Coss
8
GS
1000
Crss
V
4
0 1 10 100
A
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80 100
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
100
I D , Drain Current (A)
TJ = 175C
10
100
10s
TJ = 25C
100s
10
1ms
1
10ms
0.1 0.2 0.6 1.0 1.4 1.8
VGS = 0V
2.2
A
1 1
TC = 25C TJ = 175C Single Pulse
10 100
A
2.6
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRFIZ48N
VDS
40
RD
VGS RG
D.U.T.
+
I D, Drain Current (Amps)
-VDD
30
10V
Pulse Width 1 s Duty Factor 0.1 % 20
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0 25 50 75 100 125 150
A
175
TC , Case Temperature (C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
10
Fig 10b. Switching Time Waveforms
Thermal Response (ZthJC )
D = 0.50 1 0.20 0.10 0.05
P DM
0.1
0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
Notes: 1. Duty factor D = t
t
1 t2
1
/t
2
0.01 0.00001
2. Peak TJ = PDM x Z thJC + T C
A
10
0.0001
0.001
0.01
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFIZ48N
E AS , Single Pulse Avalanche Energy (mJ)
700
15V
600
ID 13A 22A BOTTOM 32A TOP
V DS
L
DRIVER
500
RG 20V tp
D.U.T IAS 0.01
+ V - DD
400
A
300
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
100
0
VDD = 25V
25 50 75 100 125 150
A
175
Starting TJ , Junction Temperature (C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRFIZ48N
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
S
-
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
R
-
+ -
T
+
Q
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
IRFIZ48N
Package Outline -- TO-220 Fullpak
Dimensions are shown in millimeters (inches)
10.60 (.417) 10.40 (.409)
o
3.40 (.133) 3.10 (.123) -A-
4.80 (.189) 4.60 (.181)
2.80 (.110) 2.60 (.102) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE
3.70 (.145) 3.20 (.126)
7.10 (.280) 6.70 (.263)
16.00 (.630) 15.80 (.622)
1.15 (.045) MIN. 1 2 3
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982 2 CONTROLLING DIMENSION: INCH.
3.30 (.130) 3.10 (.122) -B13.70 (.540) 13.50 (.530) C D
A 1.40 (.055) 3X 1.05 (.042) 2.54 (.100) 2X 0.90 (.035) 3X 0.70 (.028) 0.25 (.010) M AM B 3X 0.48 (.019) 0.44 (.017)
B
2.85 (.112) 2.65 (.104)
MINIMUM CREEPAGE DISTANCE BETWEEN A-B-C-D = 4.80 (.189)
Part Marking
EXAMPLE : THIS IS IRF1010 EXAMPLE : THIS IS AN AN IRFI840G WITH ASSEMBLY WITH ASSEMBLY LOTLOT CODE E401 CODE 9B1M
A
INTERNATIONAL INTERNATIONAL RECTIFIER IRF1010 RECTIFIER IRFI840G LOGO 9246 LOGO 9B 1M E401 9245 ASSEMBLY ASSEMBLY LOT CODE LOT CODE
PART NUMBERA
PART NUMBER
DATE CODE DATE CODE (YYWW) (YYWW) YY = YEAR YY = WEEK WW = YEAR
WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 4/96

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