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Freescale Semiconductor Advance Information
Document Number: MC33661 Rev. 6.0, 11/2006
Local Area Network (LIN) Enhanced Physical Interface with Selectable Slew Rate
Local Interconnect Network (LIN) is a serial communication protocol designed to support automotive networks in conjunction with Controller Area Network (CAN). As the lowest level of a hierarchical network, LIN enables cost-effective communication with sensors and actuators when all the features of CAN are not required. The 33661 is a Physical Layer component dedicated to automotive LIN sub-bus applications. It offers slew rate selection for optimized operation at 10 kbps and 20 kbps, fast baud rate (above 100 kbps) for test and programming modes, excellent radiated emission performance, and safe behavior in the event of LIN bus short-to-ground or LIN bus leakage during low-power mode. The 33661 is compatible with LIN Protocol Specification 2.0. Features * Operational from VSUP 6.0 V to 18 V DC, Functional up to 27 V DC, and Handles 40 V During Load Dump * Active Bus Waveshaping Offering Excellent Radiated Emission Performance * 5.0 kV ESD on LIN Bus Pin * 30 k Internal Pullup Resistor * LIN Bus Short-to-Ground or High Leakage in Sleep Mode * -18 V to +40 V DC Voltage at LIN Pin * 8.0 A in Sleep Mode * Local and Remote Wake-Up Capability Reported by INH and RXD Pins * 5.0 V and 3.3 V Compatible Digital Inputs Without Any External Components Required * Pb-Free Packaging Designated by Suffix Code EF
33661
LIN PHYSICAL INTERFACE
D SUFFIX EF SUFFIX (PB-FREE) 98ASB42564B 8-PIN SOICN
ORDERING INFORMATION
Device MC33661D/R2 - 40C to 125C MCZ33661EF/R2 8 SOICN Temperature Range (TA) Package
VPWR
33661 WAKE VDD
Regulator 12 V 5.0 V
VSUP INH
EN MCU RXD TXD LIN GND LIN Bus
Figure 1. 33661 Simplified Application Diagram
* This document contains certain information on a new product. Specifications and information herein are subject to change without notice.
(c) Freescale Semiconductor, Inc., 2006. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VSUP
WAKE EN
INH Control
20 A
INH Control
RXD Receiver
30 k LIN
TXD Slope Control GND
Figure 2. 33661 Simplified Internal Block Diagram
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PIN CONNECTIONS
PIN CONNECTIONS
RXD EN WAKE TXD
1 2 3 4
8 7 6 5
INH VSUP LIN GND
Figure 3. 33661 8-SOICN Pin Connections Table 1. 33661 8-SOICN Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page page 12.
Pin 1 2 3 4 5 6 7 8 Pin Name RXD EN WAKE TXD GND LIN VSUP
INH
Formal Name Data Output Enable Control Wake Input Data Input Ground LIN Bus Power Supply Inhibit Output
Definition MCU interface that reports the state of the LIN bus voltage. Controls the operation mode of the interface. High-voltage input used to wake up the device from Sleep mode. MCU interface to control the state of the LIN output. Device ground pin. Bidirectional pin that represents the single-wire bus transmitter and receiver. Device power supply pin. This pin can have two main functions: controlling an external switchable voltage regulator having an inhibit input or driving a bus external resistor in the master node application.
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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.
Ratings ELECTRICAL RATINGS Power Supply Voltage Continuous Supply Voltage Transient Voltage (Load Dump) WAKE DC and Transient Voltage (Through a 33 k Serial Resistor) Logic Voltage (RXD, TXD, EN Pins) LIN Bus Voltage DC Voltage Transient (Coupled Through 1.0 nF Capacitor) INH Voltage / Current DC Voltage DC Current ESD Voltage (1) Human Body Model All Pins LIN Pin with Respect to Ground Machine Model THERMAL RATINGS Operating Temperature Ambient Junction Storage Temperature Thermal Resistance, Junction to Ambient Peak Package Reflow Temperature During Reflow Thermal Shutdown Temperature Thermal Shutdown Hysteresis Temperature
(2), (3)
Symbol
Value
Unit
VSUP 27 40 VWAKE VLOG VBUS -18 to 40 -150 to 100 VINH IINH VESD1 2000 5000 VESD2 200 - 0.3 to VSUP + 0.3 40 -18 to 40 - 0.3 to 5.5
V
V V V
V mA V
C TA TJ TSTG RJA TPPRT TSHUT THYST - 40 to 125 - 40 to 150 - 40 to 150 150 Note 3. 150 to 200 8.0 to 20 C C/W C C C
Notes 1 ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ), ESD2 testing is performed in accordance with the Machine Model (CZAP = 220 pF, RZAP = 0 ). 2 3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Freescale's Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
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ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic VSUP PIN (DEVICE POWER SUPPLY) Supply Voltage Nominal DC Functional DC, TA 25C Supply Current in Sleep Mode VSUP 13.5 V, Recessive State 13.5 V < VSUP < 18 V VSUP 13.5 V, Dominant State or Shorted to GND Supply Current in Normal, Slow, or Fast Mode Bus Recessive, Excluding INH Output Current Bus Dominant, Total Bus Load > 500 , Excluding INH Output Current RXD OUTPUT PIN (LOGIC) Low-Level Output Voltage IIN 1.5 mA High-Level Output Voltage VEN = 5.0 V, IOUT 250 A VEN = 3.3 V, IOUT 250 A TXD INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Threshold Voltage Hysteresis Pullup Current Source VEN = 5.0 V, 1.0 V < VTXD < 3.5 V EN INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Voltage Threshold Hysteresis Low-Level Input Current VIN = 1.0 V High-Level Input Current VIN = 4.0 V IIH -- 20 40 VIL VIH VINHYST IIL 5.0 20 30 A -- 2.5 100 -- -- 300 1.2 -- 800 V V mV A VIL VIH VINHYST IPU - 60 - 35 - 20 -- 2.5 100 -- -- 300 1.2 -- 800 V V mV A VOH 4.25 3.0 -- -- 5.25 3.5 VOL 0 -- 0.9 V V IS(REC) IS(DOM) -- -- 4.0 6.0 6.0 8.0 IS1 IS2 IS3 -- -- -- 8.0 -- 300 12 200 -- mA VSUP 7.0 6.0 13.5 -- 18.0 -- A V Symbol Min Typ Max Unit
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ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic LIN PIN (VOLTAGE EXPRESSED VERSUS VSUP VOLTAGE) Low-Level Bus Voltage (Dominant State) External Bus Pullup 500 High-Level Bus Voltage (Recessive State) TXD HIGH, IOUT = 1.0 A Internal Pullup Resistor to VSUP (Normal Mode) Internal Pullup Current Source (Sleep Mode) Overcurrent Shutdown Threshold Leakage Current to GND Recessive State, 8.0 V VSUP 18 V, 8.0 V VLIN 18 V GND Disconnected, VGND = VSUP, VLIN at - 18 V VSUP Disconnected, VLIN at +18 V LIN Receiver, Low-Level Input Voltage TXD HIGH, RXD LOW LIN Receiver, High-Level Input Voltage TXD HIGH, RXD HIGH LIN Receiver Threshold Center (VLINH - VLINL) / 2 LIN Receiver Input Voltage Hysteresis VLINH - VLINL LIN Wake-Up Threshold Voltage INH OUTPUT PIN Driver ON Resistance (Normal Mode) Leakage Current (Sleep Mode) 0 V < VINH < VSUP WAKE INPUT PIN Typical Wake-Up Threshold Voltage (EN = 0 V, 7.0 V VSUP 18 V) (5) HIGH-to-LOW Transition LOW-to-HIGH Transition Wake-Up Threshold Voltage Hysteresis WAKE Input Current VWAKE < 27 V VWUHYST IWU -- 1.0 5.0 VWUTH 0.3 VSUP 0.4 VSUP 0.1 VSUP 0.43 VSUP 0.55 VSUP 0.16 VSUP 0.55 VSUP 0.65 VSUP 0.2 VSUP V A V INHON ILEAK 0 -- 5.0 -- 35 70 A VLINWU VLINHYST -- -- -- 0.5 VSUP 0.175 VSUP -- V VLINTH 0.475 VSUP 0.5 VSUP 0.525 VSUP V VLINH 0.6 VSUP -- VSUP V VLINL 0 VSUP -- 0.4 VSUP V RPU IPU IOV-CUR ILEAK 0 - 1.0 -- 3.0 -- 1.0 20 1.0 10 A mA A V VREC VSUP - 1.0 20 -- 50 -- 30 20 75 -- 47 -- 150 k A mA VDOM -- -- 1.4 V V Symbol Min Typ Max Unit
Notes 4 This parameter is guaranteed by design; however, it is not production tested. 5 When VSUP > 18 V, the wake-up voltage thresholds remain identical to the wake-up thresholds at 18 V.
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ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic LIN OUTPUT TIMING CHARACTERISTICS FOR NORMAL MODE Dominant Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 58.1% VSUP) Measurement Threshold (50% TXD to 28.4% VSUP) Recessive Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 42.2% VSUP) Measurement Threshold (50% TXD to 74.4% VSUP) Propagation Delay Time Symmetry t DOM (MIN) to t REC (MAX) t DOM (MAX) to t REC (MIN) LIN OUTPUT TIMING CHARACTERISTICS FOR SLOW MODE Dominant Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 61.6% VSUP) Measurement Threshold (50% TXD to 25.1% VSUP) Recessive Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 38.9% VSUP) Measurement Threshold (50% TXD to 77.8% VSUP) Propagation Delay Time Symmetry t DOM (MIN) to t REC (MAX) t DOM (MAX) to t REC (MIN) LIN OUTPUT DRIVER FAST MODE LIN Fast Slew Rate (Programming Mode) Fast Slew Rate LIN PIN Overcurrent Shutdown Delay Time (7) LIN RECEIVER CHARACTERISTICS Receiver Dominant Propagation Delay Time (8) LIN LOW to RXD LOW Receiver Recessive Propagation Delay Time (8) LIN HIGH to RXD HIGH Receiver Propagation Delay Time Symmetry t RL - t RH Notes 6 7.0 V VSUP 18 V. Bus load R0 and C0: 1.0 nF / 1.0 k, 6.8 nF / 660 , 10 nF / 500 . 7 8 This parameter is guaranteed by design; however, it is not production tested. Measured between LIN signal threshold VLINL or VLINH and 50% of RXD signal. t R-SYM - 2.0 -- 2.0 t RH -- 3.5 6.0 s t RL -- 3.5 6.0 s s dv/dt fast -- 15 -- V/s dt1S dt 2S - 21.88 - 21.88 -- -- 17.44 17.44 t REC (MIN) t REC (MAX) -- -- -- -- 100 100 s t DOM (MIN) t DOM (MAX) -- -- -- -- 100 100 s s dt1 dt2 - 10.44 - 10.44 -- -- 8.12 8.12 t REC (MIN) t REC (MAX) -- -- -- -- 50 50 s t DOM (MIN) t DOM (MAX) -- -- -- -- 50 50 s s Symbol Min Typ Max Unit
t OV-DELAY
--
10
--
s
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ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic SLEEP MODE AND WAKE-UP TIMINGS EN Pin Wake-Up Time (9) WAKE Pin Filter Time
(10) (11)
Symbol
Min
Typ
Max
Unit
t LWUE t WF t WUF t SD
-- 10 40
5.0 -- 70
15 70 120
s s s s
LIN Pin Wake-Up Filter Time (LIN Bus Wake-Up) Sleep Mode Delay Time EN HIGH-to-LOW
(12)
50 tSD_INH -- t D_MS t D_COM 5.0 50
--
-- s
Delay for INH Turning off When Device Enters in Sleep Mode(16), (17) EN HIGH-to-LOW and INH HIGH-to-LOW Delay Time Between EN and TXD for Mode Selection (13), (14) Delay Time Between First TXD after Device Mode Selection (13), (14) FAST BAUD RATE TIMING Delay Entering Fast Baud Rate Using Toggle Function (15) EN LOW to EN HIGH Delay on EN Pin Resetting Fast Baud Rate to Previous Baud Rate (15) EN LOW to EN HIGH Notes 9 10 11 12 13 14 15 16 17
-- -- --
50 -- -- s s
t1 -- t2 -- -- 5.0 -- 35
s s
See Figures 7 and 8, 10. See Figures 9 and 10, 10. See Figures 11 and 12, 11. See Figure 14a, 11. See Figures 7 through 12, pp. 10-11. This parameter is guaranteed by design; however, it is not production tested. See Figure 13, 11. No capacitor is connected to the INH pin. Measurement is done between the EN HIGH-to-LOW transition at 80% of INH voltage. See Figure 14b, 11.
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ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS
TIMING DIAGRAMS
TXD Recessive State VREC LIN 58.1% VSUP t DOM(MIN) 40% VSUP 28.4% VSUP VDOM Dominant State t REC(MIN) RXD tRL tRH 60% VSUP 42.2% VSUP t REC(MAX) 74.4% VSUP
t DOM(MAX)
Figure 4. Normal Mode Bus Timing Characteristics
TXD Recessive State VREC LIN 61.6% VSUP t DOM(MIN) 40% VSUP 25.1% VSUP VDOM Dominant State t REC(MIN) 60% VSUP 38.9% VSUP t REC(MAX) 77.8% VSUP
t DOM(MAX)
RXD t RL
t RH
Figure 5. Slow Mode Bus Timing Characteristics
VSUP
VSUP TXD LIN RXD GND R0 C0
Note R0 and C0: 1.0 k/1.0 nF, 660 /6.8 nF, and 500 /10 nF.
Figure 6. Test Circuit for Timing Measurements
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ELECTRICAL CHARACTERISTICS FUNCTIONAL DIAGRAMS
FUNCTIONAL DIAGRAMS
EN INH t LWUE TXD t D_MS t D_COM
WAKE t WF INH EN TXD t D_MS LIN (High Z) RXD (High Z) t D_COM
LIN
RXD
Figure 7. EN Pin Wake-Up and Normal Baud Rate Selection (1.0 kbps to 20 kbps)
Figure 9. WAKE Pin Wake-Up and Normal Baud Rate Selection (1.0 kbps to 20 kbps)
EN INH t LWUE TXD
WAKE
t WF
INH EN TXD
t D_MS
t D_COM
t D_MS
LIN RXD (High Z)
t D_COM
LIN
RXD (High Z)
Figure 8. EN Pin Wake-Up and Slow Baud Rate Selection (1.0 kbps to 10 kbps)
LIN
Figure 10. WAKE Pin Wake-Up and Slow Baud Rate Selection (1.0 kbps to 10 kbps)
Wake-Up Frame 0.4 VSUP tWUF INH EN TXD
t D_MS (High Z)
t D_COM
RXD
Figure 11. LIN Bus Wake-Up and Normal Baud Rate Selection (1.0 kbps to 20 kbps)
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ELECTRICAL CHARACTERISTICS FUNCTIONAL DIAGRAMS
LIN
Wake-Up Frame 0.4 VSUP t WUF
INH EN TXD t D_MS t D_COM RXD (High Z)
Figure 12. LIN Bus Wake-Up and Slow Baud Rate Selection (1.0 kbps to 10 kbps)
EN = HIGH and TXD = HIGH
EN
EN
TXD EN = LOW and TXD = HIGH t 1 (35 s) Toggle
t 2 (5.0 s) Reset to Previous Baud Rate
Figure 13. Fast Baud Rate Selection (Toggle Function)
EN TXD
Device in Communication Mode
Preparation to Sleep Mode t SD
Sleep Mode
Figure 14a
EN Preparation to Sleep Mode INH Normal or Slow Mode t SD_INH Sleep Mode
Figure 14b Figure 14. Sleep Mode Enter
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FUNCTIONAL DESCRIPTION INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 33661 is a Physical Layer component dedicated to automotive LIN sub-bus applications. The 33661 features include slew rate selection for optimized operation at 10 kbps and 20 kbps, fast baud rate for test and programming modes, excellent radiated emission performance, and safe behavior in case of LIN bus short-toground or LIN bus leakage during low power mode. Digital inputs are 5.0 V and 3.3 V compatible without any external component required. The INH output may be used to control an external voltage regulator or to drive a LIN bus pullup resistor.
FUNCTIONAL PIN DESCRIPTION POWER SUPPLY PIN (VSUP)
The VSUP supply pin is the power supply pin for the 33661. The pin is connected to a battery through a serial diode for reverse battery protection. The DC operating voltage is from 7.0 V to 27 V. This pin sustains standard automotive voltage conditions such as 27 V DC during jumpstart conditions and 40 V during load dump. Supply current in the Sleep mode is typically 8.0 A.
DATA INPUT PIN (TXD)
The TXD input pin is the MCU interface to control the state of the LIN output. When TXD is LOW, LIN output is LOW; when TXD is HIGH, the LIN output transistor is turned OFF. The threshold is 3.3 V and 5.0 V compatible. The baud rate selection (normal or Slow mode) is done at device wake-up by the state of the TXD pin prior to a HIGH level at the EN pin (see Figures 7 through 12, pp. 10-11).
GROUND PIN (GND)
In case of a ground disconnection at the module level, the 33661 does not have significant current consumption on the LIN bus pin when in the recessive state. (Less than 100 A is sourced from LIN bus pin, which creates 100 mV drop voltage from the 1.0 k LIN bus pullup resistor.)
DATA OUTPUT PIN (RXD)
The RXD output pin is the MCU interface, which reports the state of the LIN bus voltage. LIN HIGH (recessive) is reported by a high voltage on RXD; LIN LOW (dominant) is reported by a low voltage on RXD. The RXD output structure is a CMOS-type push-pull output stage. The low level is fixed. The high level is dependant on the EN voltage. If EN is set at 3.3 V, RXD VOH is 3.3 V. If EN is set at 5.0 V, RXD VOH is 5.0 V. In the Sleep mode, RXD is high impedance. When a wakeup event is recognized from WAKE pin or from the LIN bus pin, RXD is pulled LOW to report the wake-up event. An external pullup resistor may be needed.
LIN BUS PIN (LIN)
This I/O pin represents the single-wire bus transmitter and receiver. Transmitter Characteristics The LIN driver is a low-side MOSFET with internal overcurrent thermal shutdown. An internal pullup resistor with a serial diode structure is integrated so no external pullup components are required for the application in a slave node. An additional pullup resistor of 1.0 k must be added when the device is used in the master node. Voltage can go from - 18 V to 40 V without current other than the pullup resistance. The LIN pin exhibits no reverse current from the LIN bus line to VSUP, even in the event of GND shift or VPWR disconnection. The transmitter has two slew rate selections: 20 kbps (normal slew rate) and 10 kbps (slow slew rate). The slow slew rate can be used to improve radiated emissions. Receiver Characteristics The receiver thresholds are ratiometric with the device supply pin.
ENABLE INPUT PIN (EN)
The EN input pin controls the operation mode of the interface. If EN = 1, the interface is in Normal mode, with transmission path from TXD to LIN and from LIN to RXD both active. The threshold is 3.3 V and 5.0 V compatible. The high level at EN defines the VOH at RXD. The Sleep mode is entered by setting EN LOW while TXD is HIGH. Sleep mode is active after the t SD filter time (see Figure 14, 11).
INHIBIT OUTPUT PIN (INH)
The INH output pin may have two main functions. It may be used to control an external switchable voltage regulator having an inhibit input. The high drive capability also allows it to drive the bus external resistor in the master node application. This is illustrated in Figures 18 and 19, 17. In Sleep mode, INH is turned OFF. If a voltage regulator inhibit input is connected to INH, the regulator will be disabled. If the master node pullup resistor is connected to INH, the pullup resistor will be disabled from the LIN bus.
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FUNCTIONAL DESCRIPTION FUNCTIONAL PIN DESCRIPTION
WAKE INPUT PIN (WAKE)
The WAKE pin is a high-voltage input used to wake up the device from the Sleep mode. WAKE is usually connected to an external switch in the application. The typical wake thresholds are VSUP / 2. The WAKE pin has a special design structure and allows wake-up from both HIGH-to-LOW or LOW-to-HIGH transitions. When entering into Sleep mode, the LIN monitors the state of the WAKE pin and stores it as a reference state. The opposite state of this reference state will be the wake-up event used by the device to enter again into Normal mode.
An internal filter is implemented (40 s typical filtering time delay). WAKE pin input structure exhibits a high impedance, with extremely low input current when voltage at this pin is below 14 V. When voltage at the WAKE pin exceeds 14 V, input current starts to sink into the device. A serial resistor should be inserted in order to limit the input current mainly during transient pulses. Recommended resistor value is 33 k. Important The WAKE pin should not be left open. If the wake-up function is not used, WAKE should be connected to ground to avoid false wake-up.
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FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
As described below and depicted in Figure 15 and Table 5 on 15, the 33661 has two operational modes, Normal and Sleep. Normal mode may be adjusted to improve radiated emissions by changing the slew rate of the LIN bus output to Fast or Slow mode. In addition, there are two transitional modes: Awake Mode, which allows the device to go in Normal or Slow mode, and Wait Slow mode, which is a temporary state before the device enters the Slow mode.
SLEEP MODE
In the Sleep mode, the transmission path is disabled and the 33661 is in low power mode. Supply current from VSUP is very low. Wake-up can occur from LIN bus activity from node internal wake-up through the EN pin and from the WAKE input pin. In the Sleep mode, the 33661 has an internal 20 A pullup source to VSUP. This avoids the high current path from the battery to ground in the event the bus is shorted to ground. (Refer to succeeding paragraphs describing wake-up behavior.)
NORMAL MODE
In the Normal mode, the 33661 has slew rate and timing compatible with the LIN protocol specification and operates from 1.0 kbps to 20 kbps. This mode is selected after Sleep mode by setting the TXD pin HIGH prior to setting EN from LOW to HIGH. Once Normal mode is selected, it is impossible to select the Slow mode unless the 33661 is set to Sleep mode. Slow Mode In the Slow mode, the slew rate is around half the normal slew rate, and bus speed operation ranges from 1.0 kbps to 10 kbps. The radiated emission is significantly reduced compared to the already excellent emission level of the Normal mode. Slow mode is entered after Sleep mode by setting the TXD pin LOW prior to setting EN from LOW to HIGH. Once the Slow mode is selected, it is impossible to select the Normal mode unless the device is set to Sleep mode. Fast Mode In the Fast mode, the slew rate is around 10 times faster than the Normal mode. This allows very fast data transmission (> 100 kbps) -- for instance, for electronic control unit (ECU) tests and microcontroller program download. The bus pullup resistor might be reduced to ensure a correct RC time constant in line with the high baud rate used. Fast mode can be selected from either Normal or Slow mode. Fast mode is entered via a special sequence (called toggle function) as follows: TXD and EN pins set LOW, then TXD pulled HIGH, and at the EN pin LOW-to-HIGH transition, the device enters into the Fast Baud Rate. The duration of this sequence must be less than 35 s. The toggle function is described in Figure 13, 11. Once in the Fast mode, two different procedures will bring the device back to the previously selected mode (Normal or Slow): * The toggle function already described. * A glitch on EN where t 2 < 5.0 s also resets the device to the previously selected mode (Normal or Slow) (Figure 13).
DEVICE POWER-UP (AWAKE TRANSITIONAL MODE)
At power-up (VSUP rises from zero), the 33661 automatically switches to the Awake transitional mode. It switches the INH pin to HIGH state and RXD to LOW state. The MCU of the application will then confirm Normal or Slow mode by setting the TXD and EN pins appropriately.
DEVICE WAKE-UP EVENTS
The 33661 can be awakened from Sleep mode by three wake-up events: * Remote wake-up via LIN bus activity * Internal node wake-up via the EN pin * Toggling the WAKE pin Remote Wake from LIN Bus (Awake Transitional Mode) The LIN bus wake-up is recognized by a recessive-todominant transition, followed by a dominant level with a duration greater than 70 s, followed by a dominant-torecessive transition. This is illustrated in Figures 11 and 12 on 11. Once the wake-up is detected, the 33661 enters the Awake transitional mode, with INH HIGH and RXD pulled LOW. Wake-Up from Internal Node Activity (Normal or Wait Slow Mode) The 33661 can wake up by internal node activity through a LOW-to-HIGH transition of the EN pin. When EN is switched from LOW to HIGH, the device is awakened and enters either the Normal or the Wait Slow transitional mode depending on the level of TXD input. The MCU must set the TXD pin LOW or HIGH prior to waking up the device through the EN pin. Wake-Up from WAKE Pin (Awake Transitional Mode) If the WAKE input pin is toggled, the 33661 enters the Awake transitional mode, with INH HIGH and RXD pulled LOW.
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FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES
Power-Up
TXD HIGH and EN LOW > t1 (35 s) TXD HIGH and EN LOW to HIGH
Fast (10 x)
Toggle Function EN LOW for t 2 < 5.0 s, then HIGH
LIN Bus or WAKE Pin Wake-Up
Sleep
Awake
TXD HIGH and EN LOW to HIGH
Normal 1.0 to 20 kbps
EN LOW for t 2 < 5.0 s, then HIGH EN LOW for t 2 < 5.0 s, then HIGH
TXD LOW and EN LOW to HIGH TXD LOW and EN LOW to HIGH
TXD HIGH
Wait Slow
Slow 1.0 to 10 kbps
Toggle Function
TXD HIGH and EN LOW > t1 (35 s) EN LOW for t 2 < 5.0 s, then HIGH
Fast (10 x)
Note Refer to Table 5 for explanation. Figure 15. Operational and Transitional Modes State Diagram Table 5. Explanation of Operational and Transitional Modes State Diagram
Operational/ Transitional Sleep Mode Awake Normal Mode LIN Recessive state, driver off. 20 A pullup current source. Recessive state, driver off. 30 k pullup active. Driver active. 30 k pullup active. Slew rate normal (20 kbps). INH LOW HIGH HIGH EN LOW LOW HIGH TXD X X HIGH to enter Normal mode. Once in Normal mode: LOW to drive LIN bus in dominant, HIGH to drive LIN bus in recessive. LOW LOW to enter Slow mode. Once in Slow mode: LOW to drive LIN bus in dominant, HIGH to drive LIN bus in recessive. LOW to drive LIN bus in dominant, HIGH to drive LIN bus in recessive. RXD High impedance. HIGH if external pullup to VDD. LOW. If external pullup, HIGH-toLOW transition reports wake-up. Report LIN bus level: * Low LIN bus dominant * High LIN bus recessive HIGH Report LIN bus level: * Low LIN bus dominant * High LIN bus recessive Report LIN bus level: * Low LIN bus dominant * High LIN bus recessive
Wait Slow Slow
Recessive state. Driver off. 30 k pullup active. Driver active. 30 k pullup active. Slew rate slow (10 kbps).
HIGH HIGH
HIGH HIGH
Fast
Driver active. 30 k pullup active. Slew rate fast (> 100 kbps).
HIGH
HIGH
X = Don't care.
ELECTROMAGNETIC COMPATIBILITY RADIATED EMISSION IN NORMAL AND SLOW MODES
The 33661 has been tested for radiated emission performances. Figures 16 and 17 show the results in the frequency range 100 kHz to 2.0 MHz. Test conditions are in accordance with CISPR25 recommendations, bus length of
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FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES
1.5 meters, device loaded with 10 nF and 500 bus impedance. Figure 16 displays the results when the device is set in the Normal mode, optimized for baud rate up to 20 kbps.
Figure 17 displays the results when the device is set in the Slow mode, optimized for baud rate up to 10 kbps. The level of emissions is significantly reduced compared to the already excellent level of the Normal mode.
Figure 16. Radiated Emission in Normal Mode
Figure 17. Radiated Emission in Slow Mode
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TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
The 33661 can be configured in several applications. Figures 18 and 19 show master and slave node applications.
VPWR
An additional pullup resistor of 1.0 k in series with a diode must be added when the device is used in the master node.
33661
> 33 k External Switch
VSUP
WAKE EN VDD
INH Control
20 A Master Node Pullup INH
I/O MCU
Control
*
VDD Regulator 12 V 5.0 V TXD TXD Slope Control GND VDD RXD RXD 30 k Receiver LIN
1.0 k LIN Bus
* Optional
Figure 18. Master Node Typical Application
VPWR
33661
> 33 k External Switch
VSUP
WAKE EN
INH Control
20 A
I/O VDD MCU
INH Control
VDD Regulator 12 V 5.0 V
*
RXD VDD
RXD 30 k LIN Receiver LIN Bus
INH TXD
TXD Slope Control GND
* Optional
Figure 19. Slave Node Typical Application
33661
Analog Integrated Circuit Device Data Freescale Semiconductor
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PACKAGING PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
Important For the most current revision of the package, visit www.freescale.com and do a keyword search on the 98A drawing number below.
D SUFFIX EF SUFFIX (PB-FREE) 8-PIN SOIC NARROW BODY PLASTIC PACKAGE 98ASB42564B ISSUE U
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REFERENCE DOCUMENTS PACKAGE DIMENSIONS
REFERENCE DOCUMENTS
Table 6. Reference Documents
Title Local Interconnect Network (LIN) Physical Interface: Difference Between MC33399 and MC33661 Literature Number EB215
33661
Analog Integrated Circuit Device Data Freescale Semiconductor
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REVISION HISTORY
REVISION HISTORY
REVISION 5.0
DATE 10/2006
DESCRIPTION OF CHANGES * * * * Implemented Revision History page Updated the Freescale format and style Added MCZ33661EF/R2 to the part number Ordering Information Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from MAXIMUM RATINGS on page 4. Added note with instructions from www.freescale.com.
6.0
11/2006
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Analog Integrated Circuit Device Data Freescale Semiconductor
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MC33661 Rev. 6.0 11/2006

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