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MDT1020 1. General Description This ROM-Based 8-bit micro-controller uses a fully static CMOS design technology combines higher speed and smaller size with the low power and high noise immunity of CMOS. On chip memory system includes 2.0 K bytes of ROM, and 80 bytes of static RAM. u 4 oscillator start-up time : 150 s, 20 ms, 40 ms, 80 ms u 8-bit real time clock/counter(RTCC) with 8-bit programmable prescaler u 4 types of oscillator can be selected by code options : RCLow cost RC oscillator LFXTLow frequency crystal oscillator XTALStandard crystal oscillator HFXTHigh frequency crystal oscillator u On-chip RC oscillator based Watchdog Timer(WDT) can be operated freely u Pull up resistors for the following pins : PA0~PA3, PB0~PB7,PC0~PC7, /MCLR, RTCC u Pull down resistors for the following pins : PA0~PA3, PB0~PB7, PC0~PC7, RTCC u 20 I/O pins with their own independent direction control 2. Features The followings are some of the features on the hardware and software : u Fully CMOS static design u 8-bit data bus u On chip ROM size : 2 K words u Internal RAM size : 80 bytes (72 general purpose, 8 special registers) u 36 single word instructions u 14-bit instructions u 2-level stacks u Operating voltage : 2.3 V ~ 6.3 V u Operating frequency : 0 ~ 20 MHz u The fastest execution time is 200 ns under 20 MHz in all single cycle instructions except the branch instruction. u Addressing modes include direct, indirect and relative addressing modes u Power-on Reset u Power Edge-detector Reset u Sleep mode for power saving 3. Applications The application areas of this MDT1020 range from appliance motor control and high speed automotive to low power remote transmitters/receivers, pointing devices, and telecommunications processors, such as Remote controller, small instruments, chargers, toy, automobile and PC peripheral ... etc. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.1 2005/6 Ver1.4 MDT1020 4. Pin Assignment RTCC Vdd N/C Vss N/C PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PB4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 /MCLR OSC1 OSC2 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PB7 PB6 PB5 5. Pin Function Description Pin Name PA0~PA3 PB0~PB7 PC0~PC7 RTCC /MCLR OSC1 OSC2 Vdd Vss I/O I/O I/O I/O I I I O Function Description Port A, TTL input level Port B, TTL input level Port C, TTL input level Real Time Clock/Counter, Schmitt Trigger input levels Master Clear, Schmitt Trigger input levels Oscillator Input Oscillator Output Power supply Ground This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.2 2005/6 Ver1.4 MDT1020 6. Memory Map (A) Register Map Address 00 01 02 03 04 05 06 07 08~0F 10~1F 30~3F 50~5F 70~7F Description Indirect Addressing Register RTCC PC STATUS MSR Port A Port B Port C Internal RAM, General Purpose Register Internal Memory Select Register Internal Memory Select Register Internal Memory Select Register Internal Memory Select Register (1) IAR ( Indirect Address Register) : R0 (2) RTCC (Real Time Counter/Counter Register) : R1 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.3 2005/6 Ver1.4 MDT1020 (3) PC (Program Counter) : R2 Write PC, CALL --- always 0 LJUMP, JUMP, LCALL --- from instruction word RTWI, RET --- from STACK A10 A9 A8 A7~A0 Write PC, JUMP, CALL --- from SATUS b6 b5 LJUMP, LCALL --- from instruction word RTWI, RET --- from STACK Write PC --- from ALU LJUMP, JUMP, LCALL, CALL --- from instruction word RTWI, RET --- from STACK (4) STATUS (Status register) : R3 Bit 0 1 2 3 4 6X5 Symbol C HC Z PF TF page Carry bit Half Carry bit Zero bit Power loss Flag bit Time overflow Flag bit Page select bit : 00 : 000H --- 1FFH 01 : 200H --- 3FFH 10 : 400H --- 5FFH 11 : 600H --- 7FFH 7 XX General purpose bits Function This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.4 2005/6 Ver1.4 MDT1020 (5) MSR (Memory Select Register) : R4 Memory Select Register : 00 : 10~1F 01 : 30~3F 10 : 50~5F 11 : 70~7F b7 b6 b5 b4 b3 b2 b1 b0 Read only "1" Indirect Addressing Mode (6) PORT A : R5 PA3~PA0, I/O Register (7) PORT B : R6 PB7~PB0, I/O Register (8) PORT C : R7 PC7~PC0, I/O Register (9) TMR (Time Mode Register) Bit Symbol Prescaler Value Function RTCC rate WDT rate 000 1:2 1:1 001 1:4 1:2 010 1:8 1:4 011 1 : 16 1:8 100 1 : 32 1 : 16 101 1 : 64 1 : 32 110 1 : 128 1 : 64 111 1 : 256 1 : 128 Prescaler assignment bit : 0 X RTCC 1 X Watchdog Timer RTCC signal Edge : 0 X Increment on low-to-high transition on RTCC pin 1 X Increment on high-to-low transition on RTCC pin RTCC signal set : 0 X Internal instruction cycle clock 1 X Transition on RTCC pin 2X0 PS2X0 3 PSC 4 TCE 5 TCS (10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register) This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.5 2005/6 Ver1.4 MDT1020 The CPIO register is "write-only" x"0", I/O pin in output mode; x"1", I/O pin in input mode. (11) Configuration ROM : Bit 1 0 0 1 1 Bit 0 0 1 0 1 Oscillator Type RC Oscillator LFXT Oscillator XTAL Oscillator HFXT Oscillator Bit 3 0 0 1 1 Bit 2 0 1 0 1 Oscillator Start-up Time 150 s 20 ms 40 ms 80 ms Bit 4 0 1 (B) Program Memory Address 000-7FF 7FF Watchdog Timer control Watchdog timer disable all the time Watchdog timer enable all the time Description Program memory The starting address of the power on, external reset or WDT 7. Reset Condition for all Registers Register CPIO A CPIO B CPIO C TMR Register Address Power-On Reset 1111 1111 1111 1111 1111 1111 --11 1111 /MCLR or WDT Reset 1111 1111 1111 1111 1111 1111 --11 1111 Address Power-On Reset /MCLR or WDT Reset This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.6 2005/6 Ver1.4 MDT1020 IAR RTCC PC STATUS MSR PORT A PORT B PORT C 00h 01h 02h 03h 04h 05h 06h 07h xxxx xxxx 1111 1111 0001 1xxx 100x xxxx - - - - xxxx xxxx xxxx xxxx xxxx uuuu uuuu 1111 1111 000# #uuu 100u uuuu - - - - uuuu uuuu uuuu uuuu uuuu Note G uxunchangedA xxunknownA - xunimplementedA read as "0" #xvalue depends on the condition of the following table Condition /MCLR reset (not during SLEEP) /MCLR reset during SLEEP WDT reset (not during SLEEP) WDT reset during SLEEP StatusG bit 4 StatusG bit 3 u 1 0 0 u 0 1 0 8. Instruction Set Instruction Code Mnemonic Operands Function No operation Clear Watchdog timer Sleep mode Load W to TMODE register Return R R RA t I Control I/O port register Store W to register Load register Load immediate to W Operating None 0/WT 0/WT,stop OSC W/TMODE Stack/PC W/CPIO W/R R/t I/W [R(0~3) R(4~7)]/t R + 1/t R + 1/t Operating r TFA PF TFA PF None None None None Z None None Z None Status Status 010000 00000000 NOP 010000 00000001 CLRWT 010000 00000010 SLEEP 010000 00000011 TMODE 010000 00000100 RET 010000 00000rrr 010001 1rrrrrrr 011000 trrrrrrr 111010 iiiiiiii 010111 trrrrrrr 011001 trrrrrrr 011010 trrrrrrr CPIO STWR LDR LDWI SWAPR RA t Swap halves register INCR Rt A Increment register INCRSZ RA t Increment registerA skip if zero Mnemonic Instruction Code Function Operands This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.7 2005/6 Ver1.4 MDT1020 011011 trrrrrrr 011100 trrrrrrr 011101 trrrrrrr 011110 trrrrrrr 010010 trrrrrrr 110100 iiiiiiii 010011 trrrrrrr 110101 iiiiiiii 010100 trrrrrrr 110110 iiiiiiii 011111 trrrrrrr 010110 trrrrrrr 010101 trrrrrrr 010000 1xxxxxxx 010001 0rrrrrrr 0000bb brrrrrrr 0010bb brrrrrrr 0001bb brrrrrrr 0011bb brrrrrrr 100nnn nnnnnnnn 101nnn nnnnnnnn ADDWR RA t Add W and register SUBWR R, t DECR R, t DECRSZ R, t ANDWR R, t ANDWI IORWI i XORWR R, t XORWI RRR RLR CLRW CLRR BCR BSR R R, b R, b i COMR R, t R, t R, t i IORWR R, t Subtract W from register Decrement register Decrement register, skip if zero AND W and register AND W and immediate Inclu. OR W and register Inclu. OR W and immediate Exclu. OR W and register Complement register Rotate right register Rotate left register Clear working register Clear register Bit clear Bit set Bit Test, skip if clear Bit Test, skip if set Long CALL subroutine Long JUMP to address Call subroutine Return, place immediate to W n JUMP to address W + R/t C,HC,Z R W/t (R+/W+1 C,HC,Z /t) R 1/t R 1/t R a W/t i a W/W R a W/t i a W/W R o W/t /R/t R(n)/R(n-1), C/ R(7),R(0)/C R(n)/r(n+1), C/R(0),R(7)/C 0/W 0/R 0/R(b) 1/R(b) Skip if R(b)=0 Skip if R(b)=1 n/PC, PC+1/Stack n/PC n/PC, PC+1/Stack Stack/PC, i/W n/PC Z None Z Z Z Z Z Z Z C C Z Z None None None None None None None None None Exclu. OR W and immediate i o W/W BTSC R, b BTSS R, b LCALL LJUMP n n n i 110000 nnnnnnnn CALL 110001 iiiiiiii RTWI 11001n nnnnnnnn JUMP Note : W WT TMODE CPIO TF PF PC OSC : : : : : : : : Working register Watchdog timer TMODE mode register Control I/O port register Timer overflow flag Power loss flag Program Counter Oscillator P.8 : : 0 1 R: C: HC : Z: b t Bit position Target : Working register : General register General register address Carry flag Half carry Zero flag 2005/6 Ver1.4 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw MDT1020 Inclu. Exclu. AND : : : Inclusive ` a' Exclusive ` o' Logic AND ` a' / x i n : : : : Complement Don't care Immediate data ( 8 bits ) Immediate address 9. Electrical Characteristics (A) Operating Voltage & Frequency Vdd R 2.3 V ~ 6.3 V FrequencyR Hz ~ 20 MHz 0 (B) Input Voltage @ V ddx 5.0 V, Temperaturex25 J Port Vil Vih PA, PB, PC RTCC, /MCLR PA, PB, PC RTCC, /MCLR Min. Vss Vss 2.0 V 3.4 V Max. 1.0 V 0.8 V Vdd Vdd Threshold Voltage : Port A, Port B, Port C V thx 1.3 V RTCC, /MCLR V il x 1.3 V, V ih x 3.0 V (Schmitt Trigger) (C) Output Voltage @ V ddx 5.0 V, Temperaturex25 J, the typical value as followings : PA, PB, PC Port Iohx 20.0 mA Iol x 20.0 mA Iohx 5.0 mA Iol x 5.0 mA Vohx 3.60 V Vol x 0.35 V Vohx 4.70 V Vol x 0.08 V This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.9 2005/6 Ver1.4 MDT1020 (D) Leakage Current @ V ddx 5.0 V, Temperaturex25 J, the typical value as followings : Iil Iih (E) Sleep Current @WDTDisable, Temperaturex25 J, the typical value as followings : Vddx 2.3 V ~ 6.3 V, ddO 0.1 A I @WDTEnable, Temperaturex25 J, the typical value as followings : Vddx 2.3 V Vddx 3.0 V Vddx 4.0 V Vddx 5.0 V Vddx 6.3 V IddO 1.0 A Iddx 2.0 A Iddx 5.0 A Iddx 10.0 A Iddx 20.0 A 1.0 A (Max.) I 1.0 A (Max.) (F) Operating Current / Voltage Temperaturex25J, the typical value as followings : (i) OSC TypexRC ; WDTEnable; @ V ddx 5.0 V Cext. (F) Rext. (Ohm) 4.7 K 10.0 K 3P 47.0 K 100.0 K 300.0 K 470.0 K 4.7 K 10.0 K 20P 47.0 K 100.0 K 300.0 K 470.0 K Frequency (Hz) 11.76 M 7.40 M 1.96 M 952.50 K 310.00 K 196.1 K 6.45 M 3.70 M 869.60 K 416.80 K 137.90 K 88.88 K Current (A) 1.90 m 1.12 m 315.00 175.00 90.00 75.00 950.0 540.0 160.0 105.0 65.0 60.0 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.10 2005/6 Ver1.4 MDT1020 Cext. (F) Rext. (Ohm) 4.7 K 10.0 K 100P 47.0 K 100.0 K 300.0 K 470.0 K 4.7 K 10.0 K 300P 47.0 K 100.0 K 300.0 K 470.0 K Frequency (Hz) 2.00 M 1.11 M 256.40 K 121.20 K 40.00 K 25.60 K 833.20 K 454.00 K 105.30 K 50.00 K 16.60 K 10.50 K Current (A) 325.0 190.0 80.0 65.0 55.0 50.0 160.0 105.0 65.0 55.0 50.0 49.0 (ii) OSC TypexLF (C=20 p); WDTDisable Voltage/Frequency 2.3 V 3.0 V 4.0 V 5.0 V 6.3 V 32 K 4.0 A 7.0 A 10.0 A 15.0 A 30.0 A 455 K X 48.0 A 70.0 A 105.0 A 150.0 A 1M X X 150.0 A 210.0 A 290.0 A Sleep O0.1 A O0.1 A O0.1 A O0.1 A O0.1 A (iii) OSC TypexXT (C=10 p); WDTEnable Voltage/Frequency 2.1 V 3.0 V 4.0 V 5.0 V 6.3 V 1M 70.0 A 130.0 A 250.0 A 470.0 A 530.0 A 4M 220.0 A 365.0 A 560.0 A 780.0 A 1.2 mA 10 M 500.00 A 820.00 A 1.20 mA 1.70 mA 2.30 mA Sleep O0.1 A 2.0 A 5.0 A 10.0 A 20.0 A This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.11 2005/6 Ver1.4 MDT1020 (iv) OSC TypexHF (C=10 p); WDTEnable Voltage/Frequency 2.1 V 3.0 V 4.0 V 5.0 V 6.3 V (G) Pull Resistance @ Input Mode : V ddx 3.0 V PORT RTCC /MCLR Pull-High Pull-Low Pull-High Pull-Low Pull-High Resistance Resistance Resistance Resistance Resistance R x 370.0 KOhm hi R x 370.0 KOhm lo R x 370.0 KOhm hi R x 370.0 KOhm lo R x 370.0 KOhm hi 4M 230.0 A 400.0 A 620.0 A 890.0 A 1.3 mA 10 M 530.00 A 890.00 A 1.30 mA 1.90 mA 2.60 mA 20 M 970.00 A 1.60 mA 2.40 mA 3.40 mA 5.00 mA Sleep O0.1 A 2.0 A 5.0 A 10.0 A 20.0 A @ Input Mode : V ddx 5.0 V PORT RTCC /MCLR Pull-High Resistance Pull-Low Pull-High Pull-Low Pull-High Resistance Resistance Resistance Resistance R x 170.0 KOhm hi R x 170.0 KOhm lo R x 170.0 KOhm hi R x 170.0 KOhm lo R x 170.0 KOhm hi p.s. : It is only a reference value for the Pull High/Low Resistance, and the accurate value of the Resistance depends on the various parameter of the Process. But the variation of the value will be not more than 20%. This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.12 2005/6 Ver1.4 MDT1020 (H) Power Edge-detector Reset Voltage (Not in Sleep Mode), @ V ddx 5.0 V VprO 1.1~1.3 V Vpr R Vdd (Power Supply) (I) The basic WDT time-out cycle time @Temperaturex25 J, the typical value as followings : Voltage (V) 2.3 3.0 4.0 5.0 6.3 Basic WDT time-out cycle time (ms) 29.84 26.88 23.91 20.70 18.98 This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.13 2005/6 Ver1.4 MDT1020 10. Port A ,Port B and Port C Equivalent Circuit Working Register D QB Data I/P I/O Control CK I/O Control Latch Q MOS Pull-Hi (Long Channel) Information Sheet Pull Hi/Lo Selection Port I/O Pin D Write CK Data O/P Latch Q MOS Pull-Down (Long Channel) Data Bus QB D Read Data I/P Latch CK Input Resistor TTL Input Level This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.14 2005/6 Ver1.4 MDT1020 11. MCLRB and RTCC Input Equivalent Circuit MOS Pull Hi (Long Channel) R U 1 K MCLRB Schmitt Trigger Information Sheet Pull Hi/Lo Selection MOS Pull Hi (Long Channel) R U 1 K RTCC Schmitt Trigger MOS Pull Low (Long Channel) Information Sheet Pull Hi/Lo Selection This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.15 2005/6 Ver1.4 MDT1020 12. Block Diagram Stack Two Levels ROM 2048N14 RAM 72N8 Port A Port PA0~PA3 4 bits 11 bits 11 bits 14 bits Program Counters Instruction Register Special Register OSC1 OSC2 MCLR D0~D7 Port B Port PB0~PB7 8 bits Oscillator Circuit Instruction Decoder Control Circuit Data 8-bit Power on Reset Power Down Reset Working Register ALU Status Register Port PC0~PC7 8 bits Port C 8-bit Timer/Counter Prescale WDT/OST Timer RTCC This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.16 2005/6 Ver1.4 MDT1020 13. Capacitor Selection For Crystal Oscillator (a) With built-in Oscillation Capacitors ( Default for HF,XT,LF ) @ Vddx 2.3V~5.5 V , C1=C2=10P~15P This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.17 2005/6 Ver1.4 MDT1020 (b) Without built-in Oscillation Capacitors @ Vddx 3.0 V~ 5.0 V Osc. Type Resonator Freq. 20 MHz HF 10 MHz 4 MHz 10 MHz XT 4 MHz 1 MHz 1 MHz LF 455 K 32 K C1 5 pF ~10 pF 10 pF ~50 pF 10 pF ~50 pF 10 pF ~30 pF 10 pF ~50 pF 10 pF ~30 pF 3 pF ~5 pF 10 pF ~30 pF 10 pF ~20 pF C2 10 pF~30 pF 20 pF ~100 pF 20 pF ~100 pF 10 pF ~50 pF 20 pF ~100 pF 20 pF ~50 pF 3 pF ~5 pF 20 pF ~50 pF 15 pF ~30 pF This specification are subject to be changed without notice. Any latest information please preview http;//www.mdtic.com.tw P.18 2005/6 Ver1.4 |
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