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NLAS4599 Low Voltage Single Supply SPDT Analog Switch The NLAS4599 is an advanced high speed CMOS single pole - double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full power-supply range (from VCC to GND). The device has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches. The channel select input is compatible with standard CMOS outputs. The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc. http://onsemi.com MARKING DIAGRAMS TSOP-6 DT SUFFIX CASE 318G 1 6 SC-88 DF SUFFIX CASE 419B 1 A0 = Specific Device Code A = Assembly Location Y = Year W = Work Week M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) A0 MG G 1 A0AYWG G * * * * * * * * * * 1 Channel Select Input Over-Voltage Tolerant to 5.5 V Fast Switching and Propagation Speeds Break-Before-Make Circuitry Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C Diode Protection Provided on Channel Select Input Improved Linearity and Lower ON Resistance over Input Voltage Latch-up Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Chip Complexity: 38 FETs Pb-Free Packages are Available SELECT 1 6 5 4 NO COM NC ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. FUNCTION TABLE Select L H ON Channel NC NO V+ 2 GND 3 Figure 1. Pin Assignment COM Figure 2. Logic Symbol *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. (c) Semiconductor Components Industries, LLC, 2006 June, 2006 - Rev. 9 U U CHANNEL SELECT U 2X0 2X1 NO NC 1 Publication Order Number: NLAS4599/D NLAS4599 ABSOLUTE MAXIMUM RATINGS Symbol VCC VIS VIN IIK PD TSTG TL TJ VESD Positive DC Supply Voltage Analog Input Voltage (VNO or VCOM) Digital Select Input Voltage DC Current, Into or Out of Any Pin Power Dissipation in Still Air Storage Temperature Range Lead Temperature, 1mm from Case for 10 seconds Junction Temperature Under Bias ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 125C (Note 4) SC-88 TSOP-6 SC-88 TSOP-6 Parameter Value -0.5 to +7.0 -0.5 VIS VCC )0.5 -0.5 VI + 7.0 $50 200 200 -65 to +150 260 150 2000 200 N/A $300 333 333 Unit V V V mA mW C C C V ILATCH-UP qJA Latch-Up Performance Thermal Resistance mA C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22-A114-A 2. Tested to EIA/JESD22-A115-A 3. Tested to JESD22-C101-A 4. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VIS TA tr, tf DC Supply Voltage Digital Select Input Voltage Analog Input Voltage (NC, NO, COM) Operating Temperature Range Input Rise or Fall Time, SELECT VCC = 3.3 V + 0.3 V VCC = 5.0 V + 0.5 V NORMALIZED FAILURE RATE Characteristics Min 2.0 GND GND -55 0 0 Max 5.5 5.5 VCC +125 100 20 Unit V V V C ns/V DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature 5C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130C TJ = 120C TJ = 100C TJ = 110C TJ = 90C TJ = 80C 100 TIME, YEARS 1 1 10 1000 Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAS4599 DC CHARACTERISTICS - Digital Section (Voltages Referenced to GND) Guaranteed Limit Symbol VIH Parameter Minimum High-Level Input Voltage, Select Input Condition VCC 2.0 2.5 3.0 4.5 5.5 2.0 2.5 3.0 4.5 5.5 VIN = 5.5 V or GND VIN = 5.5 V or GND Select and VIS = VCC or GND 5.5 0 5.5 -55 to 255C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 +0.1 $10 1.0 <855C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 +1.0 $10 1.0 <1255C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 +1.0 $10 2.0 Unit V VIL Maximum Low-Level Input Voltage, Select Input V IIN IOFF ICC Maximum Input Leakage Current, Select Input Power Off Leakage Current Maximum Quiescent Supply Current mA mA mA DC ELECTRICAL CHARACTERISTICS - Analog Section Guaranteed Limit Symbol RON Parameter Maximum "ON" Resistance (Figures 17 - 23) ON Resistance Flatness (Figures 17 - 23) ON Resistance Match Between Channels NO or NC Off Leakage Current (Figure 9) COM ON Leakage Current (Figure 9) Condition VIN = VIL or VIH VIS = GND to VCC IINI < 10.0 mA VIN = VIL or VIH IINI < 10.0 mA VIS = 1V, 2V, 3.5V VIN = VIL or VIH IINI < 10.0 mA VNO or VNC = 3.5 V VIN = VIL or VIH VNO or VNC = 1.0 VCOM 4.5 V VIN = VIL or VIH VNO 1.0 V or 4.5 V with VNC floating or VNO 1.0 V or 4.5 V with VNO floating VCOM = 1.0 V or 4.5 V VCC 2.5 3.0 4.5 5.5 4.5 -55 to 255C 85 45 30 25 4 <855C 95 50 35 30 4 <1255C 105 55 40 35 5 Unit W RFLAT (ON) W DRON (ON) 4.5 2 2 3 W INC(OFF) INO(OFF) ICOM(ON ) 5.5 5.5 1 1 10 10 100 100 nA nA http://onsemi.com 3 NLAS4599 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Max Limit VCC Symbol tON Parameter Turn-On Time (Figures 12 and 13) Test Conditions RL = 300 W, CL = 35 pF (Figures 5 and 6) (V) 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 VIS (V) 2.0 2.0 3.0 3.0 2.0 2.0 3.0 3.0 2.0 2.0 3.0 3.0 -55 to 255C Min 5 5 2 2 1 1 1 1 1 1 1 1 Typ* 23 16 11 9 7 5 4 3 12 11 6 5 Max 28 21 16 14 12 10 9 8 <855C Min 5 5 2 2 1 1 1 1 1 1 1 1 Max 30 25 20 20 15 15 12 12 <1255C Min 5 5 2 2 1 1 1 1 1 1 1 1 Max 30 25 20 20 15 15 12 12 Unit ns tOFF Turn-Off Time (Figures 12 and 13) RL = 300 W, CL = 35 pF (Figures 5 and 6) ns tBBM Minimum Break-Before-Make Time VIS = 3.0 V (Figure 4) RL = 300 W, CL = 35 pF ns *Typical Characteristics are at 25C. Typical @ 25, VCC = 5.0 V CIN CNO or CNC CCOM C(ON) Maximum Input Capacitance, Select Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) 8 10 10 20 pF ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 5.5 Typical 25C 170 200 200 -3 -3 -3 -93 -93 -93 1.5 3.0 Unit MHz Symbol BW Parameter Maximum On-Channel -3dB Bandwidth or Minimum Frequency Response (Figure 10) Maximum Feedthrough On Loss Condition VIN = 0 dBm VIN centered between VCC and GND (Figure 7) VIN = 0 dBm @ 100 kHz to 50 MHz VIN centered between VCC and GND (Figure 7) f = 100 kHz; VIS = 1 V RMS VIN centered between VCC and GND (Figure 7) VIN = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 W, CL = 1000 pF Q = CL * DVOUT (Figure 8) FIS = 20 Hz to 100 kHz, RL = Rgen = 600 W, CL = 50 pF VIS = 5.0 VPP sine wave VONL dB VISO Off-Channel Isolation (Figure 10) Charge Injection Select Input to Common I/O (Figure 15) dB Q pC THD Total Harmonic Distortion THD + Noise (Figure 14) 5.5 0.1 % http://onsemi.com 4 NLAS4599 DUT VCC 0.1 mF 300 W Output VOUT 35 pF 90% Output Input GND tBMM 90% of VOH VCC Switch Select Pin GND Figure 4. tBBM (Time Break-Before-Make) VCC DUT VCC 0.1 mF Open Output VOUT 300 W 35 pF Output VOL tON tOFF Input 0V VOH 90% 90% 50% 50% Input Figure 5. tON/tOFF VCC DUT Output Open 300 W VOUT 35 pF Input VCC 50% 0V VOH Output VOL 10% 10% 50% Input tOFF tON Figure 6. tON/tOFF http://onsemi.com 5 NLAS4599 50 W Reference Input Output 50 W Generator 50 W DUT Transmitted Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz VOUT VIN for VIN at 100 kHz to 50 MHz Bandwidth (BW) = the frequency 3 dB below VONL Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT Open Output VIN VCC GND CL Output Off Off DVOUT VIN On Figure 8. Charge Injection: (Q) 100 10 LEAKAGE (nA) 1 ICOM(ON) 0.1 ICOM(OFF) 0.01 VCC = 5.0 V INO(OFF) 0.001 -55 -20 25 70 85 125 TEMPERATURE (C) Figure 9. Switch Leakage vs. Temperature http://onsemi.com 6 NLAS4599 0 -20 PHASE (Degree) 10 Bandwidth (ON-RESPONSE) 0 -40 (dB) Off Isolation 20 -60 VCC = 5.0 V TA = 25C 30 VCC = 5.0 V TA = 25C -80 -100 0.01 0.1 1 10 FREQUENCY (MHz) 100 200 0.01 0.1 1 10 FREQUENCY (MHz) 100 200 Figure 10. Bandwidth and Off-Channel Isolation Figure 11. Phase vs. Frequency 30 25 20 15 10 5 0 2.5 tOFF (ns) tON (ns) TIME (ns) 30 VCC = 4.5 V 25 20 15 10 5 0 -55 tON tOFF TIME (ns) 3 3.5 4 4.5 5 -40 25 Temperature (C) 85 125 VCC (VOLTS) Figure 12. tON and tOFF vs. VCC at 255C Figure 13. tON and tOFF vs. Temp 1 VINpp = 3.0 V VCC = 3.6 V THD + NOISE (%) 3.0 2.5 2.0 Q (pC) 1.5 1.0 0.5 0 VCC = 3 V VCC = 5 V 0.1 VINpp = 5.0 V VCC = 5.5 V 0.01 1 10 FREQUENCY (kHz) 100 -0.5 0 1 2 VCOM (V) 3 4 5 Figure 14. Total Harmonic Distortion Plus Noise vs. Frequency Figure 15. Charge Injection vs. COM Voltage http://onsemi.com 7 NLAS4599 100 10 1 ICC (nA) 0.1 0.01 0.001 0.0001 0.00001 -40 VCC = 3.0 V 20 VCC = 5.0 V -20 0 20 60 80 100 120 0 0.0 1.0 VCC = 5.5 V 2.0 3.0 VIS (VDC) 4.0 5.0 6.0 RON (W) 60 VCC = 2.5 V 40 VCC = 3.0 V VCC = 4.0 V 100 VCC = 2.0 V 80 Temperature (C) Figure 16. ICC vs. Temp, VCC = 3 V & 5 V Figure 17. RON vs. VCC, Temp = 255C 100 90 80 70 RON (W) RON (W) 125C 25C -55C 85C 0.5 1.0 1.5 2.0 2.5 60 50 40 30 20 10 0 0.0 100 90 80 70 60 50 40 30 20 10 0 0.0 125C 0.5 -55C 85C 1.0 1.5 VIS (VDC) 2.0 2.5 3.0 25C VIS (VDC) Figure 18. RON vs Temp, VCC = 2.0 V Figure 19. RON vs. Temp, VCC = 2.5 V 50 45 40 35 RON (W) RON (W) 30 25 20 15 10 5 0 0.0 -55C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 125C 85C 25C 30 25 20 15 10 5 0 0.0 -55C 85C 125C 25C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VIS (VDC) VIS (VDC) Figure 20. RON vs. Temp, VCC = 3.0 V Figure 21. RON vs. Temp, VCC = 4.5 V http://onsemi.com 8 NLAS4599 25 125C 25 20 20 125C RON (W) 25C 10 85C 5 -55C RON (W) 15 15 25C 10 85C 5 -55C 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIS (VDC) VIS (VDC) Figure 22. RON vs. Temp, VCC = 5.0 V Figure 23. RON vs. Temp, VCC = 5.5 V ORDERING INFORMATION Device Nomenclature Device NLAS4599DFT2 NLAS4599DFT2G NLAS4599DTT1 NLAS4599DTT1G NLVAS4599DFT2 NLVAS4599DFT2G NLVAS4599DTT1 NLVAS4599DTT1G Circuit Indicator NL NL NL NL NL NL NL NL Technology AS AS AS AS AS AS AS AS Device Function DF DF DT DT DF DF DT DT Suffix T2 T2G T1 T1G T2 T2G T1 T1G Package SC-88 SC-88 (Pb-Free) TSOP-6 TSOP-6 (Pb-Free) SC-88 SC-88 (Pb-Free) TSOP-6 TSOP-6 (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NLAS4599 PACKAGE DIMENSIONS SC-88/SC70-6/SOT-363 CASE 419B-02 ISSUE W D e NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419B-01 OBSOLETE, NEW STANDARD 419B-02. 4 MILLIMETERS MIN NOM MAX 0.80 0.95 1.10 0.00 0.05 0.10 0.20 REF 0.10 0.21 0.30 0.10 0.14 0.25 1.80 2.00 2.20 1.15 1.25 1.35 0.65 BSC 0.10 0.20 0.30 2.00 2.10 2.20 INCHES NOM MAX 0.037 0.043 0.002 0.004 0.008 REF 0.004 0.008 0.012 0.004 0.005 0.010 0.070 0.078 0.086 0.045 0.049 0.053 0.026 BSC 0.004 0.008 0.012 0.078 0.082 0.086 MIN 0.031 0.000 6 5 HE 1 2 3 -E- b 6 PL 0.2 (0.008) M E M DIM A A1 A3 b C D E e L HE A3 C A A1 L SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches SC-88/SC70-6/SOT-363 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 NLAS4599 PACKAGE DIMENSIONS TSOP-6 CASE 318G-02 ISSUE S D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10 - INCHES NOM 0.039 0.002 0.014 0.007 0.118 0.059 0.037 0.016 0.108 - 6 5 1 2 4 3 HE E b e q 0.05 (0.002) A1 A L c DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0 MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0 MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10 SOLDERING FOOTPRINT* 2.4 0.094 1.9 0.075 0.95 0.037 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 11 NLAS4599/D |
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