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STLVDS32
High speed differential line receivers
Feature summary

Meets or exceeds the requirements of ansi TIA/EIA-644 standard Operates with a single 3.3V supply Designed for signaling rate up to 400mbps Differential input thresholds 100mV max Typical propagation delay time of 2.5ns Power dissipation 60mW typical per receiver at 200MHz Low voltage TTL (LVTTL) logic output levels Pin compatible with the AM26LS32, SN65LVD32 Open circuit fail safe ESD protection: 7kV receiver pins 3kV all pins vs gnd mode voltage allows 1V of ground potential difference between two LVDS nodes. The intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100 The . transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment. The STLVDS32 version is characterized for operation from -55C to 125C. .
TSSOP
Description
The STLVDS32 is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a 100mV differential input voltage within the input common mode voltage range. The input common
Order code
Part number STLVDS32BTR March 2007 Temperature Range -55 to 125 C Package TSSOP16 (Tape & Reel) Rev. 12 Packaging 2500 parts per reel 1/15
www.st.com
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STLVDS32
Contents
1 2 3 4 5 6 7 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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STLVDS32
Pin configuration
1
Figure 1.
Pin configuration
Pin connections and functional diagram
Table 1.
Pin description
Pin n 2, 6, 10, 14 1, 7, 9, 15 3, 5, 11, 13 4 12 8 16 Symbol 1A to 4A 1B to 4B 1Y to 4Y G G GND VCC Receiver Inputs Negated Receiver Inputs Receiver Outputs Enable Enable Ground Supply Voltage Name and function
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Pin configuration
STLVDS32
Figure 2.
Logic diagram and logic symbol
Table 2.
Truth table
Differential inputs A, B VID 100mV G H X H -100mV < VID < 100mV VID -100mV X OPEN X
L=Low level, H=High Level, X=Don't care, Z= High Impedance
Enables G X L X L X L H X L
Outputs Y H H ? ? L L Z H H
X H X L H
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STLVDS32
Maximum ratings
2
Table 3.
Symbol VCC VI VI ESD Tstg
Maximum ratings
Absolute maximum ratings
Parameter Supply voltage (1) Input voltage Input voltage (A or B inputs) Pins receivers Human body model All pins vs gnd Storage temperature range 3 -65 to +150 C Value -0.5 to 4.6 -0.5 to (VCC + 0.5) -0.5 to 4.6 7 kV Unit V V V
1. All voltages except differential I/O bus voltage, are with respect to the network ground terminal.
Note:
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
Recommended operating conditions
Parameter Supply Voltage HIGH Level Input Voltage (ENABLE) LOW Level Input Voltage (ENABLE) Magnitude of Differential Input Voltage Common Mode Input Voltage Operating Temperature Range 0.1 0.5|VID| Min. 3.0 2.0 0.8 0.6 2.4-0.5|VID| VCC - 0.8 -40 85 C Typ. 3.3 Max. 3.6 Unit V V V V V
Table 4.
Symbol VCC VIH VIL |VID| VIC TA
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Electrical characteristics
STLVDS32
3
Table 5.
Electrical characteristics
Electrical characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25C, and VCC = 3.3V).
Parameter Positive Going Differential Input Voltage Threshold Negative Going Differential Input Voltage Threshold High Level Output Voltage Low Level Output Voltage Supply Current Disabled Input Current (A or B inputs) Power off Input Current (A or B inputs) Cold Spare Leakage Current High Level Input Current (EN, G, G or Inputs) Low Level Input Current (EN, G, G or Inputs) High Impedance Output Current VI = 0V VI = 2.4V VCC = 0, VI = 3.6V VI = 3.6V, VDD = 0V VIH = 2V VIL = 0.8V VO = 0 or VCC -2 -1.2 0.25 -10 -3 10 20 20 10 10 10 0.5 -20 mA A A A A A A IOH = -8mA IOH = -4mA IOH = 8mA Enabled, No Load ICC 10 -100 2.4 V 2.8 0.4 18 V mA Test Min. Typ. Max. 100 Unit mV mV
Symbol VITH+ VITHVOH VOL
II II(OFF) ICS IIH IIL IOZ
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STLVDS32
Electrical characteristics
Table 6.
Switching characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25C, and VCC = 3.3V).
Parameter Propagation Delay Time, Low to High Output Propagation Delay Time, High to Low Output Output Signal Rise Time Output Signal Fall Time Channel to Channel Output Skew (Note 1) Pulse Skew (|tPHL - tPLH|) (Note 2) Part to Part Skew (Note 3) Propagation Delay Time, High Impedance to High Level Output Propagation Delay Time, High Impedance to Low Level Output Fig. 4 Propagation Delay Time, High Level to High Impedance Output Propagation Delay Time, Low Level to High Impedance Output 3 5 5 5 CL = 10p, Fig. 3 Test Min. 1.5 1.5 Typ. 2.5 2.5 0.4 0.4 0.1 0.2 0.3 0.4 1 12 12 12 12 Max. 3.3 3.3 Unit ns ns ns ns ns ns ns ns ns ns ns
Symbol tPLH tPHL tr tf tsk(O) tsk(P) tsk(PP) tPZH tPZL tPHZ tPLZ
Note 1: tsk(O) is the maximum delay time difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. Note 2: tsk(P) is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 3: tsk(PP) is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC, and within 5C of each other within the operating temperature range
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Typical characteristics
STLVDS32
4
Figure 3.
Typical characteristics
Timing test and waveforms
Note: Note:
A: All input pulse are supplied by a generator having the following characteristics: tr or tf 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 0.2ns. B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T.
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STLVDS32
Typical characteristics
Figure 4.
Enable and disable time test circuit and waveform
Note: Note:
A: All input pulse are supplied by a generator having the following characteristics: tr or tf 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 0.2ns. B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T.
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Typical performance characteristics
STLVDS32
5
Figure 5.
Typical performance characteristics
(Unless otherwise specified TJ = 25C) Output current vs output voltage Figure 6. Output current vs output voltage
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STLVDS32
Package mechanical data
6
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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Package mechanical data
STLVDS32
TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
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STLVDS32
Package mechanical data
Tape & Reel TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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Revision history
STLVDS32
7
Table 7.
Date
Revision history
Revision history
Revision 9 10 11 12 Changes tr and tf description changed in table 6 - pag 7. Temperature Range has been changed in cover page, add ICS on table 5. Order code has been updated and new template. Title in cover page has been updated.
07-Jul-2004 05-Dec-2005 28-Mar-2006 20-Mar-2007
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STLVDS32
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