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| UTC US112S/N SCRs DESCRIPTION The UTC US112S/N is suitable to fit all modes of control found in applications such as overvoltage crowbar protection, motor control circuits in power tools and kitchen aids, in-rush current limiting circuits, capacitive discharge ignition, voltage regulation circuits. SCR 1 TO-220 1: CATHODE 2: ANODE 3: GATE ABSOLUTE MAXIMUM RATINGS PARAMETER Repetitive peak off-state voltages US112S/N-4 US112S/N-6 US112S/N-8 RMS on-state current (180 conduction angle) (Tc = 105C) Average on-state current (180 conduction angle) (Tc = 105C) Non repetitive surge peak on-state current (Tj = 25C) tp=8.3ms tp=10ms It Value for fusing (tp = 10 ms, Tj = 25C) Critical rate of rise of on-state current (IG = 2 x IGT , tr 100 n s, F = 60 Hz , Tj = 125C,) Peak gate current (tp=20s, Tj = 125C) Maximum peak reverse gate voltage Average gate power dissipation (Tj = 125C) Storage junction temperature range Operating junction temperature range VDRM VRRM IT(RMS) IT(AV) ITSM It dI/dt IGM VRGM PG(AV) Tstg Tj 400 600 800 12 8 146 140 98 50 4 5 1 -40 ~ +150 -40 ~ +125 V A A A AS A/s A V W C C SYMBOL RATING US112S US112N UNIT UTC UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R301-013,B UTC US112S/N UTC US112S(SENSITIVE) ELECTRICAL CHARACTERISTICS (Tj=25unless otherwise specified) SCR TEST CONDITIONS VD = 12 V, RL =140 VD = 12 V, RL=140 PARAMETER Gate trigger Current Gate trigger Voltage Gate non-trigger voltage Reverse gate voltage Holding Current Latching Current Circuit Rate Of Change Of off-state Voltage On-state voltage SYMBOL IGT VGT VGD VRG IH IL dV/dt VTM Vt0 Rd IDRM IRRM MIN MAX. 200 0.8 UNIT A V V VD = VDRM, RL = 3.3 k, RGK = 1k Tj = 125C IRG = 10 A IT = 50 mA, RGK = 1 k IG = 1 mA ,RGK = 1 k 0.1 8 5 6 5 1.6 0.85 30 5 2 V mA mA V/s V V m A mA VD = 67 % VDRM ,RGK = 220 Tj = 125C ITM = 24A, tp = 380 s, Tj = 25C Tj = 125C Tj = 125C Threshold Voltage Dynamic Resistance Off-state Leakage Current VDRM = VRRM, RGK = 220 Tj = 25C Tj = 125C UTC US112N(STANDARD) ELECTRICAL CHARACTERISTICS (Tj=25unless otherwise specified) PARAMETER Gate trigger Current Gate trigger Voltage Gate non-trigger voltage Holding Current Latching Current Circuit Rate Of Change Of off-state Voltage On-state voltage SYMBOL IGT VGT VGD IH IL dV/dt VTM Vt0 Rd IDRM IRRM TEST CONDITIONS VD = 12 V, RL =33 VD = 12 V, RL=33 MIN 2 MAX. 15 1.3 UNIT mA V V VD = VDRM, RL = 3.3 k ,Tj = 125C IT = 500 mA, Gate open IG = 1.2 IGT 0.2 30 60 200 1.6 0.85 30 5 2 mA mA V/s V V m A mA VD = 67 % VDRM , Gate open, Tj = 125C ITM = 24A, tp = 380 s, Tj = 25C Tj = 125C Tj = 125C Threshold Voltage Dynamic Resistance Off-state Leakage Current VDRM = VRRM, Tj = 25C Tj = 125C THERMAL RESISTANCES PARAMETER Junction to case (DC) Junction to ambient SYMBOL VALUE 1.3 60 UNIT Rth(j-c) Rth(j-a) KW K/W UTC UNISONIC TECHNOLOGIES CO., LTD. 2 QW-R301-013,B UTC US112S/N Figure.1:Maximum average power dissipation vs average on-state current. 14 12 10 SCR Figure.2:Average and D.C. on-state current vs case temperature DC 12 11 10 9 8 7 6 5 4 3 2 1 0 P(W) IT(av)(A) =180 =180 8 6 360 4 2 IT(av)(A) 0 1 2 3 4 5 6 7 8 9 Tcase() 0 0 25 50 75 100 12 5 Fig.3-1:Relative variation of thermal impedance junction to case vs pulse duration. K= Fig.3-2:Relative variation of thermal impedance junction to ambient vs pulseduration (recommended pad layout,FR4 PC board) K= 1.0 0.5 0.10 0.2 0.1 1E-3 tp(s) 1E-2 1E-1 1E+0 0.01 1E-2 tp(s) 1E-1 1E+0 1E+1 1E+2 5E+2 Figure.4-1:Relative variation of gate trigger current,holding current and latching vs junction temperature (US112S) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 -20 0 20 IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25) Figure.4-2: Relative variation of gate trigger current,holding current and latching current vs junction temperature (US112N). IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25) 2.4 2.2 IGT IH&IL Rgk=1k 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 60 80 100 120 140 0.0 -40 -20 IGT IH&IL Tj() 40 Tj() 0 20 40 60 80 100 120 140 UTC UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R301-013,B UTC US112S/N Figure.5:Relative variation of holding current vs gate-cathode resistance(typical values) (US112S) Ta=25 10.0 SCR Fig.6: Relative variation of dV/dt immunity vs gatecathode resistance(typical values) (US112S) dV/dt(Rgk)/dV/dt(Rgk=220) Tj=125 VD=0.67* VDRM IH(Rgk)/IH(Rgk=1k) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.0 Rgk(k) 1E-1 1E+0 1E+1 0.1 0.0 0.2 Rgk() 0.4 0.6 0.8 1.0 1.2 1E-2 Fig.7: Relative variation of dV/dt immunity vs gatecathode capacitance(typical values) (US112S) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 Cgk(nF) 75 100 125 150 1.0 dV/dt(Cgk)/dV/dt(Rgk=220) VD=0.67* VDRM Tj=125 Rgk=220 10.0 Fig.8: Surge peak on-state current vs number of cycles dV/dt(Rgk)/dV/dt(Rgk=220) Tj=125 VD=0.67* VDRM Rgk() 0.1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 Fig.9:Non-repetitive surge peak on-state current for a sinusoidal pulse with width tp<10ms, and corresponding 2 values of I t. 2000 1000 ITSM(A),I t(A s) ITSM Tjinitial=25 US112N dI/dt limitation 100 US112S US112N I 2t US112S tp(ms) 10 0.01 0.10 1.00 10.00 1 0.0 10 200 100 2 2 Fig.10: On-state characteristics(maximum values). ITSM Tj=max: Vto=0.85V Rd=30m Tj=Tjmax. Tj=25 VTM(V) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 UTC UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R301-013,B |
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